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authorLinus Torvalds <torvalds@linux-foundation.org>2016-01-13 09:26:40 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2016-01-13 09:26:40 -0800
commit237f38c3b3ab08eadecc89b7c9647b1cdb996bbe (patch)
treeed3740f13723f9082715d656d2bd3d37967ca858 /arch
parent67990608c8b95d2b8ccc29932376ae73d5818727 (diff)
parent60d77b3d2229eaf29eddf0d7a7947c3c922b1a4d (diff)
Merge tag 'usb-4.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB updates from Greg KH: "Here is the big USB drivers update for 4.5-rc1. Lots of gadget driver updates and fixes, like usual, and a mix of other USB driver updates as well. Full details in the shortlog. All of these have been in linux-next for a while" * tag 'usb-4.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (191 commits) MAINTAINERS: change my email address USB: usbmon: remove assignment from IS_ERR argument USB: mxu11x0: drop redundant function name from error messages USB: mxu11x0: fix debug-message typos USB: mxu11x0: rename usb-serial driver USB: mxu11x0: fix modem-control handling on B0-transitions USB: mxu11x0: fix memory leak on firmware download USB: mxu11x0: fix memory leak in port-probe error path USB: serial: add Moxa UPORT 11x0 driver USB: cp210x: add ID for ELV Marble Sound Board 1 usb: chipidea: otg: use usb autosuspend to suspend bus for HNP usb: chipidea: host: set host to be null after hcd is freed usb: chipidea: removing of_find_property usb: chipidea: implement platform shutdown callback usb: chipidea: clean up CONFIG_USB_CHIPIDEA_DEBUG reference usb: chipidea: delete static debug support usb: chipidea: support debugfs without CONFIG_USB_CHIPIDEA_DEBUG usb: chipidea: udc: improve error handling on _hardware_enqueue usb: chipidea: udc: _ep_queue and _hw_queue cleanup usb: dwc3: of-simple: fix build warning on !PM ...
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/mediatek/mt8173-evb.dts16
-rw-r--r--arch/arm64/boot/dts/mediatek/mt8173.dtsi42
2 files changed, 58 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
index 811cb760ba49..9b1482a1d007 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
@@ -13,6 +13,7 @@
*/
/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
#include "mt8173.dtsi"
/ {
@@ -32,6 +33,15 @@
};
chosen { };
+
+ usb_p1_vbus: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
};
&i2c1 {
@@ -408,3 +418,9 @@
&uart0 {
status = "okay";
};
+
+&usb30 {
+ vusb33-supply = <&mt6397_vusb_reg>;
+ vbus-supply = <&usb_p1_vbus>;
+ mediatek,wakeup-src = <1>;
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 4dd5f93d0303..c1fd2757f8e4 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -14,6 +14,7 @@
#include <dt-bindings/clock/mt8173-clk.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/phy/phy.h>
#include <dt-bindings/power/mt8173-power.h>
#include <dt-bindings/reset-controller/mt8173-resets.h>
#include "mt8173-pinfunc.h"
@@ -510,6 +511,47 @@
status = "disabled";
};
+ usb30: usb@11270000 {
+ compatible = "mediatek,mt8173-xhci";
+ reg = <0 0x11270000 0 0x1000>,
+ <0 0x11280700 0 0x0100>;
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
+ power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
+ clocks = <&topckgen CLK_TOP_USB30_SEL>,
+ <&pericfg CLK_PERI_USB0>,
+ <&pericfg CLK_PERI_USB1>;
+ clock-names = "sys_ck",
+ "wakeup_deb_p0",
+ "wakeup_deb_p1";
+ phys = <&phy_port0 PHY_TYPE_USB3>,
+ <&phy_port1 PHY_TYPE_USB2>;
+ mediatek,syscon-wakeup = <&pericfg>;
+ status = "okay";
+ };
+
+ u3phy: usb-phy@11290000 {
+ compatible = "mediatek,mt8173-u3phy";
+ reg = <0 0x11290000 0 0x800>;
+ clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>;
+ clock-names = "u3phya_ref";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "okay";
+
+ phy_port0: port@11290800 {
+ reg = <0 0x11290800 0 0x800>;
+ #phy-cells = <1>;
+ status = "okay";
+ };
+
+ phy_port1: port@11291000 {
+ reg = <0 0x11291000 0 0x800>;
+ #phy-cells = <1>;
+ status = "okay";
+ };
+ };
+
mmsys: clock-controller@14000000 {
compatible = "mediatek,mt8173-mmsys", "syscon";
reg = <0 0x14000000 0 0x1000>;