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authorRenwei Wu <Renwei.Wu@csr.com>2014-11-25 18:46:43 +0800
committerBarry Song <Baohua.Song@csr.com>2014-11-25 18:46:43 +0800
commitf97b1a1de44fbd39c8a992afc0f322f3d0ff8d11 (patch)
tree12d27fe717c4811fc57847a44664ce2e1d7059b4 /arch
parent1f634d7415441f723791d822fcde12dd50838d51 (diff)
ARM: dts: prima2: add resets property for VPP nodes
this patch adds missed resets property for CSR SiRFprimaII Video Post Processor(VPP) node. Signed-off-by: Renwei Wu <renwei.wu@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/prima2.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
index 70b2ad5d837e..1ca1a9aa953f 100644
--- a/arch/arm/boot/dts/prima2.dtsi
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -137,6 +137,7 @@
reg = <0x90020000 0x10000>;
interrupts = <31>;
clocks = <&clks 35>;
+ resets = <&rstc 6>;
};
};