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authorJayachandran C <jchandra@broadcom.com>2013-12-21 16:52:22 +0530
committerRalf Baechle <ralf@linux-mips.org>2014-01-24 22:39:48 +0100
commitd150cef4e8cc723d90226e503ef6aff2ca9fc57c (patch)
tree8e5a9d1d0457b80ec535b0f7858ffbec84d0f0c9 /arch/mips/netlogic/xlp
parent5513c760db4f3a914247b8fff1ba74b9ebb0af8e (diff)
MIPS: Netlogic: XLP9XX PIC updates
Functions for the XLP9XX interrupt table entry format and other PIC register changes. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6279/
Diffstat (limited to 'arch/mips/netlogic/xlp')
-rw-r--r--arch/mips/netlogic/xlp/nlm_hal.c15
-rw-r--r--arch/mips/netlogic/xlp/wakeup.c2
2 files changed, 16 insertions, 1 deletions
diff --git a/arch/mips/netlogic/xlp/nlm_hal.c b/arch/mips/netlogic/xlp/nlm_hal.c
index 5f191f54f9c0..2d31cf1137fb 100644
--- a/arch/mips/netlogic/xlp/nlm_hal.c
+++ b/arch/mips/netlogic/xlp/nlm_hal.c
@@ -69,6 +69,17 @@ int nlm_irq_to_irt(int irq)
uint64_t pcibase;
int devoff, irt;
+ /* bypass for 9xx */
+ if (cpu_is_xlp9xx()) {
+ switch (irq) {
+ case PIC_UART_0_IRQ:
+ return 133;
+ case PIC_UART_1_IRQ:
+ return 134;
+ }
+ return -1;
+ }
+
devoff = 0;
switch (irq) {
case PIC_UART_0_IRQ:
@@ -277,6 +288,10 @@ static unsigned int nlm_2xx_get_pic_frequency(int node)
unsigned int nlm_get_pic_frequency(int node)
{
+ /* TODO Has to calculate freq as like 2xx */
+ if (cpu_is_xlp9xx())
+ return 250000000;
+
if (cpu_is_xlpii())
return nlm_2xx_get_pic_frequency(node);
else
diff --git a/arch/mips/netlogic/xlp/wakeup.c b/arch/mips/netlogic/xlp/wakeup.c
index e6f77c053658..f11035b1ad11 100644
--- a/arch/mips/netlogic/xlp/wakeup.c
+++ b/arch/mips/netlogic/xlp/wakeup.c
@@ -47,8 +47,8 @@
#include <asm/netlogic/mips-extns.h>
#include <asm/netlogic/xlp-hal/iomap.h>
-#include <asm/netlogic/xlp-hal/pic.h>
#include <asm/netlogic/xlp-hal/xlp.h>
+#include <asm/netlogic/xlp-hal/pic.h>
#include <asm/netlogic/xlp-hal/sys.h>
static int xlp_wakeup_core(uint64_t sysbase, int node, int core)