diff options
author | Matthew Wilcox <matthew@wil.cx> | 2009-05-22 13:49:49 -0700 |
---|---|---|
committer | Tony Luck <tony.luck@intel.com> | 2009-06-17 09:33:49 -0700 |
commit | e088a4ad7fa53c3dc3c29f930025f41ccf01953e (patch) | |
tree | 07b012952bbbaccfe4ef3bb44b1ea0a3a3bb3868 /arch/ia64/include/asm/pal.h | |
parent | e56e2dcd381d9ec35379328f332221581eda4787 (diff) |
[IA64] Convert ia64 to use int-ll64.h
It is generally agreed that it would be beneficial for u64 to be an
unsigned long long on all architectures. ia64 (in common with several
other 64-bit architectures) currently uses unsigned long. Migrating
piecemeal is too painful; this giant patch fixes all compilation warnings
and errors that come as a result of switching to use int-ll64.h.
Note that userspace will still see __u64 defined as unsigned long. This
is important as it affects C++ name mangling.
[Updated by Tony Luck to change efi.h:efi_freemem_callback_t to use
u64 for start/end rather than unsigned long]
Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/include/asm/pal.h')
-rw-r--r-- | arch/ia64/include/asm/pal.h | 24 |
1 files changed, 11 insertions, 13 deletions
diff --git a/arch/ia64/include/asm/pal.h b/arch/ia64/include/asm/pal.h index 67b02901ead4..6a292505b396 100644 --- a/arch/ia64/include/asm/pal.h +++ b/arch/ia64/include/asm/pal.h @@ -989,8 +989,8 @@ ia64_pal_cache_read (pal_cache_line_id_u_t line_id, u64 physical_addr) } /* Return summary information about the hierarchy of caches controlled by the processor */ -static inline s64 -ia64_pal_cache_summary (u64 *cache_levels, u64 *unique_caches) +static inline long ia64_pal_cache_summary(unsigned long *cache_levels, + unsigned long *unique_caches) { struct ia64_pal_retval iprv; PAL_CALL(iprv, PAL_CACHE_SUMMARY, 0, 0, 0); @@ -1038,8 +1038,8 @@ ia64_pal_copy_pal (u64 target_addr, u64 alloc_size, u64 processor, u64 *pal_proc } /* Return the number of instruction and data debug register pairs */ -static inline s64 -ia64_pal_debug_info (u64 *inst_regs, u64 *data_regs) +static inline long ia64_pal_debug_info(unsigned long *inst_regs, + unsigned long *data_regs) { struct ia64_pal_retval iprv; PAL_CALL(iprv, PAL_DEBUG_INFO, 0, 0, 0); @@ -1074,8 +1074,7 @@ ia64_pal_fixed_addr (u64 *global_unique_addr) } /* Get base frequency of the platform if generated by the processor */ -static inline s64 -ia64_pal_freq_base (u64 *platform_base_freq) +static inline long ia64_pal_freq_base(unsigned long *platform_base_freq) { struct ia64_pal_retval iprv; PAL_CALL(iprv, PAL_FREQ_BASE, 0, 0, 0); @@ -1437,7 +1436,7 @@ ia64_pal_proc_set_features (u64 feature_select) * possible. */ typedef struct ia64_ptce_info_s { - u64 base; + unsigned long base; u32 count[2]; u32 stride[2]; } ia64_ptce_info_t; @@ -1478,9 +1477,9 @@ ia64_pal_register_info (u64 info_request, u64 *reg_info_1, u64 *reg_info_2) } typedef union pal_hints_u { - u64 ph_data; + unsigned long ph_data; struct { - u64 si : 1, + unsigned long si : 1, li : 1, reserved : 62; } pal_hints_s; @@ -1489,8 +1488,8 @@ typedef union pal_hints_u { /* Return information about the register stack and RSE for this processor * implementation. */ -static inline s64 -ia64_pal_rse_info (u64 *num_phys_stacked, pal_hints_u_t *hints) +static inline long ia64_pal_rse_info(unsigned long *num_phys_stacked, + pal_hints_u_t *hints) { struct ia64_pal_retval iprv; PAL_CALL(iprv, PAL_RSE_INFO, 0, 0, 0); @@ -1608,8 +1607,7 @@ ia64_pal_vm_info (u64 tc_level, u64 tc_type, pal_tc_info_u_t *tc_info, u64 *tc_ /* Get page size information about the virtual memory characteristics of the processor * implementation. */ -static inline s64 -ia64_pal_vm_page_size (u64 *tr_pages, u64 *vw_pages) +static inline s64 ia64_pal_vm_page_size(u64 *tr_pages, u64 *vw_pages) { struct ia64_pal_retval iprv; PAL_CALL(iprv, PAL_VM_PAGE_SIZE, 0, 0, 0); |