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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-06-06 15:36:13 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-06-06 15:36:13 -0700 |
| commit | 8450493076cd1dc8465db688f919708b5be17d46 (patch) | |
| tree | 25ad03937122d537ed4fab125c0ed968cead7f43 /arch/arm | |
| parent | 311da4975894aab7a4bb94aa83f38f052d7ffda4 (diff) | |
| parent | eaa3a1d46cfdbf1af50311e7a22f5d38c0418b56 (diff) | |
Merge tag 'edac_for_4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
Pull EDAC updates from Borislav Petkov:
- Stratix10 SDRAM support to altera_edac (Thor Thayer)
- the usual misc fixes all over the place
[ Also, shared branch for socfpga_stratix10.dtsi file changes with the
socfpga tree ]
* tag 'edac_for_4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
EDAC, ghes: Make platform-based whitelisting x86-only
EDAC, altera: Fix ARM64 build warning
EDAC, skx: Fix skx_edac build error when ACPI_NFIT=m
EDAC, ghes: Use BIT() macro
EDAC, ghes: Add DDR4 and NVDIMM memory types
EDAC, altera: Handle SDRAM Uncorrectable Errors on Stratix10
Documentation: dt: edac: Move Altera SOCFPGA EDAC file
EDAC, altera: Add support for Stratix10 SDRAM EDAC
Documentation: dt: socfpga: Add Stratix10 ECC Manager binding
EDAC, ghes: Remove unused argument to ghes_edac_report_mem_error()
arm64: dts: stratix10: add sdram ecc
EDAC, i7core: Fix spelling mistake: "redundacy" -> "redundancy"
EDAC, ghes: Add a null pointer check in ghes_edac_unregister()
ghes, EDAC: Fix ghes_edac registration
arm64: dts: stratix10: Change pad skew values for EMAC0 PHY driver
ARM: dts: consistently use 'atmel' as at24 manufacturer in cyclone5
arm64: dts: stratix10: Add PL330 DMAC to Stratix10 dts
arm64: dts: stratix10: enable i2c, add i2c periperals
arm64: dts: stratix10: use clock bindings for the Stratix10 platform
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts b/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts index 2459d133f1be..f50b19447de6 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts +++ b/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts @@ -161,7 +161,7 @@ }; at24@50 { - compatible = "at24,24c01"; + compatible = "atmel,24c01"; pagesize = <8>; reg = <0x50>; }; @@ -213,7 +213,7 @@ #size-cells = <0>; reg = <6>; eeprom@51 { - compatible = "at,24c01"; + compatible = "atmel,24c01"; pagesize = <8>; reg = <0x51>; }; @@ -224,7 +224,7 @@ #size-cells = <0>; reg = <7>; eeprom@51 { - compatible = "at,24c01"; + compatible = "atmel,24c01"; pagesize = <8>; reg = <0x51>; }; |