diff options
| author | David Brown <davidb@codeaurora.org> | 2011-01-04 17:02:48 -0800 |
|---|---|---|
| committer | David Brown <davidb@codeaurora.org> | 2011-01-21 15:27:49 -0800 |
| commit | 87fa28e972c223f69c1315a1b2ddb2a11d33ad0e (patch) | |
| tree | d97b3b6e152dc35269414f96a73996bbf31bd102 /arch/arm/mach-msm | |
| parent | c56eb8fb6dccb83d9fe62fd4dc00c834de9bc470 (diff) | |
msm: Add CPU queries
Create runtime queries to distinguish the various MSM targets.
Although these would probably be better named soc_is..., use
cpu_is... to match convention in the rest of the kernel.
Hard code the tests based on config options for now. When runtime
device detection is implemented, these can be made dynamic.
Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm')
| -rw-r--r-- | arch/arm/mach-msm/include/mach/cpu.h | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/arm/mach-msm/include/mach/cpu.h b/arch/arm/mach-msm/include/mach/cpu.h new file mode 100644 index 000000000000..e1ba9db37144 --- /dev/null +++ b/arch/arm/mach-msm/include/mach/cpu.h @@ -0,0 +1,48 @@ +/* Copyright (c) 2011, Code Aurora Forum. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + */ + +#ifndef __ARCH_ARM_MACH_MSM_CPU_H__ +#define __ARCH_ARM_MACH_MSM_CPU_H__ + +/* TODO: For now, only one CPU can be compiled at a time. */ + +#define cpu_is_msm7x01() 0 +#define cpu_is_msm7x30() 0 +#define cpu_is_qsd8x50() 0 +#define cpu_is_msm8x60() 0 + +#ifdef CONFIG_ARCH_MSM7X00A +# undef cpu_is_msm7x01 +# define cpu_is_msm7x01() 1 +#endif + +#ifdef CONFIG_ARCH_MSM7X30 +# undef cpu_is_msm7x30 +# define cpu_is_msm7x30() 1 +#endif + +#ifdef CONFIG_ARCH_QSD8X50 +# undef cpu_is_qsd8x50 +# define cpu_is_qsd8x50() 1 +#endif + +#ifdef CONFIG_ARCH_MSM8X60 +# undef cpu_is_msm8x60 +# define cpu_is_msm8x60() 1 +#endif + +#endif |