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authorStephen Warren <swarren@nvidia.com>2013-12-12 14:40:30 -0700
committerStephen Warren <swarren@nvidia.com>2013-12-16 14:09:21 -0700
commit4ffb93857656a988ceb79473390a7cb1afd01d35 (patch)
treed2e7146cd8b08a515b70cb64efa8be8a2db4dc1a /arch/arm/boot/dts
parent4b20bcbea191c441208e6794f0432100f57bea2e (diff)
ARM: tegra: fix pinctrl misconfiguration on Venice2
Other boards use PULL_NONE for their debug UART pins, and without this change, the board doesn't accept any serial input. Don't set the I2S port pins to tristate mode, or no audio signal will be sent out. Fixes: 605ae5804385 ("ARM: tegra: add default pinctrl nodes for Venice2") Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/tegra124-venice2.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index 616759c3c7e5..b31e18798be7 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -40,7 +40,7 @@
nvidia,function = "i2s1";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
dvfs_pwm_px0 {
nvidia,pins = "dvfs_pwm_px0";
@@ -250,7 +250,7 @@
"pu3";
nvidia,function = "uarta";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
uart2_cts_n_pj5 {