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authorDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>2016-12-23 15:56:22 -0800
committerChris Wilson <chris@chris-wilson.co.uk>2016-12-24 10:08:45 +0000
commitfeef2a7cb93e532bde3c7682ec7b1bce99cc8be5 (patch)
tree6b21f95ae16d16e26ed774ccccacf222b4911316
parentd3ef1af6fdb67705d4569ac4b6ee11d91f6ab794 (diff)
drm/i915: re-use computed offset bias for context pin
The context has to obey the same offset requirements as the ring, so we can re-use the same bias value we computed for the ring instead of unconditionally using GUC_WOPCM_TOP. Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/1482537382-28584-2-git-send-email-daniele.ceraolospurio@intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-rw-r--r--drivers/gpu/drm/i915/intel_lrc.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index cec9037baf65..fc64be1bdea7 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -782,7 +782,9 @@ static int execlists_context_pin(struct intel_engine_cs *engine,
goto err;
}
- flags = PIN_OFFSET_BIAS | GUC_WOPCM_TOP | PIN_GLOBAL;
+ flags = PIN_GLOBAL;
+ if (ctx->ggtt_offset_bias)
+ flags |= PIN_OFFSET_BIAS | ctx->ggtt_offset_bias;
if (ctx == ctx->i915->kernel_context)
flags |= PIN_HIGH;