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authorGeorge Cherian <george.cherian@ti.com>2014-03-19 15:40:00 +0530
committerTony Lindgren <tony@atomide.com>2014-05-06 10:19:49 -0700
commiteac1cd3bd6a619e842e7a58bc0845d222627e9ed (patch)
treea91c6264e2372dd23d96da9b210d120a34643158 /arch
parent08593fa6e4424d077ef0b02ecff77428a9f4ac00 (diff)
ARM: dts: am43xx clock data
Add USB and USB PHY reference clock data Signed-off-by: George Cherian <george.cherian@ti.com> Acked-by: Roger Quadros <rogerq@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> [tony@atomide.com: tabified] Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/am43xx-clocks.dtsi32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi b/arch/arm/boot/dts/am43xx-clocks.dtsi
index 142009cc9332..775d5b103992 100644
--- a/arch/arm/boot/dts/am43xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am43xx-clocks.dtsi
@@ -653,4 +653,36 @@
clocks = <&clk_32768_ck>, <&clk_32k_tpm_ck>;
reg = <0x4260>;
};
+
+ usb_phy0_always_on_clk32k: usb_phy0_always_on_clk32k {
+ #clock-cells = <0>;
+ compatible = "ti,gate-clock";
+ clocks = <&usbphy_32khz_clkmux>;
+ ti,bit-shift = <8>;
+ reg = <0x2a40>;
+ };
+
+ usb_phy1_always_on_clk32k: usb_phy1_always_on_clk32k {
+ #clock-cells = <0>;
+ compatible = "ti,gate-clock";
+ clocks = <&usbphy_32khz_clkmux>;
+ ti,bit-shift = <8>;
+ reg = <0x2a48>;
+ };
+
+ usb_otg_ss0_refclk960m: usb_otg_ss0_refclk960m {
+ #clock-cells = <0>;
+ compatible = "ti,gate-clock";
+ clocks = <&dpll_per_clkdcoldo>;
+ ti,bit-shift = <8>;
+ reg = <0x8a60>;
+ };
+
+ usb_otg_ss1_refclk960m: usb_otg_ss1_refclk960m {
+ #clock-cells = <0>;
+ compatible = "ti,gate-clock";
+ clocks = <&dpll_per_clkdcoldo>;
+ ti,bit-shift = <8>;
+ reg = <0x8a68>;
+ };
};