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2012-05-13Merge tag 'for-linus-3.4-20120513' of git://git.infradead.org/linux-mtdLinus Torvalds1-11/+6
Pull three MTD fixes from David Woodhouse: - Fix a lock ordering deadlock in JFFS2 - Fix an oops in the dataflash driver, triggered by a dummy call to test whether it has OTP functionality. - Fix request_mem_region() failure on amsdelta NAND driver. * tag 'for-linus-3.4-20120513' of git://git.infradead.org/linux-mtd: mtd: ams-delta: fix request_mem_region() failure jffs2: Fix lock acquisition order bug in gc path mtd: fix oops in dataflash driver
2012-05-08mtd: ams-delta: fix request_mem_region() failureJanusz Krzysztofik1-11/+6
A call to request_mem_region() has been introduced in the omap-gpio driver recently (commit 96751fcbe5438e95514b025e9cee7a6d38038f40, "gpio/omap: Use devm_ API and add request_mem_region"). This change prevented the Amstrad Delta NAND driver, which was doing the same in order to take control over OMAP MPU I/O lines that the NAND device hangs off, from loading successfully. The I/O lines and corresponding registers used by the NAND driver are a subset of those used for the GPIO function. Then, to avoid run time collisions, all MPUIO GPIO lines should be marked as requested while initializing the NAND driver, and vice versa, a single MPUIO GPIO line already requested before the NAND driver initialization is attempted should prevent the NAND device from being started successfully. There is another driver, omap-keypad, which also manipulates MPUIO registers, but has never been calling request_mem_region() on startup, so it's not affected by the change in the gpio-omap and works correctly. It uses the depreciated omap_read/write functions for accessing MPUIO registers. Unlike the NAND driver, these I/O lines and registers are separate from those used by the GPIO driver. However, both register sets are non-contiguous and overlapping, so it would be impractical to request the two sets separately, one from the gpio-omap, the other form the omap-keypad driver. In order to solve all these issues correctly, a solution first suggested by Artem Bityutskiy, then closer specified by Tony Lindgren while they commented the initial version of this fix, should be implemented. The gpio-omap driver should export a few functions which would allow the other two drivers to access MPUIO registers in a safe manner instead of trying to manage them in parallel to the GPIO driver. However, such a big change, affecting 3 drivers all together, is not suitable for the rc cycle, and should be prepared for the merge window. Then, an alternative solution is proposed as a regression fix. For the ams-delta NAND driver to initialize correctly in coexistence with the changed GPIO driver, drop the request_mem_region() call from the former, especially as this call is going to be removed while the long-term solution is implemented. Tested on Amstrad Delta. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-04-20dma: mxs-dma: enable channel in device_issue_pending callShawn Guo1-0/+1
Enable channel in device_issue_pending call, so that the order between cookie assignment and channel enabling can be ensured naturally. It fixes the mxs gpmi-nand breakage which is caused by the incorrect order of cookie assigning and channel enabling. Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Huang Shijie <b32955@freescale.com> Tested-by <samgandhi9@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-03-30Merge tag 'for-linus-3.4' of git://git.infradead.org/mtd-2.6Linus Torvalds35-432/+2366
Pull MTD changes from David Woodhouse: - Artem's cleanup of the MTD API continues apace. - Fixes and improvements for ST FSMC and SuperH FLCTL NAND, amongst others. - More work on DiskOnChip G3, new driver for DiskOnChip G4. - Clean up debug/warning printks in JFFS2 to use pr_<level>. Fix up various trivial conflicts, largely due to changes in calling conventions for things like dmaengine_prep_slave_sg() (new inline wrapper to hide new parameter, clashing with rewrite of previously last parameter that used to be an 'append' flag, and is now a bitmap of 'unsigned long flags'). (Also some header file fallout - like so many merges this merge window - and silly conflicts with sparse fixes) * tag 'for-linus-3.4' of git://git.infradead.org/mtd-2.6: (120 commits) mtd: docg3 add protection against concurrency mtd: docg3 refactor cascade floors structure mtd: docg3 increase write/erase timeout mtd: docg3 fix inbound calculations mtd: nand: gpmi: fix function annotations mtd: phram: fix section mismatch for phram_setup mtd: unify initialization of erase_info->fail_addr mtd: support ONFI multi lun NAND mtd: sm_ftl: fix typo in major number. mtd: add device-tree support to spear_smi mtd: spear_smi: Remove default partition information from driver mtd: Add device-tree support to fsmc_nand mtd: fix section mismatch for doc_probe_device mtd: nand/fsmc: Remove sparse warnings and errors mtd: nand/fsmc: Add DMA support mtd: nand/fsmc: Access the NAND device word by word whenever possible mtd: nand/fsmc: Use dev_err to report error scenario mtd: nand/fsmc: Use devm routines mtd: nand/fsmc: Modify fsmc driver to accept nand timing parameters via platform mtd: fsmc_nand: add pm callbacks to support hibernation ...
2012-03-29Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds1-14/+11
Pull slave-dmaengine update from Vinod Koul: "This includes the cookie cleanup by Russell, the addition of context parameter for dmaengine APIs, more arm dmaengine driver cleanup by moving code to dmaengine, this time for imx by Javier and pl330 by Boojin along with the usual driver fixes." Fix up some fairly trivial conflicts with various other cleanups. * 'next' of git://git.infradead.org/users/vkoul/slave-dma: (67 commits) dmaengine: imx: fix the build failure on x86_64 dmaengine: i.MX: Fix merge of cookie branch. dmaengine: i.MX: Add support for interleaved transfers. dmaengine: imx-dma: use 'dev_dbg' and 'dev_warn' for messages. dmaengine: imx-dma: remove 'imx_dmav1_baseaddr' and 'dma_clk'. dmaengine: imx-dma: remove unused arg of imxdma_sg_next. dmaengine: imx-dma: remove internal structure. dmaengine: imx-dma: remove 'resbytes' field of 'internal' structure. dmaengine: imx-dma: remove 'in_use' field of 'internal' structure. dmaengine: imx-dma: remove sg member from internal structure. dmaengine: imx-dma: remove 'imxdma_setup_sg_hw' function. dmaengine: imx-dma: remove 'imxdma_config_channel_hw' function. dmaengine: imx-dma: remove 'imxdma_setup_mem2mem_hw' function. dmaengine: imx-dma: remove dma_mode member of internal structure. dmaengine: imx-dma: remove data member from internal structure. dmaengine: imx-dma: merge old dma-v1.c with imx-dma.c dmaengine: at_hdmac: add slave config operation dmaengine: add context parameter to prep_slave_sg and prep_dma_cyclic dmaengine/dma_slave: introduce inline wrappers dma: imx-sdma: Treat firmware messages as warnings instead of erros ...
2012-03-28Merge tag 'split-asm_system_h-for-linus-20120328' of ↵Linus Torvalds1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-asm_system Pull "Disintegrate and delete asm/system.h" from David Howells: "Here are a bunch of patches to disintegrate asm/system.h into a set of separate bits to relieve the problem of circular inclusion dependencies. I've built all the working defconfigs from all the arches that I can and made sure that they don't break. The reason for these patches is that I recently encountered a circular dependency problem that came about when I produced some patches to optimise get_order() by rewriting it to use ilog2(). This uses bitops - and on the SH arch asm/bitops.h drags in asm-generic/get_order.h by a circuituous route involving asm/system.h. The main difficulty seems to be asm/system.h. It holds a number of low level bits with no/few dependencies that are commonly used (eg. memory barriers) and a number of bits with more dependencies that aren't used in many places (eg. switch_to()). These patches break asm/system.h up into the following core pieces: (1) asm/barrier.h Move memory barriers here. This already done for MIPS and Alpha. (2) asm/switch_to.h Move switch_to() and related stuff here. (3) asm/exec.h Move arch_align_stack() here. Other process execution related bits could perhaps go here from asm/processor.h. (4) asm/cmpxchg.h Move xchg() and cmpxchg() here as they're full word atomic ops and frequently used by atomic_xchg() and atomic_cmpxchg(). (5) asm/bug.h Move die() and related bits. (6) asm/auxvec.h Move AT_VECTOR_SIZE_ARCH here. Other arch headers are created as needed on a per-arch basis." Fixed up some conflicts from other header file cleanups and moving code around that has happened in the meantime, so David's testing is somewhat weakened by that. We'll find out anything that got broken and fix it.. * tag 'split-asm_system_h-for-linus-20120328' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-asm_system: (38 commits) Delete all instances of asm/system.h Remove all #inclusions of asm/system.h Add #includes needed to permit the removal of asm/system.h Move all declarations of free_initmem() to linux/mm.h Disintegrate asm/system.h for OpenRISC Split arch_align_stack() out from asm-generic/system.h Split the switch_to() wrapper out of asm-generic/system.h Move the asm-generic/system.h xchg() implementation to asm-generic/cmpxchg.h Create asm-generic/barrier.h Make asm-generic/cmpxchg.h #include asm-generic/cmpxchg-local.h Disintegrate asm/system.h for Xtensa Disintegrate asm/system.h for Unicore32 [based on ver #3, changed by gxt] Disintegrate asm/system.h for Tile Disintegrate asm/system.h for Sparc Disintegrate asm/system.h for SH Disintegrate asm/system.h for Score Disintegrate asm/system.h for S390 Disintegrate asm/system.h for PowerPC Disintegrate asm/system.h for PA-RISC Disintegrate asm/system.h for MN10300 ...
2012-03-28Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-38/+98
Pull "ARM: More device tree support updates" from Olof Johansson: "This branch contains a number of updates for device tree support on several ARM platforms, in particular: * AT91 continues the device tree conversion adding support for a number of on-chip drivers and other functionality * ux500 adds probing of some of the core SoC blocks through device tree * Initial device tree support for ST SPEAr600 platforms * kirkwood continues the conversion to device-tree probing" Manually merge arch/arm/mach-ux500/Kconfig due to MACH_U8500 rename, and drivers/usb/gadget/at91_udc.c due to header file include cleanups. Also do an "evil merge" for the MACH_U8500 config option rename that the affected RMI4 touchscreen driver in staging. It's called MACH_MOP500 now, and it was missed during previous merges. * tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits) ARM: SPEAr600: Add device-tree support to SPEAr600 boards ARM: ux500: Provide local timer support for Device Tree ARM: ux500: Enable PL022 SSP Controller in Device Tree ARM: ux500: Enable PL310 Level 2 Cache Controller in Device Tree ARM: ux500: Enable PL011 AMBA UART Controller for Device Tree ARM: ux500: Enable Cortex-A9 GIC (Generic Interrupt Controller) in Device Tree ARM: ux500: db8500: list most devices in the snowball device tree ARM: ux500: split dts file for snowball into generic part ARM: ux500: combine the board init functions for DT boot ARM: ux500: Initial Device Tree support for Snowball ARM: ux500: CONFIG: Enable Device Tree support for future endeavours ARM: kirkwood: use devicetree for rtc-mv ARM: kirkwood: rtc-mv devicetree bindings ARM: kirkwood: fdt: define uart[01] as disabled, enable uart0 ARM: kirkwood: fdt: facilitate new boards during fdt migration ARM: kirkwood: fdt: absorb kirkwood_init() ARM: kirkwood: fdt: use mrvl ticker symbol ARM: orion: wdt: use resource vice direct access ARM: Kirkwood: Remove tclk from kirkwood_asoc_platform_data. ARM: orion: spi: remove enable_clock_fix which is not used ...
2012-03-28Remove all #inclusions of asm/system.hDavid Howells1-1/+0
Remove all #inclusions of asm/system.h preparatory to splitting and killing it. Performed with the following command: perl -p -i -e 's!^#\s*include\s*<asm/system[.]h>.*\n!!' `grep -Irl '^#\s*include\s*<asm/system[.]h>' *` Signed-off-by: David Howells <dhowells@redhat.com>
2012-03-27Merge branch 'for-linus-3.4-rc1' of ↵Linus Torvalds1-0/+2
git://git.kernel.org/pub/scm/linux/kernel/git/rw/uml Pull UML changes from Richard Weinberger: "Mostly bug fixes and cleanups" * 'for-linus-3.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/uml: (35 commits) um: Update defconfig um: Switch to large mcmodel on x86_64 MTD: Relax dependencies um: Wire CONFIG_GENERIC_IO up um: Serve io_remap_pfn_range() Introduce CONFIG_GENERIC_IO um: allow SUBARCH=x86 um: most of the SUBARCH uses can be killed um: deadlock in line_write_interrupt() um: don't bother trying to rebuild CHECKFLAGS for USER_OBJS um: use the right ifdef around exports in user_syms.c um: a bunch of headers can be killed by using generic-y um: ptrace-generic.h doesn't need user.h um: kill HOST_TASK_PID um: remove pointless include of asm/fixmap.h from asm/pgtable.h um: asm-offsets.h might as well come from underlying arch... um: merge processor_{32,64}.h a bit... um: switch close_chan() to struct line um: race fix: initialize delayed_work *before* registering IRQ um: line->have_irq is never checked... ...
2012-03-27Merge tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-22/+52
Pull "ARM: board specific updates" from Arnd Bergmann/Olof Johansson: "These changes are all specific to one board only. We're trying to keep the number of board files low, but generally board level updates are ok on platforms that are working on moving towards DT based probing, which will eventually lead to removing them. The board-ams-delta.c board file gets a conflict between the removal of ams_delta_config and the addition of a lot of other data. The Kconfig file has two changes in the same line, and in exynos, the power domain cleanup conflicts with the addition of the image sensor device. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [olof: Amended a fix for a mismerge to board-omap4panda.c] Signed-off-by: Olof Johansson <olof@lixom.net>" Fixed up some fairly trivial conflicts manually. * tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (82 commits) i.MX35-PDK: Add Camera support ARM : mx35: 3ds-board: add framebuffer device pxa/hx4700: Remove pcmcia platform_device structure ARM: pxa/hx4700: Reduce sleep mode battery discharge by 35% ARM: pxa/hx4700: Remove unwanted request for GPIO105 ARM: EXYNOS: support Exynos4210-bus Devfreq driver on Nuri board ARM: EXYNOS: Register JPEG on nuri ARM: EXYNOS: Register JPEG on universal_c210 ARM: S5PV210: Enable JPEG on SMDKV210 ARM: S5PV210: Add JPEG board definition ARM: EXYNOS: Enable JPEG on Origen ARM: EXYNOS: Enable JPEG on SMDKV310 ARM: EXYNOS: Add __init attribute to universal_camera_init() ARM: EXYNOS: Add __init attribute to nuri_camera_init() ARM: S5PV210: Enable FIMC on SMDKC110 ARM: S5PV210: Enable FIMC on SMDKV210 ARM: S5PV210: Enable MFC on SMDKC110 ARM: S5PV210: Enable MFC on SMDKV210 ARM: EXYNOS: Enable G2D on SMDKV310 ARM: tegra: update defconfig ...
2012-03-27Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-1/+1
Pull "ARM: global cleanups" from Arnd Bergmann: "Quite a bit of code gets removed, and some stuff moved around, mostly the old samsung s3c24xx stuff. There should be no functional changes in this series otherwise. Some cleanups have dependencies on other arm-soc branches and will be sent in the second round. Signed-off-by: Arnd Bergmann <arnd@arndb.de>" Fixed up trivial conflicts mainly due to #include's being changes on both sides. * tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (121 commits) ep93xx: Remove unnecessary includes of ep93xx-regs.h ep93xx: Move EP93XX_SYSCON defines to SoC private header ep93xx: Move crunch code to mach-ep93xx directory ep93xx: Make syscon access functions private to SoC ep93xx: Configure GPIO ports in core code ep93xx: Move peripheral defines to local SoC header ep93xx: Convert the watchdog driver into a platform device. ep93xx: Use ioremap for backlight driver ep93xx: Move GPIO defines to gpio-ep93xx.h ep93xx: Don't use system controller defines in audio drivers ep93xx: Move PHYS_BASE defines to local SoC header file ARM: EXYNOS: Add clock register addresses for EXYNOS4X12 bus devfreq driver ARM: EXYNOS: add clock registers for exynos4x12-cpufreq PM / devfreq: update the name of EXYNOS clock registers that were omitted PM / devfreq: update the name of EXYNOS clock register ARM: EXYNOS: change the prefix S5P_ to EXYNOS4_ for clock ARM: EXYNOS: use static declaration on regarding clock ARM: EXYNOS: replace clock.c for other new EXYNOS SoCs ARM: OMAP2+: Fix build error after merge ARM: S3C24XX: remove call to s3c24xx_setup_clocks ...
2012-03-27mtd: nand: gpmi: fix function annotationsWolfram Sang1-6/+6
A lot of functions have been marked __devinit, but they shouldn't, because they are needed for bbt_scan. While I believe the whole MX23 handling should be done entirely different, I am missing the resources to fix it. So, let's have at least the annotations correct. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: unify initialization of erase_info->fail_addrShmulik Ladkani1-2/+0
Initialization of 'erase_info->fail_addr' to MTD_FAIL_ADDR_UNKNOWN prior erase operation is duplicated accross several MTD drivers, and also taken care of by some MTD users as well. Harmonize it: initialize 'fail_addr' within 'mtd_erase()' interface. Signed-off-by: Shmulik Ladkani <shmulik.ladkani@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: support ONFI multi lun NANDMatthieu CASTET1-1/+2
With onfi a flash is organized into one or more logical units (LUNs). A logical unit (LUN) is the minimum unit that can independently execute commands and report status. Mtd does not exploit LUN, so make it see a big single flash where size is lun_size * number_of_lun. Without this patch MT29F8G08ADBDAH4 size is 512MiB instead of 1GiB. Artem: split long line on 2 shorter ones. Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com> Acked-by: Florian Fainelli <ffainelli@freebox.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: Add device-tree support to fsmc_nandStefan Roese1-1/+56
This patch adds support to configure the FSMC NAND driver (used amongst others on SPEAr platforms) via device-tree instead of platform_data. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: nand/fsmc: Remove sparse warnings and errorsVipin Kumar1-46/+45
This patch removes the sparse below warnings and errors for nand/fsmc driver /root/vipin/spear/kernel/3.3/linux-3.3/drivers/mtd/nand/fsmc_nand.c:363:31: warning: incorrect type in initializer (different address spaces) /root/vipin/spear/kernel/3.3/linux-3.3/drivers/mtd/nand/fsmc_nand.c:363:31: expected struct fsmc_regs *regs /root/vipin/spear/kernel/3.3/linux-3.3/drivers/mtd/nand/fsmc_nand.c:363:31: got void [noderef] <asn:2>*regs_va [...] Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: nand/fsmc: Add DMA supportVipin Kumar1-5/+163
The fsmc_nand driver uses cpu to read/write onto the device. This is inefficient because of two reasons - the cpu gets locked on AHB bus while reading from NAND - the cpu is unnecessarily used when dma can do the job This patch adds the support for accessing the device through DMA Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: nand/fsmc: Access the NAND device word by word whenever possibleVipin Kumar1-0/+55
The default way of accessing nand device is using the nand width. This means that 8bit devices are using u8 * and 16bit devices are accessed using u16 *. This results in a non-optimal performance since the FSMC is designed to translate the normal word accesses into device width based accesses. This patch implements read_buf and write_buf callbacks using word by word accesses. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: nand/fsmc: Use dev_err to report error scenarioVipin Kumar1-0/+7
fsmc controller takes time to calculate the bch8 codes and the error offsets. The calculate logic checks for completion upto a timeout. This patch adds a error print when this timer expires and the ecc or error offsets are not yet calculated. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: nand/fsmc: Use devm routinesVipin Kumar1-91/+43
fsmc_nand driver currently uses normal kzalloc, request_mem etc routines. This patch replaces these routines with devm_kzalloc and devm_request_mem_region etc. Consequently, the error and driver removal scenarios are curtailed. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: nand/fsmc: Modify fsmc driver to accept nand timing parameters via platformVipin Kumar1-8/+33
FSMC controllers provide registers to program the required timing values for attached NAND device. The timing values used until now are relaxed and should work for all devices. Although, for read/write performance improvements, the fsmc nand driver should accept nand timings as a platform data and program the timing parameters into fsmc registers accordingly. This patch implements this modification. Additionally, it programs the default timing parameters if these are not passed via platform data. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: fsmc_nand: add pm callbacks to support hibernationShiraz Hashim1-6/+6
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: nand/fsmc: Initialize the badblockbits to 7Vipin Kumar1-0/+1
Ideally, the block should have 0xff written on the bad block position. Any value other than 0xff implies a bad block. In practical situations, there can be bit flips in the oob area as well which means that a block with 0x7f being read at bad block position may imply a bad block but it is infact only a bit flip in the bad block byte. To resolve this problem, the block is marked as good if number of high bits is greater than or equal to badblockbits (initialized to 7) Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: nand/fsmc: Flip the bit only if the error index is < 4096Vipin Kumar1-1/+1
ECC can correct up to 8 bits in 512 bytes data + 13 bytes ecc. This means that the algorithm can correct a max of 8 bits in 4200 bits ie the error indices can be from 0 to 4199. Of these 0 to 4095 are for data and 4096 to 4199 for ecc. The driver flips the bit only if the index is <= 4096. This is a bug since the data bits are only from 0 to 4095. This patch modifies the check as < 4096 Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: nand/fsmc: Read only 512 + 13 bytes for 8bit NAND devicesVipin Kumar1-1/+3
The ECC logic of FSMC works on 512 bytes data + 13 bytes ECC to generate error indices of up to 8 incorrect bits. The FSMC driver reads 14 instead of 13 oob bytes to accommodate for 16 bit device as well. Unfortunately, the internal ecc state machine gets corrupted for 8 bit devices reading 512 + 14 bytes of data resulting in error indices not getting reported. Fix this by reading 14 bytes only for 16 bit devices Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: nand/fsmc: Correct the multiline comment formatVipin Kumar1-4/+4
Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: nand/fsmc: Remove default partition information from driverArmando Visconti1-58/+0
Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: nand/fsmc: Pass partition information through platform dataVipin Kumar1-6/+7
This patch reimplements the passing of partition information through platform data. This was unintentionally deleted in commit 0d04eda1430e9a796214bee644b7e05d99cfe613 "mtd: fsmc_nand.c: use mtd_device_parse_register" Artem: fix gcc warning about passin 0 instead of NULL. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Cc: stable@kernel.org [3.2+] Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: gpmi: fix the wrong DMA command.Huang Shijie1-1/+2
The last DMA command of ECC read page is used to disable the BCH module. But the original code missed to set the pio[2] which is used to set the GPMI_HW_GPMI_ECCCTRL register. fix it now. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: flash drivers set ecc strengthMike Dunn25-1/+57
Flash device drivers initialize 'ecc_strength' in struct mtd_info, which is the maximum number of bit errors that can be corrected in one writesize region. Drivers using the nand interface intitialize 'strength' in struct nand_ecc_ctrl, which is the maximum number of bit errors that can be corrected in one ecc step. Nand infrastructure code translates this to 'ecc_strength'. Also for nand drivers, the nand infrastructure code sets ecc.strength for ecc modes NAND_ECC_SOFT, NAND_ECC_SOFT_BCH, and NAND_ECC_NONE. It is set in the driver for all other modes. Signed-off-by: Mike Dunn <mikedunn@newsguy.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: sh_flctl: Add power management with QoS requestBastian Hecht1-9/+42
Adds power management code with fine granularity. Every flash control command is enclosed by runtime_put()/get()s. To make sure that no overhead is generated by too frequent power state switches, a quality of service request is issued. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: do not use plain 0 as NULLArtem Bityutskiy19-48/+48
The first 3 arguments of 'mtd_device_parse_register()' are pointers, but many callers pass '0' instead of 'NULL'. Fix this globally. Thanks to coccinelle for making it easy to do with the following semantic patch: @@ expression mtd, types, parser_data, parts, nr_parts; @@ ( -mtd_device_parse_register(mtd, 0, parser_data, parts, nr_parts) +mtd_device_parse_register(mtd, NULL, parser_data, parts, nr_parts) | -mtd_device_parse_register(mtd, types, 0, parts, nr_parts) +mtd_device_parse_register(mtd, types, NULL, parts, nr_parts) | -mtd_device_parse_register(mtd, types, parser_data, 0, nr_parts) +mtd_device_parse_register(mtd, types, parser_data, NULL, nr_parts) ) Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: fsmc: Support of 224-bytes OOB area lengthArmando Visconti1-0/+40
The current patch is required to support EVALSPEAR1340CPU Revision 2 where a new (ONFI compliant) MT29F16G08 NAND flash from Micron is present. This NAND flash device defines a OOB area which is 224 bytes long (oobsize). Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: fsmc: Improve the fsmc_correct_data() routineArmando Visconti1-21/+17
This patch improves the error correction routine for bch8 - Loop only up to number of errors detected - Improve the error index calculation procedure Additionally, it also renames the "correct" routine to indicate that it is bch8 specific Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: fsmc: fixed data abort inside change_bit()Armando Visconti1-1/+1
Since change_bit() requires a (unsigned int *) as second arg, the correct definition of err_idx[] array declared as local variable of fsmc_correct_data() is the following: u32 err_idx[8]; Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: fsmc: use ALE and CLE offsets from platform dataShiraz Hashim1-4/+5
ALE and CLE offsets can be different on different devices. Let devices pass these offsets to the fsmc driver through platform data. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: fsmc_nand: ECC1 & ECC4 layout separated for different page sizesBhavna Yadav1-17/+159
ECC1 & ECC4 layout for NAND of different pages sizes for e.g. 512bytes, 2KiB, 4KiB and 8KiB are separated. Previously there existed one ECC4 layout for 2KiB & 4KiB page size due to which oob test module available in drivers/mtd/nand/test was failing. Signed-off-by: Bhavna Yadav <bhavna.yadav@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: fsmc: Newly erased page read algorithm implementedVipin Kumar1-4/+52
A newly erased page contains ff in data as well as spare area. While reading an erased page, the read out ecc from spare area does not match the ecc generated by fsmc ecc hardware accelerator. This is because ecc of data ff ff is not ff ff. This leads to errors when file system erases and reads back the pages to ensure consistency. This patch adds a software workaround to ensure that the ecc check is not performed for erased pages. This problem is solved by checking the number of bits (in 512 byte data + 13 byte ecc) which are 0. If these number of bits are less than 8, the page is considered erased and correction algorithm is not tried on that page Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: sh_flctl: Add FLHOLDCR registerBastian Hecht1-0/+3
Add a register used in new FLCTL hardware and a feature flag for it. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: sh_flctl: Use cached register value for FLCMNCRBastian Hecht1-15/+7
Instead of reading out the register, use a cached value. This will make way for a proper runtime power management implementation. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: sh_flctl: Implement NAND_CMD_RNDOUT commandBastian Hecht1-0/+16
Implements the command to seek and read in pages. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: sh_flctl: Expand the READID command to 8 bytesBastian Hecht1-3/+9
The nand base code wants to read out 8 bytes in the READID command. Reflect this in the driver code. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: sh_flctl: Reorder empty_fifo() callsBastian Hecht1-3/+2
Reorders the calls to make it a bit shorter and match the calling procedure displayed in the datasheet. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: change the location of the ONFI detected logHuang Shijie1-1/+1
Some strange nand chip(such as Hynix H27UBG8T2A) can pass the `ONFI` signature check. So the log can be printed out even it is not an ONFI nand indeed. Change this log to the end of the function. Print out the log only when we really detect an ONFI nand. Signed-off-by: Huang Shijie <b32955@freescale.com> Acked-by: Florian Fainelli <ffainelli@freebox.fr> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mxs-dma : rewrite the last parameter of mxs_dma_prep_slave_sg()Huang Shijie1-6/+13
[1] Background : The GPMI does ECC read page operation with a DMA chain consist of three DMA Command Structures. The middle one of the chain is used to enable the BCH, and read out the NAND page. The WAIT4END(wait for command end) is a comunication signal between the GPMI and MXS-DMA. [2] The current DMA code sets the WAIT4END bit at the last one, such as: +-----+ +-----+ +-----+ | cmd | ------------> | cmd | ------------------> | cmd | +-----+ +-----+ +-----+ ^ | | set WAIT4END here This chain works fine in the mx23/mx28. [3] But in the new GPMI version (used in MX50/MX60), the WAIT4END bit should be set not only at the last DMA Command Structure, but also at the middle one, such as: +-----+ +-----+ +-----+ | cmd | ------------> | cmd | ------------------> | cmd | +-----+ +-----+ +-----+ ^ ^ | | | | set WAIT4END here too set WAIT4END here If we do not set WAIT4END, the BCH maybe stalls in "ECC reading page" state. In the next ECC write page operation, a DMA-timeout occurs. This has been catched in the MX6Q board. [4] In order to fix the bug, rewrite the last parameter of mxs_dma_prep_slave_sg(), and use the dma_ctrl_flags: --------------------------------------------------------- DMA_PREP_INTERRUPT : append a new DMA Command Structrue. DMA_CTRL_ACK : set the WAIT4END bit for this DMA Command Structure. --------------------------------------------------------- [5] changes to the relative drivers: <1> For mxs-mmc driver, just use the new flags, do not change any logic. <2> For gpmi-nand driver, and use the new flags to set the DMA chain, especially for ecc read page. Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Huang Shijie <b32955@freescale.com> Acked-by: Vinod Koul <vinod.koul@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mxs-dma : move the mxs dma.h to a more common placeHuang Shijie1-1/+1
Move the header to a more common place. The mxs dma engine is not only used in mx23/mx28, but also used in mx50/mx6q. It will also be used in the future chips. Rename it to mxs-dma.h, and create a new folder include/linux/fsl/ to store the Freescale's header files. change mxs-dma driver, mxs-mmc driver, gpmi-nand driver, mxs-saif driver to the new header file. Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Huang Shijie <b32955@freescale.com> Acked-by: Vinod Koul <vinod.koul@linux.intel.com> Acked-by: Chris Ball <cjb@laptop.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: gpmi: fix compiler warningHuang Shijie1-1/+0
The gpmi driver selects the MTD_CMDLINE_PARTS directly. But we should not select a visible symbol. Just remove the select. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: move zero length verification to MTD API functionsArtem Bityutskiy1-10/+0
In many places in drivers we verify for the zero length, but this is very inconsistent across drivers. This is obviously the right thing to do, though. This patch moves the check to the MTD API functions instead and removes a lot of duplication. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Reviewed-by: Shmulik Ladkani <shmulik.ladkani@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: do not duplicate length and offset checks in driversArtem Bityutskiy1-28/+0
We already verify that offset and length are within the MTD device size in the MTD API functions. Let's remove the duplicated checks in drivers. This patch only affects the following API's: 'mtd_erase()' 'mtd_point()' 'mtd_unpoint()' 'mtd_get_unmapped_area()' 'mtd_read()' 'mtd_write()' 'mtd_panic_write()' 'mtd_lock()' 'mtd_unlock()' 'mtd_is_locked()' 'mtd_block_isbad()' 'mtd_block_markbad()' This patch adds a bit of noise by removing too sparse empty lines, but this is not too bad. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-03-27mtd: nand: write BBM to OOB even with flash-based BBTBrian Norris1-15/+31
Currently, the flash-based BBT implementation writes bad block data only to its flash-based table and not to the OOB marker area. Then, as new bad blocks are marked over time, the OOB markers become incomplete and the flash-based table becomes the only source of current bad block information. This becomes an obvious problem when, for example: * bootloader cannot read the flash-based BBT format * BBT is corrupted and the flash must be rescanned for bad blocks; we want to remember bad blocks that were marked from Linux So to keep the bad block markers in sync with the flash-based BBT, this patch changes the default so that we write bad block markers to the proper OOB area on each block in addition to flash-based BBT. Comments are updated, expanded, and/or relocated as necessary. The new flash-based BBT procedure for marking bad blocks: (1) erase the affected block, to allow OOB marker to be written cleanly (2) update in-memory BBT (3) write bad block marker to OOB area of affected block (4) update flash-based BBT Note that we retain the first error encountered in (3) or (4), finish the procedures, and dump the error in the end. This should handle power cuts gracefully enough. (1) and (2) are mostly harmless (note that (1) will not erase an already-recognized bad block). The OOB and BBT may be "out of sync" if we experience power loss bewteen (3) and (4), but we can reasonably expect that on next boot, subsequent I/O operations will discover that the block should be marked bad again, thus re-syncing the OOB and BBT. Note that this is a change from the previous default flash-based BBT behavior. If your system cannot support writing bad block markers to OOB, use the new NAND_BBT_NO_OOB_BBM option (in combination with NAND_BBT_USE_FLASH and NAND_BBT_NO_OOB). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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