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path: root/drivers/clk/zte/clk-zx296718.c
AgeCommit message (Expand)AuthorFilesLines
2017-08-30clk: zte: constify clk_div_tableArvind Yadav1-3/+3
2017-06-19clk: zx296718: export I2S mux clocksShawn Guo1-4/+4
2017-04-12clk: zte: Mark pll config tables as constStephen Boyd1-2/+2
2017-04-12clk: zte: add pll_vga clock for zx296718Shawn Guo1-0/+24
2017-04-12clk: zte: set CLK_SET_RATE_PARENT for a few zx296718 clocksShawn Guo1-3/+3
2017-02-10clk: zte: add i2s clocks for zx296718Baoyou Xie1-0/+4
2017-01-09clk: zte: add audio clocks for zx296718Jun Nie1-0/+127
2017-01-09clk: zx296718: do not panic on failureShawn Guo1-9/+18
2016-09-23clk: zx296718: register driver earlier with core_initcallShawn Guo1-1/+5
2016-09-16clk: zx: fix pointer case warningsArnd Bergmann1-10/+10
2016-09-16clk: zx296718: use builtin_platform_driver to simplify the codeWei Yongjun1-5/+1
2016-09-14clk: zx: register ZX296718 clocksJun Nie1-0/+924