From 4b1294f928d9396e45f62b1c306ac8bf9fae036b Mon Sep 17 00:00:00 2001 From: Eugene Surovegin Date: Tue, 5 Jul 2005 18:54:45 -0700 Subject: [PATCH] ppc32: explicitly disable 440GP IRQ compatibility mode in 440GX setup Add explicit disabling of 440GP IRQ compatibility mode when configuring 440GX interrupt controller. This helps when board firmware for some reason uses this compatibility mode and leaves it enabled. It breaks 440GX interrupt code because it assumes native 440GX IRQ mode. People seems to be continuously bitten by this. Signed-off-by: Eugene Surovegin Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/ppc/syslib/ppc4xx_pic.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/ppc/syslib/ppc4xx_pic.c') diff --git a/arch/ppc/syslib/ppc4xx_pic.c b/arch/ppc/syslib/ppc4xx_pic.c index 05686fa73545..40086212b9c3 100644 --- a/arch/ppc/syslib/ppc4xx_pic.c +++ b/arch/ppc/syslib/ppc4xx_pic.c @@ -110,6 +110,10 @@ static int ppc4xx_pic_get_irq(struct pt_regs *regs) static void __init ppc4xx_pic_impl_init(void) { +#if defined(CONFIG_440GX) + /* Disable 440GP compatibility mode if it was enabled in firmware */ + SDR_WRITE(DCRN_SDR_MFR, SDR_READ(DCRN_SDR_MFR) & ~DCRN_SDR_MFR_PCM); +#endif /* Configure Base UIC */ mtdcr(DCRN_UIC_CR(UICB), 0); mtdcr(DCRN_UIC_TR(UICB), 0); -- cgit v1.2.3