From 994c8c94b419e92a8d661f1fae760dc03e68b442 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Fri, 26 Jul 2013 10:17:54 -0300 Subject: ARM: mvebu: Remove the harcoded BootROM window allocation The address decoding window to access the BootROM should not be allocated programatically, but instead declared in the device tree. Signed-off-by: Ezequiel Garcia Tested-by: Andrew Lunn Tested-by: Sebastian Hesselbarth Signed-off-by: Jason Cooper --- arch/arm/mach-mvebu/platsmp.c | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-mvebu/platsmp.c') diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c index 93f2f3ab45f1..864bd83fa207 100644 --- a/arch/arm/mach-mvebu/platsmp.c +++ b/arch/arm/mach-mvebu/platsmp.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -29,6 +30,9 @@ #include "pmsu.h" #include "coherency.h" +#define AXP_BOOTROM_BASE 0xfff00000 +#define AXP_BOOTROM_SIZE 0x100000 + void __init set_secondary_cpus_clock(void) { int thiscpu; @@ -115,10 +119,29 @@ static void __init armada_xp_smp_init_cpus(void) void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus) { + struct device_node *node; + struct resource res; + int err; + set_secondary_cpus_clock(); flush_cache_all(); set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0); - mvebu_mbus_add_window("bootrom", 0xfff00000, SZ_1M); + + /* + * In order to boot the secondary CPUs we need to ensure + * the bootROM is mapped at the correct address. + */ + node = of_find_compatible_node(NULL, NULL, "marvell,bootrom"); + if (!node) + panic("Cannot find 'marvell,bootrom' compatible node"); + + err = of_address_to_resource(node, 0, &res); + if (err < 0) + panic("Cannot get 'bootrom' node address"); + + if (res.start != AXP_BOOTROM_BASE || + resource_size(&res) != AXP_BOOTROM_SIZE) + panic("The address for the BootROM is incorrect"); } struct smp_operations armada_xp_smp_ops __initdata = { -- cgit v1.2.3