From cb53c7fc2045503cb7be0b225babd529df4d8cd3 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Thu, 10 Mar 2016 22:38:02 +0100 Subject: ARM: dts: sun5i-a13-inet98v-rev2: Remove mmc2 node The sun5i-a13-inet98v-rev2 does not have an emmc, it uses nand, the mmc2 node in the dts comes from a copy and paste error from the utoo-p66 dts, remove it. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13-inet-98v-rev2.dts | 15 --------------- 1 file changed, 15 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun5i-a13-inet-98v-rev2.dts b/arch/arm/boot/dts/sun5i-a13-inet-98v-rev2.dts index 6fa54b661423..1b11ec95ae53 100644 --- a/arch/arm/boot/dts/sun5i-a13-inet-98v-rev2.dts +++ b/arch/arm/boot/dts/sun5i-a13-inet-98v-rev2.dts @@ -123,21 +123,6 @@ status = "okay"; }; -&mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_pins_a>; - vmmc-supply = <®_vcc3v3>; - bus-width = <8>; - non-removable; - status = "okay"; - - mmccard: mmccard@0 { - reg = <0>; - compatible = "mmc-card"; - broken-hpi; - }; -}; - &otg_sram { status = "okay"; }; -- cgit v1.2.3 From 163172c08af685667199c293b8dc66705eb7430c Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Thu, 10 Mar 2016 22:38:03 +0100 Subject: ARM: dts: sun5i-a13-empire-electronix-d709: Remove mmc2 node The empire-electronix-d709 does not have an emmc, it uses nand, the mmc2 node in the dts comes from a copy and paste error from the inet98fv2 dts, remove it. While at it also do s/inet98fv2/d709/ to fix some other copy/paste leftovers. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- .../arm/boot/dts/sun5i-a13-empire-electronix-d709.dts | 19 ++----------------- 1 file changed, 2 insertions(+), 17 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts b/arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts index 7fbb0b0558a9..6efbba6d40a9 100644 --- a/arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts +++ b/arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts @@ -123,7 +123,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_inet98fv2>; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_d709>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */ @@ -131,27 +131,12 @@ status = "okay"; }; -&mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_pins_a>; - vmmc-supply = <®_vcc3v3>; - bus-width = <8>; - non-removable; - status = "okay"; - - mmccard: mmccard@0 { - reg = <0>; - compatible = "mmc-card"; - broken-hpi; - }; -}; - &otg_sram { status = "okay"; }; &pio { - mmc0_cd_pin_inet98fv2: mmc0_cd_pin@0 { + mmc0_cd_pin_d709: mmc0_cd_pin@0 { allwinner,pins = "PG0"; allwinner,function = "gpio_in"; allwinner,drive = ; -- cgit v1.2.3 From daac65ce575d906af7b7e4e2f914a65890696c57 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Thu, 10 Mar 2016 22:38:04 +0100 Subject: ARM: dts: sun5i: Add dts for Difrence DIT4350 tablet The Difrnce dit4350 tablet is a tiny tablet with a 4.3" 16:9 480x272 LCD, A13 SoC, 512M RAM, 4G NAND, solomon systech ssd2532qn6 touchscreen at i2c1 address 0x48, Memsic MXC622X accelerometer at i2c1 address 0x15 and rtl8188etv wifi. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun5i-a13-difrnce-dit4350.dts | 226 ++++++++++++++++++++++++ 2 files changed, 227 insertions(+) create mode 100644 arch/arm/boot/dts/sun5i-a13-difrnce-dit4350.dts (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 95c1923ce6fa..a4e973b4efaf 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -660,6 +660,7 @@ dtb-$(CONFIG_MACH_SUN5I) += \ sun5i-a10s-olinuxino-micro.dtb \ sun5i-a10s-r7-tv-dongle.dtb \ sun5i-a10s-wobo-i5.dtb \ + sun5i-a13-difrnce-dit4350.dtb \ sun5i-a13-empire-electronix-d709.dtb \ sun5i-a13-hsg-h702.dtb \ sun5i-a13-inet-98v-rev2.dtb \ diff --git a/arch/arm/boot/dts/sun5i-a13-difrnce-dit4350.dts b/arch/arm/boot/dts/sun5i-a13-difrnce-dit4350.dts new file mode 100644 index 000000000000..6546fa02901d --- /dev/null +++ b/arch/arm/boot/dts/sun5i-a13-difrnce-dit4350.dts @@ -0,0 +1,226 @@ +/* + * Copyright 2016 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun5i-a13.dtsi" +#include "sunxi-common-regulators.dtsi" +#include +#include +#include +#include +#include + +/ { + model = "Difrnce DIT4350"; + compatible = "difrnce,dit4350", "allwinner,sun5i-a13"; + + aliases { + serial0 = &uart1; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; + default-brightness-level = <8>; + /* TODO: backlight uses axp gpio1 as enable pin */ + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&ehci0 { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp209: pmic@34 { + reg = <0x34>; + interrupts = <0>; + }; +}; + +#include "axp209.dtsi" + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; + + pcf8563: rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; +}; + +&lradc { + vref-supply = <®_ldo2>; + status = "okay"; + + button@200 { + label = "Volume Up"; + linux,code = ; + channel = <0>; + voltage = <200000>; + }; + + button@400 { + label = "Volume Down"; + linux,code = ; + channel = <0>; + voltage = <400000>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_d709>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */ + cd-inverted; + status = "okay"; +}; + +&otg_sram { + status = "okay"; +}; + +&pio { + mmc0_cd_pin_d709: mmc0_cd_pin@0 { + allwinner,pins = "PG0"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PG1"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PG2"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins>; + status = "okay"; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + regulator-name = "vdd-int-pll"; +}; + +®_ldo1 { + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +®_ldo3 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +®_usb0_vbus { + gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins_b>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb0_vbus_pin_a { + allwinner,pins = "PG12"; +}; + +&usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ + usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ + usb0_vbus-supply = <®_usb0_vbus>; + usb1_vbus-supply = <®_ldo3>; + status = "okay"; +}; -- cgit v1.2.3 From aab42cde173acb1c7fe3f53706bc720d1a41681b Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Wed, 9 Mar 2016 22:50:30 +0100 Subject: ARM: dts: sun6i: Add dts for colorfly e708 q1 tablet The colorfly e708 q1 is a 7" tablet which is clearly marked as colorfly e708 q1 on the back. It features a 9:16 800x1280 IPS LCD, A31s SoC, 1GB RAM, 8G NAND, ilitek 2139qt004 touchscreen on i2c-1 addr 0x41, stk8313 accelerometer on i2c-2 addr 0x22 and a rtl8188etv wifi chip. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun6i-a31s-colorfly-e708-q1.dts | 208 ++++++++++++++++++++++ 2 files changed, 209 insertions(+) create mode 100644 arch/arm/boot/dts/sun6i-a31s-colorfly-e708-q1.dts (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a4e973b4efaf..2c0801085515 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -676,6 +676,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \ sun6i-a31-i7.dtb \ sun6i-a31-m9.dtb \ sun6i-a31-mele-a1000g-quad.dtb \ + sun6i-a31s-colorfly-e708-q1.dtb \ sun6i-a31s-cs908.dtb \ sun6i-a31s-primo81.dtb \ sun6i-a31s-sina31s.dtb \ diff --git a/arch/arm/boot/dts/sun6i-a31s-colorfly-e708-q1.dts b/arch/arm/boot/dts/sun6i-a31s-colorfly-e708-q1.dts new file mode 100644 index 000000000000..e182eec6d878 --- /dev/null +++ b/arch/arm/boot/dts/sun6i-a31s-colorfly-e708-q1.dts @@ -0,0 +1,208 @@ +/* + * Copyright 2016 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun6i-a31s.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include +#include +#include + +/ { + model = "Colorfly E708 Q1 tablet"; + compatible = "colorfly,e708-q1", "allwinner,sun6i-a31s"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&cpu0 { + cpu-supply = <®_dcdc3>; +}; + +&ehci0 { + /* rtl8188etv wifi is connected here */ + status = "okay"; +}; + +&lradc { + vref-supply = <®_aldo3>; + status = "okay"; + + button@1000 { + label = "Home"; + linux,code = ; + channel = <0>; + voltage = <1000000>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_e708_q1>; + vmmc-supply = <®_dcdc1>; + bus-width = <4>; + cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ + cd-inverted; + status = "okay"; +}; + +&pio { + mma8452_int_e708_q1: mma8452_int_pin@0 { + allwinner,pins = "PA9"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + mmc0_cd_pin_e708_q1: mmc0_cd_pin@0 { + allwinner,pins = "PA8"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&p2wi { + status = "okay"; + + axp22x: pmic@68 { + compatible = "x-powers,axp221"; + reg = <0x68>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +#include "axp22x.dtsi" + +®_aldo3 { + regulator-always-on; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-name = "avcc"; +}; + +®_dc1sw { + regulator-name = "vcc-lcd"; +}; + +®_dc5ldo { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-cpus"; /* This is an educated guess */ +}; + +®_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-3v0"; +}; + +®_dcdc2 { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-gpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc4 { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-sys-dll"; +}; + +®_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +®_dldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +®_dldo2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pg"; +}; + +&simplefb_lcd { + vcc-lcd-supply = <®_dc1sw>; + vcc-pg-supply = <®_dldo2>; +}; + +/* + * FIXME for now we only support host mode and rely on u-boot to have + * turned on Vbus which is controlled by the axp221 pmic on the board. + * + * Once we have axp221 power-supply and vbus-usb support we should switch + * to fully supporting otg. + */ +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_dldo1>; + status = "okay"; +}; -- cgit v1.2.3 From a1162a917da256e752c2842b2f7950f98d8fab3f Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 13 Mar 2016 08:39:36 +0100 Subject: ARM: dts: sun8i: Add pmic nodes to sun8i-a23-gt90h-v4 Add nodes for the axp223 pmic and its regulators as found on a23-gt90h-v4 tablets. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts | 89 ++++++++++++++++++++++++++++++++ 1 file changed, 89 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts b/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts index 1aeb06c649b9..6a22ee3dcb55 100644 --- a/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts +++ b/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts @@ -123,12 +123,100 @@ }; }; +&r_rsb { + status = "okay"; + + axp22x: pmic@3a3 { + compatible = "x-powers,axp223"; + reg = <0x3a3>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + eldoin-supply = <®_dcdc1>; + }; +}; + &r_uart { pinctrl-names = "default"; pinctrl-0 = <&r_uart_pins_a>; status = "okay"; }; +#include "axp22x.dtsi" + +®_aldo1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-io"; +}; + +®_aldo2 { + regulator-always-on; + regulator-min-microvolt = <2350000>; + regulator-max-microvolt = <2650000>; + regulator-name = "vdd-dll"; +}; + +®_aldo3 { + regulator-always-on; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pll-avcc"; +}; + +®_dc1sw { + regulator-name = "vcc-lcd"; +}; + +®_dc5ldo { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpus"; +}; + +®_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-3v0"; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-sys"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +®_dldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +®_rtc_ldo { + regulator-name = "vcc-rtc"; +}; + +&simplefb_lcd { + vcc-lcd-supply = <®_dc1sw>; +}; + /* * FIXME for now we only support host mode and rely on u-boot to have * turned on Vbus which is controlled by the axp223 pmic on the board. @@ -141,5 +229,6 @@ }; &usbphy { + usb1_vbus-supply = <®_dldo1>; status = "okay"; }; -- cgit v1.2.3 From f7eda3d52b6215cb08535934eeba7b561076e09b Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 13 Mar 2016 08:39:37 +0100 Subject: ARM: dts: sun8i: Add backlight / pwm nodes to sun8i-a23-gt90h-v4 Add nodes for the backlight / pwm found on a23-gt90h-v4 tablets. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts b/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts index 6a22ee3dcb55..1be8d5f6134d 100644 --- a/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts +++ b/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts @@ -47,6 +47,7 @@ #include #include #include +#include / { model = "Allwinner GT90H Quad Core Tablet (v4)"; @@ -56,6 +57,16 @@ serial0 = &r_uart; }; + backlight: backlight { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&bl_en_pin_gt90h>; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; + default-brightness-level = <8>; + enable-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ + }; + chosen { stdout-path = "serial0:115200n8"; }; @@ -115,6 +126,13 @@ }; &pio { + bl_en_pin_gt90h: bl_en_pin@0 { + allwinner,pins = "PH6"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + mmc0_cd_pin_gt90h: mmc0_cd_pin@0 { allwinner,pins = "PB4"; allwinner,function = "gpio_in"; @@ -123,6 +141,12 @@ }; }; +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins>; + status = "okay"; +}; + &r_rsb { status = "okay"; -- cgit v1.2.3 From 388bc9a70fddef3102992d70d45e57e5b3beb496 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 14 Mar 2016 17:32:23 +0100 Subject: ARM: dts: sun8i: Fix wrong Quad core / a33 compat for sun8i-a23-gt90h-v4 As the dts file name already implies sun8i-a23-gt90h-v4.dts is for an a23 equipped tablet. I don't know how the "Quad Core" or a33 comaptible got in there, likely a copy and paste error. Regardless this commit fixes this, note this is almost purely a cosmetical fix, for all things that matter at the machine compatible level the a23 and a33 are compatible. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts b/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts index 1be8d5f6134d..1d68f5ce1890 100644 --- a/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts +++ b/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts @@ -50,8 +50,8 @@ #include / { - model = "Allwinner GT90H Quad Core Tablet (v4)"; - compatible = "allwinner,gt90h-v4", "allwinner,sun8i-a33"; + model = "Allwinner GT90H Dual Core Tablet (v4)"; + compatible = "allwinner,gt90h-v4", "allwinner,sun8i-a23"; aliases { serial0 = &r_uart; -- cgit v1.2.3 From cbed866e57bad958ccbf8ba2b13c987bd1167de3 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 14 Mar 2016 17:32:24 +0100 Subject: ARM: dts: sun8i: Fix regulator for mmc0 for sun8i-a23-gt90h-v4 Address the FIXME comment in sun8i-a23-gt90h-v4.dts now that we've proper regulator support. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts b/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts index 1d68f5ce1890..b2ce284a65a2 100644 --- a/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts +++ b/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts @@ -117,8 +117,7 @@ &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_gt90h>; - /* FIXME this really is aldo1, correct once we've pmic support */ - vmmc-supply = <®_vcc3v0>; + vmmc-supply = <®_aldo1>; bus-width = <4>; cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ cd-inverted; -- cgit v1.2.3 From 3dc2fdadf9d9183ada98c629abcf3d0807e42e54 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 14 Mar 2016 17:32:25 +0100 Subject: ARM: dts: sun8i: Add dts file for the Polaroid MID2809PXE4 tablet MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Polaroid MID2809PXE4 is a 9" tablet which is clearly marked Polaroid MID2809PXE4 on the back. It features a 9" 16:9 800x480 LCD, A23 Soc, 1GB RAM, 8GB NAND, gsl3670 touchscreen and esp8089 wifi. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts | 243 +++++++++++++++++++++ 2 files changed, 244 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 2c0801085515..64faed2e839e 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -709,6 +709,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-a23-gt90h-v4.dtb \ sun8i-a23-ippo-q8h-v5.dtb \ sun8i-a23-ippo-q8h-v1.2.dtb \ + sun8i-a23-polaroid-mid2809pxe04.dtb \ sun8i-a23-q8-tablet.dtb \ sun8i-a33-et-q8-v1.6.dtb \ sun8i-a33-ga10h-v1.1.dtb \ diff --git a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts new file mode 100644 index 000000000000..cb5daafcb7c2 --- /dev/null +++ b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts @@ -0,0 +1,243 @@ +/* + * Copyright 2016 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-a23.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include +#include +#include +#include + +/ { + model = "Polaroid MID2809PXE04 tablet"; + compatible = "polaroid,mid2809pxe04", "allwinner,sun8i-a23"; + + aliases { + serial0 = &r_uart; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&bl_en_pin_mid2809>; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; + default-brightness-level = <8>; + enable-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&lradc { + vref-supply = <®_vcc3v0>; + status = "okay"; + + button@200 { + label = "Volume Up"; + linux,code = ; + channel = <0>; + voltage = <200000>; + }; + + button@400 { + label = "Volume Down"; + linux,code = ; + channel = <0>; + voltage = <400000>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_mid2809>; + vmmc-supply = <®_dcdc1>; + bus-width = <4>; + cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ + cd-inverted; + status = "okay"; +}; + +&pio { + bl_en_pin_mid2809: bl_en_pin@0 { + allwinner,pins = "PH6"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + mmc0_cd_pin_mid2809: mmc0_cd_pin@0 { + allwinner,pins = "PB4"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins>; + status = "okay"; +}; + +&r_rsb { + status = "okay"; + + axp22x: pmic@3a3 { + compatible = "x-powers,axp223"; + reg = <0x3a3>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + eldoin-supply = <®_dcdc1>; + }; +}; + +&r_uart { + pinctrl-names = "default"; + pinctrl-0 = <&r_uart_pins_a>; + status = "okay"; +}; + +#include "axp22x.dtsi" + +®_aldo1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-io"; +}; + +®_aldo2 { + regulator-always-on; + regulator-min-microvolt = <2350000>; + regulator-max-microvolt = <2650000>; + regulator-name = "vdd-dll"; +}; + +®_aldo3 { + regulator-always-on; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pll-avcc"; +}; + +®_dc1sw { + regulator-name = "vcc-lcd"; +}; + +®_dc5ldo { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpus"; +}; + +®_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-3v0"; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-sys"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +®_rtc_ldo { + regulator-name = "vcc-rtc"; +}; + +&simplefb_lcd { + vcc-lcd-supply = <®_dc1sw>; +}; + +/* + * FIXME for now we only support host mode and rely on u-boot to have + * turned on Vbus which is controlled by the axp223 pmic on the board. + * + * Once we have axp223 support we should switch to fully supporting otg. + */ +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; -- cgit v1.2.3 From 80410d49f821447ee9955eb0417f295648158f3b Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 19 Mar 2016 08:53:52 +0100 Subject: ARM: dts: sun4i: Add dts file for Dserve DSRV9703C tablet The Dserve DSRV9703C is a 9.7" A10 tablet with a 1024x768 ips LCD, 1G RAM, 4GB flash, a Focaltech FT5406EE8 touchscreen and rtl8188ctv wifi. Signed-off-by: Hans de Goede Acked-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts | 281 +++++++++++++++++++++++ 2 files changed, 282 insertions(+) create mode 100644 arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 64faed2e839e..6ba68a2e7ce4 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -637,6 +637,7 @@ dtb-$(CONFIG_MACH_SUN4I) += \ sun4i-a10-ba10-tvbox.dtb \ sun4i-a10-chuwi-v7-cw0825.dtb \ sun4i-a10-cubieboard.dtb \ + sun4i-a10-dserve-dsrv9703c.dtb \ sun4i-a10-gemei-g9.dtb \ sun4i-a10-hackberry.dtb \ sun4i-a10-hyundai-a7hd.dtb \ diff --git a/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts b/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts new file mode 100644 index 000000000000..893497e397da --- /dev/null +++ b/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts @@ -0,0 +1,281 @@ +/* + * Copyright 2016 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" +#include +#include +#include +#include +#include + +/ { + model = "Dserve DSRV9703C"; + compatible = "dserve,dsrv9703c", "allwinner,sun4i-a10"; + + aliases { + serial0 = &uart0; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&bl_en_pin_dsrv9703c>; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; + default-brightness-level = <8>; + enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + haptics { + compatible = "regulator-haptic"; + haptic-supply = <®_motor>; + min-microvolt = <3000000>; + max-microvolt = <3000000>; + }; + + reg_motor: reg_motor { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&motor_pins>; + regulator-name = "vcc-motor"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + enable-active-high; + gpio = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ + }; +}; + +&codec { + pinctrl-names = "default"; + pinctrl-0 = <&codec_pa_pin>; + allwinner,pa-gpios = <&pio 7 15 GPIO_ACTIVE_HIGH>; /* PH15 */ + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&ehci1 { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp209: pmic@34 { + reg = <0x34>; + interrupts = <0>; + }; +}; + +#include "axp209.dtsi" + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + /* pull-ups and devices require AXP209 LDO3 */ + status = "failed"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + status = "okay"; + + ft5406ee8: touchscreen@38 { + compatible = "edt,edt-ft5406"; + reg = <0x38>; + interrupt-parent = <&pio>; + interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&touchscreen_pins>; + reset-gpios = <&pio 1 13 GPIO_ACTIVE_LOW>; + touchscreen-size-x = <1024>; + touchscreen-size-y = <768>; + }; +}; + +&lradc { + vref-supply = <®_ldo2>; + status = "okay"; + + button@400 { + label = "Volume Down"; + linux,code = ; + channel = <0>; + voltage = <400000>; + }; + + button@800 { + label = "Volume Up"; + linux,code = ; + channel = <0>; + voltage = <800000>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + cd-inverted; + status = "okay"; +}; + +&otg_sram { + status = "okay"; +}; + +&pio { + bl_en_pin_dsrv9703c: bl_en_pin@0 { + allwinner,pins = "PH7"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + + codec_pa_pin: codec_pa_pin@0 { + allwinner,pins = "PH15"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + + motor_pins: motor_pins@0 { + allwinner,pins = "PB3"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + + touchscreen_pins: touchscreen_pins@0 { + allwinner,pins = "PB13"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins_a>; + status = "okay"; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + regulator-name = "vdd-int-dll"; +}; + +®_ldo1 { + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +®_usb0_vbus { + status = "okay"; +}; + +®_usb2_vbus { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <®_usb0_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +}; -- cgit v1.2.3 From 9461faf20fdf037abc9c755cc5cc01a1fb56c7e1 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 20 Mar 2016 17:00:29 +0100 Subject: ARM: dts: sun8i: Add mmc2_8bit_pins to sun8i-h3.dtsi Add a pinctrl node for mmc2 in 8 bits mode on H3 SoCs. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-h3.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index dadb7f60c062..d1be2f54fb0d 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -417,6 +417,16 @@ allwinner,drive = ; allwinner,pull = ; }; + + mmc2_8bit_pins: mmc2_8bit { + allwinner,pins = "PC5", "PC6", "PC8", + "PC9", "PC10", "PC11", + "PC12", "PC13", "PC14", + "PC15", "PC16"; + allwinner,function = "mmc2"; + allwinner,drive = ; + allwinner,pull = ; + }; }; ahb_rst: reset@01c202c0 { -- cgit v1.2.3 From bc9aa43fa94b25b2cf31c5efd02e8b2d2322cdb3 Mon Sep 17 00:00:00 2001 From: Reinder de Haan Date: Sun, 20 Mar 2016 17:00:30 +0100 Subject: ARM: dts: sun8i: Add support for H3 usb clocks Add a node describing the usb-clks found on the H3. Signed-off-by: Reinder de Haan Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-h3.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index d1be2f54fb0d..3a2e6e2ae0bb 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -269,6 +269,18 @@ "mmc2_sample"; }; + usb_clk: clk@01c200cc { + #clock-cells = <1>; + #reset-cells = <1>; + compatible = "allwinner,sun8i-h3-usb-clk"; + reg = <0x01c200cc 0x4>; + clocks = <&osc24M>; + clock-output-names = "usb_phy0", "usb_phy1", + "usb_phy2", "usb_phy3", + "usb_ohci0", "usb_ohci1", + "usb_ohci2", "usb_ohci3"; + }; + mbus_clk: clk@01c2015c { #clock-cells = <0>; compatible = "allwinner,sun8i-a23-mbus-clk"; -- cgit v1.2.3 From 4cf9654eb568ac96817693d5f629100becbfa650 Mon Sep 17 00:00:00 2001 From: Reinder de Haan Date: Sun, 20 Mar 2016 17:00:31 +0100 Subject: ARM: dts: sun8i: Add usbphy and usb host controller nodes Add nodes describing the H3's usbphy and usb host controller nodes. Signed-off-by: Reinder de Haan Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-h3.dtsi | 101 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 101 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 3a2e6e2ae0bb..4a4926b0b0ed 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -389,6 +389,107 @@ #size-cells = <0>; }; + usbphy: phy@01c19400 { + compatible = "allwinner,sun8i-h3-usb-phy"; + reg = <0x01c19400 0x2c>, + <0x01c1a800 0x4>, + <0x01c1b800 0x4>, + <0x01c1c800 0x4>, + <0x01c1d800 0x4>; + reg-names = "phy_ctrl", + "pmu0", + "pmu1", + "pmu2", + "pmu3"; + clocks = <&usb_clk 8>, + <&usb_clk 9>, + <&usb_clk 10>, + <&usb_clk 11>; + clock-names = "usb0_phy", + "usb1_phy", + "usb2_phy", + "usb3_phy"; + resets = <&usb_clk 0>, + <&usb_clk 1>, + <&usb_clk 2>, + <&usb_clk 3>; + reset-names = "usb0_reset", + "usb1_reset", + "usb2_reset", + "usb3_reset"; + status = "disabled"; + #phy-cells = <1>; + }; + + ehci1: usb@01c1b000 { + compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; + reg = <0x01c1b000 0x100>; + interrupts = ; + clocks = <&bus_gates 25>, <&bus_gates 29>; + resets = <&ahb_rst 25>, <&ahb_rst 29>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci1: usb@01c1b400 { + compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; + reg = <0x01c1b400 0x100>; + interrupts = ; + clocks = <&bus_gates 29>, <&bus_gates 25>, + <&usb_clk 17>; + resets = <&ahb_rst 29>, <&ahb_rst 25>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ehci2: usb@01c1c000 { + compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; + reg = <0x01c1c000 0x100>; + interrupts = ; + clocks = <&bus_gates 26>, <&bus_gates 30>; + resets = <&ahb_rst 26>, <&ahb_rst 30>; + phys = <&usbphy 2>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci2: usb@01c1c400 { + compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; + reg = <0x01c1c400 0x100>; + interrupts = ; + clocks = <&bus_gates 30>, <&bus_gates 26>, + <&usb_clk 18>; + resets = <&ahb_rst 30>, <&ahb_rst 26>; + phys = <&usbphy 2>; + phy-names = "usb"; + status = "disabled"; + }; + + ehci3: usb@01c1d000 { + compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; + reg = <0x01c1d000 0x100>; + interrupts = ; + clocks = <&bus_gates 27>, <&bus_gates 31>; + resets = <&ahb_rst 27>, <&ahb_rst 31>; + phys = <&usbphy 3>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci3: usb@01c1d400 { + compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; + reg = <0x01c1d400 0x100>; + interrupts = ; + clocks = <&bus_gates 31>, <&bus_gates 27>, + <&usb_clk 19>; + resets = <&ahb_rst 31>, <&ahb_rst 27>; + phys = <&usbphy 3>; + phy-names = "usb"; + status = "disabled"; + }; + pio: pinctrl@01c20800 { compatible = "allwinner,sun8i-h3-pinctrl"; reg = <0x01c20800 0x400>; -- cgit v1.2.3 From c2da9e05afa775633c38307c2d1de5b785227ea2 Mon Sep 17 00:00:00 2001 From: Jens Kuske Date: Sun, 20 Mar 2016 17:00:32 +0100 Subject: ARM: dts: sun8i: Enable USB host controllers on Orangepi Plus boards Enable the 2 USB host controllers used on the Orange Pi Plus and add the necessary regulators. Signed-off-by: Reinder de Haan Signed-off-by: Hans de Goede Signed-off-by: Jens Kuske Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 44 ++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts index 79f40c3e6101..64aa8adbd632 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts @@ -90,6 +90,35 @@ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; }; }; + + reg_usb3_vbus: usb3-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&usb3_vbus_pin_a>; + regulator-name = "usb3-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + enable-active-high; + gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; + }; +}; + +&ehci1 { + status = "okay"; +}; + +&ehci3 { + status = "okay"; +}; + +&pio { + usb3_vbus_pin_a: usb3_vbus_pin@0 { + allwinner,pins = "PG11"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; }; &pio { @@ -127,8 +156,23 @@ status = "okay"; }; +®_usb1_vbus { + gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; status = "okay"; }; + +&usb1_vbus_pin_a { + allwinner,pins = "PG13"; +}; + +&usbphy { + usb1_vbus-supply = <®_usb1_vbus>; + usb3_vbus-supply = <®_usb3_vbus>; + status = "okay"; +}; -- cgit v1.2.3 From 99f9483ab475f735195f40f6cff46ba96cd89fc7 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 20 Mar 2016 17:00:33 +0100 Subject: ARM: dts: sun8i: Enable IR receiver on Orangepi Plus boards Enable the ir receiver found on the orangepi plus board. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts index 64aa8adbd632..ba7a959d304a 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts @@ -112,6 +112,12 @@ status = "okay"; }; +&ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + status = "okay"; +}; + &pio { usb3_vbus_pin_a: usb3_vbus_pin@0 { allwinner,pins = "PG11"; -- cgit v1.2.3 From 4bf89c1dc692ad58d774c88dcf8f7946759ab04d Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 20 Mar 2016 17:00:35 +0100 Subject: ARM: dts: sun8i: Add wifi dt node on Orangepi Plus boards The Orangepi Plus and Orangepi Plus 2 have a realtek rtl8189etv sdio wifi chip. This commit adds a device-tree node to power it up, so that the mmc subsys can scan it, and enables the mmc controller which is connected to it. Note that this just makes the wifi controller show up as a sdio device. In order for it to work a compatible sdio driver is necessary, an out of tree driver is available here: https://github.com/jwrdegoede/rtl8189ES_linux/ Binding the driver is not done through device tree, but through sdio vendor- and device-id, so it can safely be enabled in devicetree without having a driver upstream yet. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts index ba7a959d304a..c5c17bdf8542 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts @@ -102,6 +102,13 @@ enable-active-high; gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_pwrseq_pin_orangepi>; + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 WIFI_EN */ + }; }; &ehci1 { @@ -150,6 +157,13 @@ allwinner,drive = ; allwinner,pull = ; }; + + wifi_pwrseq_pin_orangepi: wifi_pwrseq_pin@0 { + allwinner,pins = "PL7"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; }; &mmc0 { @@ -162,6 +176,16 @@ status = "okay"; }; +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <®_vcc3v3>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; +}; + ®_usb1_vbus { gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>; status = "okay"; -- cgit v1.2.3 From 1bfbcfd1475886ef0f49ef99850b730873843124 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 20 Mar 2016 17:00:36 +0100 Subject: ARM: dts: sun8i: Add eMMC dt node on Orangepi Plus boards The Orangepi Plus has a 16GB eMMC, the vcc, the lack of pull-ups and the use of the hw-reset pin have all been verified with the board schematic. With this dts node for mmc2, the eMMC runs at the following ios settings: clock: 52000000 Hz vdd: 21 (3.3 ~ 3.4 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 3 (8 bits) timing spec: 8 (mmc DDR52) signal voltage: 0 (3.30 V) driver type: 0 (driver type B) Note the mmcblk1boot0/boot1 partitions are unused as the BROM will load the SPL from 8k from the start of the main blockdev, just as with a regular sdcard in mmc0. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts index c5c17bdf8542..6273ddfa8c8f 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts @@ -186,6 +186,23 @@ status = "okay"; }; +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; + vmmc-supply = <®_vcc3v3>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + status = "okay"; +}; + +&mmc2_8bit_pins { + /* Increase drive strength for DDR modes */ + allwinner,drive = ; + /* eMMC is missing pull-ups */ + allwinner,pull = ; +}; + ®_usb1_vbus { gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>; status = "okay"; -- cgit v1.2.3 From 79f969f08afe569d0705e509713bd2ce1f1062c4 Mon Sep 17 00:00:00 2001 From: Marcus Cooper Date: Mon, 21 Mar 2016 21:00:59 +0100 Subject: ARM: dts: sun4i: Add SPDIF TX pin to the A10 Add the SPDIF TX pin to the A10 dtsi. Signed-off-by: Marcus Cooper Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 2c8f5e6ad905..62fcef9b5eca 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -1006,6 +1006,13 @@ allwinner,drive = ; allwinner,pull = ; }; + + spdif_tx_pins_a: spdif@0 { + allwinner,pins = "PB13"; + allwinner,function = "spdif"; + allwinner,drive = ; + allwinner,pull = ; + }; }; timer@01c20c00 { -- cgit v1.2.3 From bdd08a84beafd21f3003af2b9e9c6496e701feef Mon Sep 17 00:00:00 2001 From: Marcus Cooper Date: Mon, 21 Mar 2016 21:01:00 +0100 Subject: ARM: dts: sun7i: Add SPDIF TX pin to the A20 Add the SPDIF TX pin to the A20 dtsi. Signed-off-by: Marcus Cooper Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 0940a788f824..0c207d00d6c2 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -1193,6 +1193,13 @@ allwinner,drive = ; allwinner,pull = ; }; + + spdif_tx_pins_a: spdif@0 { + allwinner,pins = "PB13"; + allwinner,function = "spdif"; + allwinner,drive = ; + allwinner,pull = ; + }; }; timer@01c20c00 { -- cgit v1.2.3 From 1010cd549974dcee5ee172bd878f989c521c409f Mon Sep 17 00:00:00 2001 From: Marcus Cooper Date: Mon, 21 Mar 2016 21:01:01 +0100 Subject: ARM: dts: sun4i: Add the SPDIF clk to the A10 Add the SPDIF clock to the A10 dtsi. Signed-off-by: Marcus Cooper Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 62fcef9b5eca..57475221b0e1 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -477,6 +477,17 @@ clock-output-names = "ir1"; }; + spdif_clk: clk@01c200c0 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod1-clk"; + reg = <0x01c200c0 0x4>; + clocks = <&pll2 SUN4I_A10_PLL2_8X>, + <&pll2 SUN4I_A10_PLL2_4X>, + <&pll2 SUN4I_A10_PLL2_2X>, + <&pll2 SUN4I_A10_PLL2_1X>; + clock-output-names = "spdif"; + }; + usb_clk: clk@01c200cc { #clock-cells = <1>; #reset-cells = <1>; -- cgit v1.2.3 From 90b7a48935421d4605a181ee49de03224b93c205 Mon Sep 17 00:00:00 2001 From: Marcus Cooper Date: Mon, 21 Mar 2016 21:01:02 +0100 Subject: ARM: dts: sun7i: Add the SPDIF clk to the A20 Add the SPDIF clock to the A20 dtsi. Signed-off-by: Marcus Cooper Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 0c207d00d6c2..108cad4fb1fb 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -476,6 +476,17 @@ clock-output-names = "ir1"; }; + spdif_clk: clk@01c200c0 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod1-clk"; + reg = <0x01c200c0 0x4>; + clocks = <&pll2 SUN4I_A10_PLL2_8X>, + <&pll2 SUN4I_A10_PLL2_4X>, + <&pll2 SUN4I_A10_PLL2_2X>, + <&pll2 SUN4I_A10_PLL2_1X>; + clock-output-names = "spdif"; + }; + keypad_clk: clk@01c200c4 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-mod0-clk"; -- cgit v1.2.3 From 166db83e0c127969f3e7acb0c9460251b107dc53 Mon Sep 17 00:00:00 2001 From: Marcus Cooper Date: Mon, 21 Mar 2016 21:01:03 +0100 Subject: ARM: dts: sun4i: Add the SPDIF block to the A10 Add the SPDIF transceiver controller block to the A10 dtsi. Signed-off-by: Marcus Cooper Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 57475221b0e1..7171a2712c8d 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -1052,6 +1052,19 @@ status = "disabled"; }; + spdif: spdif@01c21000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun4i-a10-spdif"; + reg = <0x01c21000 0x400>; + interrupts = <13>; + clocks = <&apb0_gates 1>, <&spdif_clk>; + clock-names = "apb", "spdif"; + dmas = <&dma SUN4I_DMA_NORMAL 2>, + <&dma SUN4I_DMA_NORMAL 2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + ir0: ir@01c21800 { compatible = "allwinner,sun4i-a10-ir"; clocks = <&apb0_gates 6>, <&ir0_clk>; -- cgit v1.2.3 From a34d6ce5eab955aa75232c151837e6e33cc8d5b6 Mon Sep 17 00:00:00 2001 From: Marcus Cooper Date: Mon, 21 Mar 2016 21:01:04 +0100 Subject: ARM: dts: sun7i: Add the SPDIF block to the A20 Add the SPDIF transceiver controller block to the A20 dtsi. Signed-off-by: Marcus Cooper Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 108cad4fb1fb..99444965f24e 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -1244,6 +1244,19 @@ status = "disabled"; }; + spdif: spdif@01c21000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun4i-a10-spdif"; + reg = <0x01c21000 0x400>; + interrupts = ; + clocks = <&apb0_gates 1>, <&spdif_clk>; + clock-names = "apb", "spdif"; + dmas = <&dma SUN4I_DMA_NORMAL 2>, + <&dma SUN4I_DMA_NORMAL 2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + ir0: ir@01c21800 { compatible = "allwinner,sun4i-a10-ir"; clocks = <&apb0_gates 6>, <&ir0_clk>; -- cgit v1.2.3 From 8bdc4a0d7bd292c9fd09274431b0d6466faa7e8f Mon Sep 17 00:00:00 2001 From: Marcus Cooper Date: Mon, 21 Mar 2016 21:01:05 +0100 Subject: ARM: dts: sun4i: Add SPDIF to the Mele A1000 Enable the S/PDIF transmitter that is present on the A1000. Signed-off-by: Marcus Cooper Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10-a1000.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts b/arch/arm/boot/dts/sun4i-a10-a1000.dts index 97570cb7f2fc..c92a1ae33a1e 100644 --- a/arch/arm/boot/dts/sun4i-a10-a1000.dts +++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts @@ -87,6 +87,24 @@ enable-active-high; gpio = <&pio 7 15 GPIO_ACTIVE_HIGH>; }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "On-board SPDIF"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + }; }; &ahci { @@ -188,6 +206,12 @@ status = "okay"; }; +&spdif { + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pins_a>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; -- cgit v1.2.3 From be0f167a85765e9f559785745d85364022b8395c Mon Sep 17 00:00:00 2001 From: Marcus Cooper Date: Mon, 21 Mar 2016 21:01:06 +0100 Subject: ARM: dts: sun7i: Add SPDIF to the Itead Ibox Enable the S/PDIF transmitter that is present on the Itead Ibox. Signed-off-by: Marcus Cooper Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20-itead-ibox.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun7i-a20-itead-ibox.dts b/arch/arm/boot/dts/sun7i-a20-itead-ibox.dts index 661c21d9bdbd..10d48cbf81ff 100644 --- a/arch/arm/boot/dts/sun7i-a20-itead-ibox.dts +++ b/arch/arm/boot/dts/sun7i-a20-itead-ibox.dts @@ -65,6 +65,24 @@ default-state = "on"; }; }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "On-board SPDIF"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + }; }; &ahci { @@ -123,3 +141,9 @@ ®_ahci_5v { status = "okay"; }; + +&spdif { + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pins_a>; + status = "okay"; +}; -- cgit v1.2.3 From 1813ac1abdc7360839c914a146a8ce5a25834f6c Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 22 Mar 2016 21:53:21 +0100 Subject: ARM: dts: sun8i: Fix pio nodes Orangepi Plus dts Fix sun8i-h3-orangepi-plus.dts: 1) Having 2 pio nodes, by merging these into one 2) Having the pio and r_pio nodes before the mmc nodes, while they should be sorted by alphabet Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 80 ++++++++++++++-------------- 1 file changed, 39 insertions(+), 41 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts index 6273ddfa8c8f..3d9996f1f947 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts @@ -125,47 +125,6 @@ status = "okay"; }; -&pio { - usb3_vbus_pin_a: usb3_vbus_pin@0 { - allwinner,pins = "PG11"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; -}; - -&pio { - leds_opc: led_pins@0 { - allwinner,pins = "PA15"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; -}; - -&r_pio { - leds_r_opc: led_pins@0 { - allwinner,pins = "PL10"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; - - sw_r_opc: key_pins@0 { - allwinner,pins = "PL03"; - allwinner,function = "gpio_in"; - allwinner,drive = ; - allwinner,pull = ; - }; - - wifi_pwrseq_pin_orangepi: wifi_pwrseq_pin@0 { - allwinner,pins = "PL7"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; -}; - &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; @@ -203,6 +162,45 @@ allwinner,pull = ; }; +&pio { + leds_opc: led_pins@0 { + allwinner,pins = "PA15"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb3_vbus_pin_a: usb3_vbus_pin@0 { + allwinner,pins = "PG11"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&r_pio { + leds_r_opc: led_pins@0 { + allwinner,pins = "PL10"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + + sw_r_opc: key_pins@0 { + allwinner,pins = "PL03"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + wifi_pwrseq_pin_orangepi: wifi_pwrseq_pin@0 { + allwinner,pins = "PL7"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + ®_usb1_vbus { gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>; status = "okay"; -- cgit v1.2.3 From 7b4fad5f22d54639c17d206b94dd1b245b22c494 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 22 Mar 2016 22:37:29 +0100 Subject: ARM: dts: sun8i: Add Orange Pi PC support The Orange Pi PC is an SBC based on the Allwinner H3 SoC with a uSD slot, 3 USB ports directly from the SoC, a 10/100M ethernet port using the SoC's integrated PHY, USB OTG, HDMI, a TRRS headphone jack for stereo out and composite out, a microphone, an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header, and a 40-pin GPIO header. Signed-off-by: Chen-Yu Tsai Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 167 +++++++++++++++++++++++++++++ 2 files changed, 168 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 6ba68a2e7ce4..5b72ff773729 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -719,6 +719,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-a33-sinlinx-sina33.dtb \ sun8i-a83t-allwinner-h8homlet-v2.dtb \ sun8i-a83t-cubietruck-plus.dtb \ + sun8i-h3-orangepi-pc.dtb \ sun8i-h3-orangepi-plus.dtb dtb-$(CONFIG_MACH_SUN9I) += \ sun9i-a80-optimus.dtb \ diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts new file mode 100644 index 000000000000..daf50b9a6657 --- /dev/null +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts @@ -0,0 +1,167 @@ +/* + * Copyright (C) 2015 Chen-Yu Tsai + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-h3.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include +#include +#include + +/ { + model = "Xunlong Orange Pi PC"; + compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&leds_opc>, <&leds_r_opc>; + + pwr_led { + label = "orangepi:green:pwr"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + status_led { + label = "orangepi:red:status"; + gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; + }; + }; + + r_gpio_keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&sw_r_opc>; + + sw4 { + label = "sw4"; + linux,code = ; + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&ehci1 { + status = "okay"; +}; + +&ehci2 { + status = "okay"; +}; + +&ehci3 { + status = "okay"; +}; + +&ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ + cd-inverted; + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&ohci2 { + status = "okay"; +}; + +&ohci3 { + status = "okay"; +}; + +&pio { + leds_opc: led_pins@0 { + allwinner,pins = "PA15"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&r_pio { + leds_r_opc: led_pins@0 { + allwinner,pins = "PL10"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + + sw_r_opc: key_pins@0 { + allwinner,pins = "PL3"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usbphy { + /* USB VBUS is always on */ + status = "okay"; +}; -- cgit v1.2.3 From c4392ef6c52506823e05d98b1a3ff73c85fed491 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Wed, 23 Mar 2016 11:17:05 +0100 Subject: ARM: dts: sun8i: Add dts for Orange Pi 2 SBC The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot, 4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI, a TRRS headphone jack for stereo out and composite out, a microphone, an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header and a 40-pin GPIO header. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 186 ++++++++++++++++++++++++++++++ 2 files changed, 187 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 5b72ff773729..9208da82459d 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -719,6 +719,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-a33-sinlinx-sina33.dtb \ sun8i-a83t-allwinner-h8homlet-v2.dtb \ sun8i-a83t-cubietruck-plus.dtb \ + sun8i-h3-orangepi-2.dtb \ sun8i-h3-orangepi-pc.dtb \ sun8i-h3-orangepi-plus.dtb dtb-$(CONFIG_MACH_SUN9I) += \ diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts new file mode 100644 index 000000000000..f93f5d1695c4 --- /dev/null +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts @@ -0,0 +1,186 @@ +/* + * Copyright (C) 2016 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-h3.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include +#include +#include + +/ { + model = "Xunlong Orange Pi 2"; + compatible = "xunlong,orangepi-2", "allwinner,sun8i-h3"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&leds_opc>, <&leds_r_opc>; + + status_led { + label = "orangepi:red:status"; + gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; + }; + + pwr_led { + label = "orangepi:green:pwr"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + }; + + r_gpio_keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&sw_r_opc>; + + sw2 { + label = "sw2"; + linux,code = ; + gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; + }; + + sw4 { + label = "sw4"; + linux,code = ; + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; + }; + }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_pwrseq_pin_orangepi>; + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 WIFI_EN */ + }; +}; + +&ehci1 { + status = "okay"; +}; + +&ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ + cd-inverted; + status = "okay"; +}; + +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <®_vcc3v3>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; +}; + +&pio { + leds_opc: led_pins@0 { + allwinner,pins = "PA15"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&r_pio { + leds_r_opc: led_pins@0 { + allwinner,pins = "PL10"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + + sw_r_opc: key_pins@0 { + allwinner,pins = "PL3", "PL4"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + wifi_pwrseq_pin_orangepi: wifi_pwrseq_pin@0 { + allwinner,pins = "PL7"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +®_usb1_vbus { + gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usb1_vbus_pin_a { + allwinner,pins = "PG13"; +}; + +&usbphy { + usb1_vbus-supply = <®_usb1_vbus>; + status = "okay"; +}; -- cgit v1.2.3 From cd544a8466506385dfa943f0f8bab89f82cf0bf0 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 22 Mar 2016 21:53:22 +0100 Subject: ARM: dts: sun8i: Orangepi plus gpio keys fixes and improvements Fix the following issues with the gpio_keys node: 1) Use of undocumented input-name property 2) Use of a unit-address on the sw2 node 3) Having "PL03" in the pinctrl node which does not exist, this should be "PL3" And add support for the sw2 button on the board. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts index 3d9996f1f947..94f8b0b834cd 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts @@ -79,12 +79,16 @@ r_gpio_keys { compatible = "gpio-keys"; - input-name = "sw4"; - pinctrl-names = "default"; pinctrl-0 = <&sw_r_opc>; - sw4@0 { + sw2 { + label = "sw2"; + linux,code = ; + gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; + }; + + sw4 { label = "sw4"; linux,code = ; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; @@ -187,7 +191,7 @@ }; sw_r_opc: key_pins@0 { - allwinner,pins = "PL03"; + allwinner,pins = "PL3", "PL4"; allwinner,function = "gpio_in"; allwinner,drive = ; allwinner,pull = ; -- cgit v1.2.3 From 0c1747a24855f6ce9668283be0b6839f4c0ab4cf Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Wed, 23 Mar 2016 23:14:16 +0100 Subject: ARM: dts: sun8i: Base Orange Pi Plus dts on the Orange Pi 2 dts The Orange Pi Plus really is an Orange Pi 2 extended with: 1) A sata <-> usb bridge connected to ehci3 2) An eMMC on mmc2 3) An external gigabit ethernet phy instead of the integrated 100Mbit phy This commit changes the dts to reflect this by making it include the Orange Pi 2 dts and then adding the extra bits. Note that the difference in ethernet phy is not taken into account because we do not have an ethernet driver for the H3 yet. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 136 +-------------------------- 1 file changed, 2 insertions(+), 134 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts index 94f8b0b834cd..b0cb41787e09 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts @@ -40,61 +40,13 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -/dts-v1/; -#include "sun8i-h3.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include -#include -#include +/* The Orange Pi Plus is an extended version of the Orange Pi 2 */ +#include "sun8i-h3-orangepi-2.dts" / { model = "Xunlong Orange Pi Plus"; compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3"; - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&leds_opc>, <&leds_r_opc>; - - status_led { - label = "orangepi-plus:red:status"; - gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; - }; - - pwr_led { - label = "orangepi-plus:green:pwr"; - gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; - }; - - r_gpio_keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&sw_r_opc>; - - sw2 { - label = "sw2"; - linux,code = ; - gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; - }; - - sw4 { - label = "sw4"; - linux,code = ; - gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; - }; - }; - reg_usb3_vbus: usb3-vbus { compatible = "regulator-fixed"; pinctrl-names = "default"; @@ -106,49 +58,12 @@ enable-active-high; gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; }; - - wifi_pwrseq: wifi_pwrseq { - compatible = "mmc-pwrseq-simple"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_pwrseq_pin_orangepi>; - reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 WIFI_EN */ - }; -}; - -&ehci1 { - status = "okay"; }; &ehci3 { status = "okay"; }; -&ir { - pinctrl-names = "default"; - pinctrl-0 = <&ir_pins_a>; - status = "okay"; -}; - -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ - cd-inverted; - status = "okay"; -}; - -&mmc1 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc1_pins_a>; - vmmc-supply = <®_vcc3v3>; - mmc-pwrseq = <&wifi_pwrseq>; - bus-width = <4>; - non-removable; - status = "okay"; -}; - &mmc2 { pinctrl-names = "default"; pinctrl-0 = <&mmc2_8bit_pins>; @@ -167,13 +82,6 @@ }; &pio { - leds_opc: led_pins@0 { - allwinner,pins = "PA15"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; - usb3_vbus_pin_a: usb3_vbus_pin@0 { allwinner,pins = "PG11"; allwinner,function = "gpio_out"; @@ -182,46 +90,6 @@ }; }; -&r_pio { - leds_r_opc: led_pins@0 { - allwinner,pins = "PL10"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; - - sw_r_opc: key_pins@0 { - allwinner,pins = "PL3", "PL4"; - allwinner,function = "gpio_in"; - allwinner,drive = ; - allwinner,pull = ; - }; - - wifi_pwrseq_pin_orangepi: wifi_pwrseq_pin@0 { - allwinner,pins = "PL7"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; -}; - -®_usb1_vbus { - gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; - status = "okay"; -}; - -&usb1_vbus_pin_a { - allwinner,pins = "PG13"; -}; - &usbphy { - usb1_vbus-supply = <®_usb1_vbus>; usb3_vbus-supply = <®_usb3_vbus>; - status = "okay"; }; -- cgit v1.2.3 From 59dbdd844a8b8e2d6793d3ee491da796752b97d5 Mon Sep 17 00:00:00 2001 From: JM Friedt Date: Thu, 24 Mar 2016 14:18:53 +0100 Subject: ARM: dts: sun5i-a13-olinuxino-micro: enable USB DRC Enable the OTG controller on the Olinuxino A13-micro. Signed-off-by: Jean-Michel Friedt Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts | 41 +++++++++++++++++++++++++ 1 file changed, 41 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts index ad84fe4276c9..081329e2b80b 100644 --- a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts @@ -109,6 +109,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { mmc0_cd_pin_olinuxinom: mmc0_cd_pin@0 { allwinner,pins = "PG0"; @@ -124,6 +128,27 @@ allwinner,pull = ; }; + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PG2"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PG1"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb0_vbus_pin_olinuxinom: usb0_vbus_pin@0 { + allwinner,pins = "PG12"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + usb1_vbus_pin_olinuxinom: usb1_vbus_pin@0 { allwinner,pins = "PG11"; allwinner,function = "gpio_out"; @@ -132,6 +157,12 @@ }; }; +®_usb0_vbus { + pinctrl-0 = <&usb0_vbus_pin_olinuxinom>; + gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + ®_usb1_vbus { pinctrl-0 = <&usb1_vbus_pin_olinuxinom>; gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; @@ -144,7 +175,17 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ + usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ + usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; status = "okay"; }; -- cgit v1.2.3 From bec38aaafd9ec1463dd3857f02bc029707e4213d Mon Sep 17 00:00:00 2001 From: Priit Laes Date: Thu, 24 Mar 2016 21:52:16 +0200 Subject: ARM: sun4i: dt: Enable dram gate 5 (tve0 clock) for simplefb TV output Seems like dram_gate 5 was forgotten when DRAM gate driver was added. Enable it. Cc: stable@vger.kernel.org Fixes: 82f8582feef4 (ARM: dts: sun4i: Add DRAM gates) Signed-off-by: Priit Laes Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 7171a2712c8d..268a1504d984 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -96,7 +96,7 @@ allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0"; clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>, <&ahb_gates 44>, <&ahb_gates 46>, - <&dram_gates 25>, <&dram_gates 26>; + <&dram_gates 5>, <&dram_gates 25>, <&dram_gates 26>; status = "disabled"; }; }; -- cgit v1.2.3 From 4b8ccef22fb547007ac38c4e5a28a773adee1e6e Mon Sep 17 00:00:00 2001 From: Priit Laes Date: Thu, 24 Mar 2016 21:52:17 +0200 Subject: ARM: sun7i: dt: Enable dram gate 5 (tve0 clock) for simplefb TV output Seems like dram_gate 5 was forgotten when DRAM gating driver was added. Add it. Cc: stable@vger.kernel.org Fixes: 0b4bf5a5200b (ARM: dts: sun7i: Add DRAM gates) Signed-off-by: Priit Laes Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 99444965f24e..bf5d05685d7d 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -85,8 +85,9 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-tve0"; - clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>, - <&ahb_gates 44>, <&dram_gates 26>; + clocks = <&pll5 1>, + <&ahb_gates 34>, <&ahb_gates 36>, <&ahb_gates 44>, + <&dram_gates 5>, <&dram_gates 26>; status = "disabled"; }; }; -- cgit v1.2.3 From 332868624c2b863e23bb192b0821605f5d0f084c Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 9 Apr 2016 15:22:41 +0200 Subject: ARM: dts: sun8i: Add dts file for the Orange Pi One SBC The Orange Pi One SBC, is a stripped down version of the popular Orange Pi PC. The one is a H3 based SBC, with 512M of RAM, micro-sd slot, 1 host usb, 1 otg usb, hdmi and 100Mbit ethernet. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 145 ++++++++++++++++++++++++++++ 2 files changed, 146 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 9208da82459d..e06a5abe86bc 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -720,6 +720,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-a83t-allwinner-h8homlet-v2.dtb \ sun8i-a83t-cubietruck-plus.dtb \ sun8i-h3-orangepi-2.dtb \ + sun8i-h3-orangepi-one.dtb \ sun8i-h3-orangepi-pc.dtb \ sun8i-h3-orangepi-plus.dtb dtb-$(CONFIG_MACH_SUN9I) += \ diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts new file mode 100644 index 000000000000..0adf932fd923 --- /dev/null +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts @@ -0,0 +1,145 @@ +/* + * Copyright (C) 2016 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-h3.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include +#include +#include + +/ { + model = "Xunlong Orange Pi One"; + compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&leds_opc>, <&leds_r_opc>; + + pwr_led { + label = "orangepi:green:pwr"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + status_led { + label = "orangepi:red:status"; + gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; + }; + }; + + r_gpio_keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&sw_r_opc>; + + sw4 { + label = "sw4"; + linux,code = ; + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&ehci1 { + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ + cd-inverted; + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pio { + leds_opc: led_pins@0 { + allwinner,pins = "PA15"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&r_pio { + leds_r_opc: led_pins@0 { + allwinner,pins = "PL10"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + + sw_r_opc: key_pins@0 { + allwinner,pins = "PL3"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usbphy { + /* USB VBUS is always on */ + status = "okay"; +}; -- cgit v1.2.3 From 096559107bedf337c407be038a1d7926e85d8842 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Wed, 23 Mar 2016 17:38:29 +0100 Subject: ARM: sun5i: dt: Add pll3 and pll7 clocks Enable the pll3 and pll7 clocks in the DT that are used to drive the display-related clocks. Signed-off-by: Maxime Ripard Acked-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i.dtsi | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index 59a9426e3bd4..0840612b5ed6 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -88,6 +88,15 @@ clock-output-names = "osc24M"; }; + osc3M: osc3M_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <8>; + clock-mult = <1>; + clocks = <&osc24M>; + clock-output-names = "osc3M"; + }; + osc32k: clk@0 { #clock-cells = <0>; compatible = "fixed-clock"; @@ -112,6 +121,23 @@ "pll2-4x", "pll2-8x"; }; + pll3: clk@01c20010 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-pll3-clk"; + reg = <0x01c20010 0x4>; + clocks = <&osc3M>; + clock-output-names = "pll3"; + }; + + pll3x2: pll3x2_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <2>; + clocks = <&pll3>; + clock-output-names = "pll3-2x"; + }; + pll4: clk@01c20018 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-pll1-clk"; @@ -136,6 +162,23 @@ clock-output-names = "pll6_sata", "pll6_other", "pll6"; }; + pll7: clk@01c20030 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-pll3-clk"; + reg = <0x01c20030 0x4>; + clocks = <&osc3M>; + clock-output-names = "pll7"; + }; + + pll7x2: pll7x2_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <2>; + clocks = <&pll7>; + clock-output-names = "pll7-2x"; + }; + /* dummy is 200M */ cpu: cpu@01c20054 { #clock-cells = <0>; -- cgit v1.2.3 From 15bd920f9670f7fe13cec9148e5c05d160c2f30c Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Wed, 23 Mar 2016 17:38:32 +0100 Subject: ARM: sun5i: Add TV encoder gate to the DTSI It turns out that the A13 / R8 also have a tve encoder block, and a gate for it. Add it to the DT. Signed-off-by: Maxime Ripard Acked-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index d910d3a6c41c..7bbeec9fae92 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -110,8 +110,8 @@ <10>, <13>, <14>, <20>, <21>, <22>, - <28>, <32>, <36>, - <40>, <44>, + <28>, <32>, <34>, + <36>, <40>, <44>, <46>, <51>, <52>; clock-output-names = "ahb_usbotg", "ahb_ehci", @@ -120,8 +120,8 @@ "ahb_mmc2", "ahb_nand", "ahb_sdram", "ahb_spi0", "ahb_spi1", "ahb_spi2", - "ahb_stimer", "ahb_ve", "ahb_lcd", - "ahb_csi", "ahb_de_be", + "ahb_stimer", "ahb_ve", "ahb_tve", + "ahb_lcd", "ahb_csi", "ahb_de_be", "ahb_de_fe", "ahb_iep", "ahb_mali400"; }; -- cgit v1.2.3 From 541ac1554e1269c4462a2166992d87b752abda64 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Wed, 23 Mar 2016 17:38:31 +0100 Subject: ARM: sun5i: Add DRAM gates The DRAM gates control whether the image / display devices on the SoC have access to the DRAM clock or not. Enable it. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13.dtsi | 23 ++++++++++++++++++++++- arch/arm/boot/dts/sun5i-r8.dtsi | 2 +- 2 files changed, 23 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index 7bbeec9fae92..39f23b1ebc8f 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -61,7 +61,8 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0"; - clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>; + clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>, + <&dram_gates 26>; status = "disabled"; }; }; @@ -149,6 +150,26 @@ "apb1_i2c2", "apb1_uart1", "apb1_uart3"; }; + + dram_gates: clk@01c20100 { + #clock-cells = <1>; + compatible = "allwinner,sun5i-a13-dram-gates-clk", + "allwinner,sun4i-a10-gates-clk"; + reg = <0x01c20100 0x4>; + clocks = <&pll5 0>; + clock-indices = <0>, + <1>, + <25>, + <26>, + <29>, + <31>; + clock-output-names = "dram_ve", + "dram_csi", + "dram_de_fe", + "dram_de_be", + "dram_ace", + "dram_iep"; + }; }; soc@01c00000 { diff --git a/arch/arm/boot/dts/sun5i-r8.dtsi b/arch/arm/boot/dts/sun5i-r8.dtsi index 0ef865601ac9..e346ba76db5d 100644 --- a/arch/arm/boot/dts/sun5i-r8.dtsi +++ b/arch/arm/boot/dts/sun5i-r8.dtsi @@ -52,7 +52,7 @@ "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-tve0"; clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>, - <&ahb_gates 44>; + <&ahb_gates 44>, <&dram_gates 26>; status = "disabled"; }; }; -- cgit v1.2.3 From b52e345d43cfe9214fecfa92375525a086d39581 Mon Sep 17 00:00:00 2001 From: Christopher Spinrath Date: Mon, 25 Apr 2016 01:02:58 +0200 Subject: ARM: dts: sun7i: Enable S/PDIF on the Cubietruck Enable the S/PDIF transmitter present on the Cubietruck. Signed-off-by: Christopher Spinrath Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts index 8da939ab8350..83f39b0362cb 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts @@ -94,6 +94,24 @@ pinctrl-0 = <&mmc3_pwrseq_pin_cubietruck>; reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */ }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "On-board SPDIF"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + }; }; &ahci { @@ -301,6 +319,12 @@ status = "okay"; }; +&spdif { + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pins_a>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; -- cgit v1.2.3