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2016-04-08Merge branches 'pm-core', 'powercap' and 'pm-tools'Rafael J. Wysocki1-10/+107
* pm-core: PM / wakeirq: fix wakeirq setting after wakup re-configuration from sysfs PM / runtime: Document steps for device removal * powercap: powercap: intel_rapl: Add missing Haswell model * pm-tools: tools/power turbostat: work around RC6 counter wrap tools/power turbostat: initial KBL support tools/power turbostat: initial SKX support tools/power turbostat: decode BXT TSC frequency via CPUID tools/power turbostat: initial BXT support tools/power turbostat: print IRTL MSRs tools/power turbostat: SGX state should print only if --debug
2016-04-07tools/power turbostat: work around RC6 counter wrapLen Brown1-4/+15
Sometimes the rc6 sysfs counter spontaneously resets, causing turbostat prints a very large number as it tries to calcuate % = 100 * (old - new) / interval When we see (old > new), print ***.**% instead of a bogus huge number. Note that this detection is not fool-proof, as the counter could reset several times and still result in new > old. Signed-off-by: Len Brown <len.brown@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-04-07tools/power turbostat: initial KBL supportLen Brown1-0/+14
KBL is similar to SKL Signed-off-by: Len Brown <len.brown@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-04-07tools/power turbostat: initial SKX supportLen Brown1-1/+8
SKX has a lot in common with HSX Signed-off-by: Len Brown <len.brown@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-04-07tools/power turbostat: decode BXT TSC frequency via CPUIDLen Brown1-1/+4
Hard-code BXT ART to 19200MHz, so turbostat --debug can fully enumerate TSC: CPUID(0x15): eax_crystal: 3 ebx_tsc: 186 ecx_crystal_hz: 0 TSC: 1190 MHz (19200000 Hz * 186 / 3 / 1000000) Signed-off-by: Len Brown <len.brown@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-04-07tools/power turbostat: initial BXT supportLen Brown1-0/+9
Broxton has a lot in common with SKL Signed-off-by: Len Brown <len.brown@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-04-07tools/power turbostat: print IRTL MSRsLen Brown1-3/+56
Some processors use the Interrupt Response Time Limit (IRTL) MSR value to describe the maximum IRQ response time latency for deep package C-states. (Though others have the register, but do not use it) Lets print it out to give insight into the cases where it is used. IRTL begain in SNB, with PC3/PC6/PC7, and HSW added PC8/PC9/PC10. Signed-off-by: Len Brown <len.brown@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-04-07tools/power turbostat: SGX state should print only if --debugLen Brown1-1/+1
The CPUID.SGX bit was printed, even if --debug was used Signed-off-by: Len Brown <len.brown@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-03-16Merge tag 'pm+acpi-4.6-rc1-1' of ↵Linus Torvalds2-193/+720
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management and ACPI updates from Rafael Wysocki: "This time the majority of changes go into cpufreq and they are significant. First off, the way CPU frequency updates are triggered is different now. Instead of having to set up and manage a deferrable timer for each CPU in the system to evaluate and possibly change its frequency periodically, cpufreq governors set up callbacks to be invoked by the scheduler on a regular basis (basically on utilization updates). The "old" governors, "ondemand" and "conservative", still do all of their work in process context (although that is triggered by the scheduler now), but intel_pstate does it all in the callback invoked by the scheduler with no need for any additional asynchronous processing. Of course, this eliminates the overhead related to the management of all those timers, but also it allows the cpufreq governor code to be simplified quite a bit. On top of that, the common code and data structures used by the "ondemand" and "conservative" governors are cleaned up and made more straightforward and some long-standing and quite annoying problems are addressed. In particular, the handling of governor sysfs attributes is modified and the related locking becomes more fine grained which allows some concurrency problems to be avoided (particularly deadlocks with the core cpufreq code). In principle, the new mechanism for triggering frequency updates allows utilization information to be passed from the scheduler to cpufreq. Although the current code doesn't make use of it, in the works is a new cpufreq governor that will make decisions based on the scheduler's utilization data. That should allow the scheduler and cpufreq to work more closely together in the long run. In addition to the core and governor changes, cpufreq drivers are updated too. Fixes and optimizations go into intel_pstate, the cpufreq-dt driver is updated on top of some modification in the Operating Performance Points (OPP) framework and there are fixes and other updates in the powernv cpufreq driver. Apart from the cpufreq updates there is some new ACPICA material, including a fix for a problem introduced by previous ACPICA updates, and some less significant changes in the ACPI code, like CPPC code optimizations, ACPI processor driver cleanups and support for loading ACPI tables from initrd. Also updated are the generic power domains framework, the Intel RAPL power capping driver and the turbostat utility and we have a bunch of traditional assorted fixes and cleanups. Specifics: - Redesign of cpufreq governors and the intel_pstate driver to make them use callbacks invoked by the scheduler to trigger CPU frequency evaluation instead of using per-CPU deferrable timers for that purpose (Rafael Wysocki). - Reorganization and cleanup of cpufreq governor code to make it more straightforward and fix some concurrency problems in it (Rafael Wysocki, Viresh Kumar). - Cleanup and improvements of locking in the cpufreq core (Viresh Kumar). - Assorted cleanups in the cpufreq core (Rafael Wysocki, Viresh Kumar, Eric Biggers). - intel_pstate driver updates including fixes, optimizations and a modification to make it enable enable hardware-coordinated P-state selection (HWP) by default if supported by the processor (Philippe Longepe, Srinivas Pandruvada, Rafael Wysocki, Viresh Kumar, Felipe Franciosi). - Operating Performance Points (OPP) framework updates to improve its handling of voltage regulators and device clocks and updates of the cpufreq-dt driver on top of that (Viresh Kumar, Jon Hunter). - Updates of the powernv cpufreq driver to fix initialization and cleanup problems in it and correct its worker thread handling with respect to CPU offline, new powernv_throttle tracepoint (Shilpasri Bhat). - ACPI cpufreq driver optimization and cleanup (Rafael Wysocki). - ACPICA updates including one fix for a regression introduced by previos changes in the ACPICA code (Bob Moore, Lv Zheng, David Box, Colin Ian King). - Support for installing ACPI tables from initrd (Lv Zheng). - Optimizations of the ACPI CPPC code (Prashanth Prakash, Ashwin Chaugule). - Support for _HID(ACPI0010) devices (ACPI processor containers) and ACPI processor driver cleanups (Sudeep Holla). - Support for ACPI-based enumeration of the AMBA bus (Graeme Gregory, Aleksey Makarov). - Modification of the ACPI PCI IRQ management code to make it treat 255 in the Interrupt Line register as "not connected" on x86 (as per the specification) and avoid attempts to use that value as a valid interrupt vector (Chen Fan). - ACPI APEI fixes related to resource leaks (Josh Hunt). - Removal of modularity from a few ACPI drivers (BGRT, GHES, intel_pmic_crc) that cannot be built as modules in practice (Paul Gortmaker). - PNP framework update to make it treat ACPI_RESOURCE_TYPE_SERIAL_BUS as a valid resource type (Harb Abdulhamid). - New device ID (future AMD I2C controller) in the ACPI driver for AMD SoCs (APD) and in the designware I2C driver (Xiangliang Yu). - Assorted ACPI cleanups (Colin Ian King, Kaiyen Chang, Oleg Drokin). - cpuidle menu governor optimization to avoid a square root computation in it (Rasmus Villemoes). - Fix for potential use-after-free in the generic device properties framework (Heikki Krogerus). - Updates of the generic power domains (genpd) framework including support for multiple power states of a domain, fixes and debugfs output improvements (Axel Haslam, Jon Hunter, Laurent Pinchart, Geert Uytterhoeven). - Intel RAPL power capping driver updates to reduce IPI overhead in it (Jacob Pan). - System suspend/hibernation code cleanups (Eric Biggers, Saurabh Sengar). - Year 2038 fix for the process freezer (Abhilash Jindal). - turbostat utility updates including new features (decoding of more registers and CPUID fields, sub-second intervals support, GFX MHz and RC6 printout, --out command line option), fixes (syscall jitter detection and workaround, reductioin of the number of syscalls made, fixes related to Xeon x200 processors, compiler warning fixes) and cleanups (Len Brown, Hubert Chrzaniuk, Chen Yu)" * tag 'pm+acpi-4.6-rc1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (182 commits) tools/power turbostat: bugfix: TDP MSRs print bits fixing tools/power turbostat: correct output for MSR_NHM_SNB_PKG_CST_CFG_CTL dump tools/power turbostat: call __cpuid() instead of __get_cpuid() tools/power turbostat: indicate SMX and SGX support tools/power turbostat: detect and work around syscall jitter tools/power turbostat: show GFX%rc6 tools/power turbostat: show GFXMHz tools/power turbostat: show IRQs per CPU tools/power turbostat: make fewer systems calls tools/power turbostat: fix compiler warnings tools/power turbostat: add --out option for saving output in a file tools/power turbostat: re-name "%Busy" field to "Busy%" tools/power turbostat: Intel Xeon x200: fix turbo-ratio decoding tools/power turbostat: Intel Xeon x200: fix erroneous bclk value tools/power turbostat: allow sub-sec intervals ACPI / APEI: ERST: Fixed leaked resources in erst_init ACPI / APEI: Fix leaked resources intel_pstate: Do not skip samples partially intel_pstate: Remove freq calculation from intel_pstate_calc_busy() intel_pstate: Move intel_pstate_calc_busy() into get_target_pstate_use_performance() ...
2016-03-13tools/power turbostat: bugfix: TDP MSRs print bits fixingChen Yu1-10/+10
MSR_CONFIG_TDP_NOMINAL: should print all 8 bits of base_ratio (bit 0:7) 0xFF MSR_CONFIG_TDP_LEVEL_1: should print all 15 bits of PKG_MIN_PWR_LVL1 (bit 48:62) 0x7FFF should print all 15 bits of PKG_MAX_PWR_LVL1 (bit 32:46) 0x7FFF should print all 8 bits of LVL1_RATIO (bit 16:23) 0xFF should print all 15 bits of PKG_TDP_LVL1 (bit 0:14) 0x7FFF And the same modification to MSR_CONFIG_TDP_LEVEL_2. MSR_TURBO_ACTIVATION_RATIO: should print all 8 bits of MAX_NON_TURBO_RATIO (bit 0:7) 0xFF Signed-off-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2016-03-13tools/power turbostat: correct output for MSR_NHM_SNB_PKG_CST_CFG_CTL dumpLen Brown1-1/+1
MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x1e008008 (...pkg-cstate-limit=0: unlimited) should print as MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x1e008008 (...pkg-cstate-limit=8: unlimited) Signed-off-by: Len Brown <len.brown@intel.com>
2016-03-13tools/power turbostat: call __cpuid() instead of __get_cpuid()Len Brown1-7/+7
turbostat already checks whether calling each cpuid leavf is legal, and it doesn't look at the function return value, so call the simpler gcc intrinsic __cpuid() instead of __get_cpuid(). syntax only, no functional change Signed-off-by: Len Brown <len.brown@intel.com>
2016-03-13tools/power turbostat: indicate SMX and SGX supportLen Brown1-1/+27
SGX presence is related to a SKL power workaround, so lets show when that is enabled. Signed-off-by: Len Brown <len.brown@intel.com>
2016-03-13tools/power turbostat: detect and work around syscall jitterLen Brown1-1/+50
The accuracy of Bzy_Mhz and Busy% depend on reading the TSC, APERF, and MPERF close together in time. When there is a very short measurement interval, or a large system is profoundly idle, the changes in APERF and MPERF may be very small. They can be small enough that an expensive interrupt between reading APERF and MPERF can cause the APERF/MPERF ratio to become inaccurate, resulting in invalid calculation and display of Bzy_MHz. A dummy APERF read of APERF makes this problem much more rare. Apparently this 1st systemn call after exiting a long stretch of idle is when we typically see expensive timer interrupts that cause large jitter. For the cases that dummy APERF read fails to prevent, we compare the latency of the APERF and MPERF reads. If they differ by more than 2x, we re-issue them. Signed-off-by: Len Brown <len.brown@intel.com>
2016-03-13tools/power turbostat: show GFX%rc6Len Brown1-0/+45
The column "GFX%c6" show the percentage of time the GPU is in the "render C6" state, rc6. Deep package C-states on several systems depend on the GPU being in RC6. This information comes from the counter /sys/class/drm/card0/power/rc6_residency_ms, as read before and after the measurement interval. Signed-off-by: Len Brown <len.brown@intel.com>
2016-03-13tools/power turbostat: show GFXMHzLen Brown1-1/+49
Under the column "GFXMHz", show a snapshot of this attribute: /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz This is an instantaneous snapshot of what sysfs presents at the end of the measurement interval. turbostat does not average or otherwise perform any math on this value. Signed-off-by: Len Brown <len.brown@intel.com>
2016-03-13tools/power turbostat: show IRQs per CPULen Brown1-4/+122
The new IRQ column shows how many interrupts have occurred on each CPU during the measurement inteval. This information comes from the difference between /proc/interrupts shapshots made before and after the measurement interval. The first row, the system summary, shows the sum of the IRQS for all CPUs during that interval. Signed-off-by: Len Brown <len.brown@intel.com>
2016-03-13tools/power turbostat: make fewer systems callsLen Brown1-10/+41
skip the open(2)/close(2) on each msr read by keeping the /dev/cpu/*/msr files open. The remaining read(2) is generally far fewer cycles than the removed open(2) system call. Signed-off-by: Len Brown <len.brown@intel.com>
2016-03-13tools/power turbostat: fix compiler warningsLen Brown1-4/+4
Signed-off-by: Len Brown <len.brown@intel.com>
2016-03-13tools/power turbostat: add --out option for saving output in a fileLen Brown2-135/+160
By default... Turbostat --debug gconfiguration info goes to stderr. In FORK mode, turbostat statistics go to stderr. In PERIODIC mode, turbostat statistics go to stdout. These defaults do not change, but an option "--out file" will send all output above only to the specified file. Signed-off-by: Len Brown <len.brown@intel.com>
2016-03-13tools/power turbostat: re-name "%Busy" field to "Busy%"Len Brown2-11/+11
some tools processing turbostat output have difficulty with items that begin with %... Reported-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2016-03-13tools/power turbostat: Intel Xeon x200: fix turbo-ratio decodingHubert Chrzaniuk1-27/+26
Following changes have been made: - changed MSR_NHM_TURBO_RATIO_LIMIT to MSR_TURBO_RATIO_LIMIT in debug print for consistency with Developer Manual - updated definition of bitfields in MSR_TURBO_RATIO_LIMIT and appropriate parsing code - added x200 to list of architectures that do not support Nahlem compatible definition of MSR_TURBO_RATIO_LIMIT register (x200 has the register but bits definition is custom) - fixed typo in code that parses MSR_TURBO_RATIO_LIMIT (logical instead of bitwise operator) - changed MSR_TURBO_RATIO_LIMIT parsing algorithm so the print out had the same order as implementations for other platforms Signed-off-by: Hubert Chrzaniuk <hubert.chrzaniuk@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2016-03-13tools/power turbostat: Intel Xeon x200: fix erroneous bclk valueChrzaniuk, Hubert1-1/+1
x200 does not enable any way to programmatically obtain bus clock speed. Bclk for the architecture has a fixed value of 100 MHz. At the same time x200 cannot be included in has_snb_msrs since it does not support C7 idle state. prior to this patch, MHz values reported on this chip were erroneously calculated using bclk of 133MHz, causing MHz values to be reported 33% higher than actual. Signed-off-by: Hubert Chrzaniuk <hubert.chrzaniuk@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2016-03-13tools/power turbostat: allow sub-sec intervalsLen Brown2-5/+17
turbostat -i interval_sec will sample and display statistics every interval_sec. interval_sec used to be a whole number of seconds, but now we accept a decimal, as small as 0.001 sec (1 ms). Signed-off-by: Len Brown <len.brown@intel.com>
2016-03-03tools/power turbostat: fix various build warningsColin Ian King1-4/+4
When building with gcc 6 we're getting various build warnings that just require some trivial function declaration and call fixes: turbostat.c: In function ‘dump_cstate_pstate_config_info’: turbostat.c:1973:1: warning: type of ‘family’ defaults to ‘int’ dump_cstate_pstate_config_info(family, model) turbostat.c:1973:1: warning: type of ‘model’ defaults to ‘int’ turbostat.c: In function ‘get_tdp’: turbostat.c:2145:8: warning: type of ‘model’ defaults to ‘int’ double get_tdp(model) turbostat.c: In function ‘perf_limit_reasons_probe’: turbostat.c:2259:6: warning: type of ‘family’ defaults to ‘int’ void perf_limit_reasons_probe(family, model) turbostat.c:2259:6: warning: type of ‘model’ defaults to ‘int’ Signed-off-by: Colin Ian King <colin.king@canonical.com> Cc: Matt Fleming <matt@codeblueprint.co.uk> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/n/tip-wbicer8n0s9qe6ql8h9x478e@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-02-17tools/power turbostat: Decode MSR_MISC_PWR_MGMTLen Brown1-0/+23
This MSR is helpful to show if P-state HW coordination is enabled or disabled. Signed-off-by: Len Brown <len.brown@intel.com>
2016-02-17tools/power turbostat: decode HWP registersLen Brown1-6/+118
# turbostat --debug ... CPUID(6): ... HWP, HWPnotify, HWPwindow, HWPepp, HWPpkg ... ... cpu0: MSR_PM_ENABLE: 0x00000001 (HWP) cpu0: MSR_HWP_CAPABILITIES: 0x01050916 (high 0x16 guar 0x9 eff 0x5 low 0x1) cpu0: MSR_HWP_REQUEST: 0x80001604 (min 0x4 max 0x16 des 0x0 epp 0x80 window 0x0 pkg 0x0) cpu0: MSR_HWP_INTERRUPT: 0x00000001 (EN_Guaranteed_Perf_Change, Dis_Excursion_Min) cpu0: MSR_HWP_STATUS: 0x00000000 (No-Guaranteed_Perf_Change, No-Excursion_Min) Signed-off-by: Len Brown <len.brown@intel.com>
2016-02-17tools/power turbostat: CPUID(0x16) leaf shows base, max, and bus frequencyLen Brown1-5/+18
This CPUID leaf is available on Skylake: CPUID(0x16): base_mhz: 1500 max_mhz: 2200 bus_mhz: 100 Signed-off-by: Len Brown <len.brown@intel.com>
2016-02-17tools/power turbostat: decode more CPUID fieldsLen Brown1-1/+27
for debugging, dump a few more fields: CPUID(1): SSE3 MONITOR EIST TM2 TSC MSR ACPI-TM TM cpu0: MSR_IA32_MISC_ENABLE: 0x00850089 (TCC EIST MONITOR) Signed-off-by: Len Brown <len.brown@intel.com>
2015-11-13tools/power turbostat: use new name for MSR_PLATFORM_INFOLen Brown1-4/+4
MSR_PLATFORM_INFO is the new name for MSR_NHM_PLATFORM_INFO no functional change Signed-off-by: Len Brown <len.brown@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-10-22tools/power turbostat: bugfix: print MAX_NON_TURBO_RATIOLen Brown1-1/+1
MSR_TURBO_ACTIVATION_RATIO: 0x00000016 (MAX_NON_TURBO_RATIO=6 lock=0) should print all 7 bits of MAX_NON_TURBO_RATIO (in decimal): MSR_TURBO_ACTIVATION_RATIO: 0x00000016 (MAX_NON_TURBO_RATIO=22 lock=0) Signed-off-by: Len Brown <len.brown@intel.com>
2015-10-19tools/power turbostat: simplify Bzy_MHz calculationLen Brown1-11/+17
Bzy_MHz = TSC_delta*tsc_tweak/APERF_delta/MPERF_delta/measurement_interval becomes Bzy_MHz = base_mhz/APERF_delta/MPERF_delta on systems which support MSR_NHM_PLATFORM_INFO. base_mhz is calculated directly from the base_ratio reported in MSR_NHM_PLATFORM_INFO * bclk, and bclk is discovered via MSR or cpuid. This reduces the dependency of Bzy_MHz calculation on the TSC. Previously, there were 4 TSC readings required in each caculation, the raw TSC delta combined with the measurement_interval. This also removes the "tsc_tweak" correction factor used when TSC runs on a different base clock from the CPU's bclk. After this change, tsc_tweak is used only for %Busy. The end-result should be a Bzy_MHz result slightly less prone to jitter. Signed-off-by: Len Brown <len.brown@intel.com>
2015-09-26tools/power turbosat: update version numberLen Brown1-1/+1
Signed-off-by: Len Brown <len.brown@intel.com>
2015-09-26tools/power turbostat: SKL: Adjust for TSC difference from base frequencyLen Brown1-2/+20
On a Skylake with 1500MHz base frequency, the TSC runs at 1512MHz. This is because the TSC is no longer in the n*100 MHz BCLK domain, but is now in the m*24MHz crystal clock domain. (24 MHz * 63 = 1512 MHz) This adds error to several calculations in turbostat, unless the TSC sample sizes are adjusted for this difference. Note that calculations in the time domain are immune from this issue, as the timing sub-system has already calibrated the TSC against a known wall clock. AVG_MHz = APERF_delta/measurement_interval need no adjustment. APERF_delta is in the BCLK domain, and measurement_interval is in the time domain. TSC_MHz = TSC_delta/measurement_interval needs no adjustment -- as we really do want to report the actual measured TSC delta here, and measurement_interval is in the accurate time domain. %Busy = MPERF_delta/TSC_delta needs adjustment to use TSC_BCLK_DOMAIN_delta. TSC_BCLK_DOMAIN_delta = TSC_delta * base_hz / tsc_hz Bzy_MHz = TSC_delta/APERF_delta/MPERF_delta/measurement_interval need adjustment as above. No other metrics in turbostat need to be adjusted. Before: CPU Avg_MHz %Busy Bzy_MHz TSC_MHz - 550 24.84 2216 1512 0 2191 98.73 2219 1514 2 0 0.01 2130 1512 1 9 0.43 2016 1512 3 2 0.08 2016 1512 After: CPU Avg_MHz %Busy Bzy_MHz TSC_MHz - 550 25.05 2198 1512 0 2190 99.62 2199 1512 2 0 0.01 2152 1512 1 9 0.46 2000 1512 3 2 0.10 2000 1512 Note that in this example, the "Before" Bzy_MHz was reported as exceeding the 2200 max turbo rate. Also, even a pinned spin loop would not be reported as over 99% busy. Signed-off-by: Len Brown <len.brown@intel.com>
2015-09-26tools/power turbostat: KNL workaround for %Busy and Avg_MHzHubert Chrzaniuk1-0/+13
KNL increments APERF and MPERF every 1024 clocks. This is compliant with the architecture specification, which requires that only the ratio of APERF/MPERF need be valid. However, turbostat takes advantage of the fact that these two MSRs increment every un-halted clock at the actual and base frequency: AVG_MHz = APERF_delta/measurement_interval %Busy = MPERF_delta/TSC_delta This quirk is needed for these calculations to also work on KNL, which would otherwise show a value 1024x smaller than expected. Signed-off-by: Hubert Chrzaniuk <hubert.chrzaniuk@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2015-09-26tools/power turbostat: IVB Xeon: fix --debug regressionLen Brown1-2/+0
Staring in Linux-4.3-rc1, commit 6fb3143b561c ("tools/power turbostat: dump CONFIG_TDP") touches MSR 0x648, which is not supported on IVB-Xeon. This results in "turbostat --debug" exiting on those systems: turbostat: /dev/cpu/2/msr offset 0x648 read failed: Input/output error Remove IVB-Xeon from the list of machines supporting with that MSR. Signed-off-by: Len Brown <len.brown@intel.com>
2015-08-24Merge branch 'turbostat' of ↵Rafael J. Wysocki2-17/+88
https://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux into pm-tools Pull turbostat changes for v4.3 from Len Brown. * 'turbostat' of https://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux: tools/power turbostat: fix typo on DRAM column in Joules-mode tools/power turbostat: fix parameter passing for forked command tools/power turbostat: dump CONFIG_TDP tools/power turbostat: cpu0 is no longer hard-coded, so update output tools/power turbostat: update turbostat(8)
2015-07-24tools/power turbostat: fix typo on DRAM column in Joules-modeLen Brown1-1/+1
< RAM_W > RAM_J Reported-by: Hubert Chrzaniuk <hubert.chrzaniuk@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2015-07-15tools/power turbostat: fix parameter passing for forked commandLen Brown1-1/+1
turbostat supports forked command when sampling cpu state. However, the forked command is not allowed to be executed with options, otherwise turbostat might regard these options as invalid turbostat options. For example: ./turbostat stress -c 4 -t 10 ./turbostat: unrecognized option '-t' Reported-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2015-06-17tools/power turbostat: dump CONFIG_TDPLen Brown1-1/+77
Config TDP is a feature that allows parts to be configured for different thermal limits after they have left the factory. This can have an effect on the operation of the part, particularly in determiniing... Max Non-turbo Ratio Turbo Activation Ratio Signed-off-by: Len Brown <len.brown@intel.com>
2015-06-17tools/power turbostat: cpu0 is no longer hard-coded, so update outputLen Brown1-9/+9
The --debug option reads a number of per-package MSRs. Previously we explicitly read them on cpu0, but recently turbostat changed to read them on the current "base_cpu". Update the print-out to reflect base_cpu, rather than the hard-coded cpu0. Signed-off-by: Len Brown <len.brown@intel.com>
2015-06-07x86/uapi: Do not export <asm/msr-index.h> as part of the user API headersBorislav Petkov1-1/+1
This header containing all MSRs and respective bit definitions got exported to userspace in conjunction with the big UAPI shuffle. But, it doesn't belong in the UAPI headers because userspace can do its own MSR defines and exporting them from the kernel blocks us from doing cleanups/renames in that header. Which is ridiculous - it is not kernel's job to export such a header and keep MSRs list and their names stable. Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: H. Peter Anvin <hpa@zytor.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: David Howells <dhowells@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1433436928-31903-19-git-send-email-bp@alien8.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-06-03tools/power turbostat: update turbostat(8)Len Brown1-5/+0
Remove reference to the original Nehalem Turbo white paper, since it has moved, and these mechanisms have now long since been documented in the Software Developer's Manual. Reported-by: Jeremie Lagraviere <jeremie@simula.no> Signed-off-by: Len Brown <len.brown@intel.com>
2015-05-27tools/power turbostat: update version number to 4.7Len Brown1-1/+1
Signed-off-by: Len Brown <len.brown@intel.com>
2015-05-27tools/power turbostat: allow running without cpu0Prarit Bhargava1-15/+31
Linux-3.7 added CONFIG_BOOTPARAM_HOTPLUG_CPU0, allowing systems to offline cpu0. But when cpu0 is offline, turbostat will not run: # turbostat ls turbostat: no /dev/cpu/0/msr This patch replaces the hard-coded use of cpu0 in turbostat with the current cpu, allowing it to run without a cpu0. Fewer cross-calls may also be needed due to use of current cpu, though this hard-coding was used only for the --debug preamble. Signed-off-by: Prarit Bhargava <prarit@redhat.com> Signed-off-by: Len Brown <len.brown@intel.com>
2015-05-27tools/power turbostat: correctly decode of ENERGY_PERFORMANCE_BIASLen Brown1-1/+1
When EPB is 0xF, turbosat was incorrectly describing it as "custom" instead of calling it "powersave": < cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x0000000f (custom) > cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x0000000f (powersave) Signed-off-by: Len Brown <len.brown@intel.com>
2015-05-27tools/power turbostat: enable turbostat to support Knights Landing (KNL)Dasaratharaman Chandramouli1-4/+101
Changes mainly to account for minor differences in Knights Landing(KNL): 1. KNL supports C1 and C6 core states. 2. KNL supports PC2, PC3 and PC6 package states. 3. KNL has a different encoding of the TURBO_RATIO_LIMIT MSR Signed-off-by: Dasaratharaman Chandramouli <dasaratharaman.chandramouli@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2015-05-27tools/power turbostat: correctly display more than 2 threads/coreDasaratharaman Chandramouli1-20/+51
Without this update, turbostat displays only 2 threads per core. Some processors, such as Xeon Phi, have more. Signed-off-by: Dasaratharaman Chandramouli <dasaratharaman.chandramouli@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2015-04-18tools/power turbostat: correct dumped pkg-cstate-limit valueLen Brown1-9/+8
HSW expanded MSR_PKG_CST_CONFIG_CONTROL.Package-C-State-Limit, from bits[2:0] used by previous implementations, to [3:0]. The value 1000b is unlimited, and is used by BDW and SKL too. Signed-off-by: Len Brown <len.brown@intel.com>
2015-04-18tools/power turbostat: calculate TSC frequency from CPUID(0x15) on SKLLen Brown1-1/+38
turbostat --debug ... CPUID(0x15): eax_crystal: 2 ebx_tsc: 100 ecx_crystal_hz: 0 TSC: 1200 MHz (24000000 Hz * 100 / 2 / 1000000) Signed-off-by: Len Brown <len.brown@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-29 13:10:24 +0000