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2024-05-18Merge tag 'clk-for-linus' of ↵Linus Torvalds1-9/+86
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "I'm actually surprised this time. There aren't any new Qualcomm SoC clk drivers. And there's zero diff in the core clk framework. Instead we have new clk drivers for STM and Sophgo, with Samsung^WGoogle in third for the diffstat because they introduced HSI0 and HSI2 clk drivers for Google's GS101 SoC (high speed interface things like PCIe, UFS, and MMC). Beyond those big diffs there's the usual updates to various clk drivers for incorrect parent descriptions or mising MODULE_DEVICE_TABLE()s, etc. Nothing in particular stands out as super interesting here. New Drivers: - STM32MP257 SoC clk driver - Airoha EN7581 SoC clk driver - Sophgo CV1800B, CV1812H and SG2000 SoC clk driver - Loongson-2k0500 and Loongson-2k2000 SoC clk driver - Add HSI0 and HSI2 clock controllers for Google GS101 - Add i.MX95 BLK CTL clock driver Updates: - Allocate clk_ops dynamically for SCMI clk driver - Add support in qcom RCG and RCG2 for multiple configurations for the same frequency - Use above support for IPQ8074 NSS port 5 and 6 clocks to resolve issues - Fix the Qualcomm APSS IPQ5018 PLL to fix boot failures of some boards - Cleanups and fixes for Qualcomm Stromer PLLs - Reduce max CPU frequency on Qualcomm APSS IPQ5018 - Fix Kconfig dependencies of Qualcomm SM8650 GPU and SC8280XP camera clk drivers - Make Qualcomm MSM8998 Venus clocks functional - Cleanup downstream remnants related to DisplayPort across Qualcomm SM8450, SM6350, SM8550, and SM8650 - Reuse the Huayra APSS register map on Qualcomm MSM8996 CBF PLL - Use a specific Qualcomm QCS404 compatible for the otherwise generic HFPLL - Remove Qualcomm SM8150 CPUSS AHB clk as it is unused - Remove an unused field in the Qualcomm RPM clk driver - Add missing MODULE_DEVICE_TABLE to Qualcomm MSM8917 and MSM8953 global clock controller drivers - Allow choice of manual or firmware-driven control over PLLs, needed to fully implement CPU clock controllers on Exynos850 - Correct PLL clock IDs on ExynosAutov9 - Propagate certain clock rates to allow setting proper SPI clock rates on Google GS101 - Mark certain Google GS101 clocks critical - Convert old S3C64xx clock controller bindings to DT schema - Add new PLL rate and missing mux on Rockchip rk3568 - Add missing reset line on Rockchip rk3588 - Removal of an unused field in struct rockchip_mmc_clock - Amlogic s4/a1: add regmap maximum register for proper debugfs dump - Amlogic s4: add MODULE_DEVICE_TABLE() on pll and periph controllers - Amlogic pll driver: print clock name on lock error to help debug - Amlogic vclk: finish dsi clock path support - Amlogic license: fix occurence "GPL v2" as reported by checkpatch - Add PM runtime support to i.MX8MP Audiomix - Add DT schema for i.MX95 Display Master Block Control - Convert to platform remove callback returning void for i.MX8MP Audiomix - Add SPI (MSIOF) and external interrupt (INTC-EX) clocks on Renesas R-Car V4M - Add interrupt controller (PLIC) clock and reset on Renesas RZ/Five - Prepare power domain support for Renesas RZ/G2L family members, and add actual support on Renesas RZ/G3S SoC - Add thermal, serial (SCIF), and timer (CMT/TMU) clocks on Renesas R-Car V4M - Add additional constraints to Allwinner A64 PLL MIPI clock - Fix autoloading sunxi-ng clocks when build as a module" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (118 commits) clk: samsung: Don't register clkdev lookup for the fixed rate clocks clk, reset: microchip: mpfs: fix incorrect preprocessor conditions clk: qcom: clk-alpha-pll: fix rate setting for Stromer PLLs clk: qcom: apss-ipq-pll: fix PLL rate for IPQ5018 clk: qcom: Fix SM_GPUCC_8650 dependencies clk: qcom: Fix SC_CAMCC_8280XP dependencies dt-bindings: clocks: stm32mp25: add access-controllers description clock, reset: microchip: move all mpfs reset code to the reset subsystem clk: samsung: gs101: drop unused HSI2 clock parent data clk: rockchip: rk3568: Add PLL rate for 724 MHz clk: rockchip: Remove an unused field in struct rockchip_mmc_clock dt-bindings: clock: fixed: Define a preferred node name clk: meson: s4: fix module autoloading clk: samsung: gs101: mark some apm UASC and XIU clocks critical clk: imx: imx8mp: Convert to platform remove callback returning void clk: imx: imx8mp: Switch to RUNTIME_PM_OPS() clk: bcm: rpi: Assign ->num before accessing ->hws clk: bcm: dvp: Assign ->num before accessing ->hws clk: samsung: gs101: add support for cmu_hsi2 clk: samsung: gs101: add support for cmu_hsi0 ...
2024-05-07clock, reset: microchip: move all mpfs reset code to the reset subsystemConor Dooley1-9/+86
Stephen and Philipp, while reviewing patches, said that all of the aux device creation and the register read/write code could be moved to the reset subsystem, leaving the clock driver with no implementations of reset_* functions at all. Move them. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Suggested-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240424-strangle-sharpener-34755c5e6e3e@spud Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-04-05reset: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210Yangyu Chen1-2/+2
Since SOC_FOO should be deprecated from patch [1], and cleanup for other SoCs is already in the mailing list [2,3,4,5], we remove the use of SOC_CANAAN and introduced SOC_CANAAN_K210 for K210-specific drivers, Thus, we replace its drivers depends on SOC_CANAAN_K210 and default select when it has the symbol SOC_CANAAN_K210. [1] https://lore.kernel.org/linux-riscv/20221121221414.109965-1-conor@kernel.org/ [2] https://lore.kernel.org/linux-riscv/20240305-praying-clad-c4fbcaa7ed0a@spud/ [3] https://lore.kernel.org/linux-riscv/20240305-fled-undrilled-41dc0c46bb29@spud/ [4] https://lore.kernel.org/linux-riscv/20240305-stress-earflap-d7ddb8655a4d@spud/ [5] https://lore.kernel.org/linux-riscv/20240305-praying-clad-c4fbcaa7ed0a@spud/ Signed-off-by: Yangyu Chen <cyy@cyyself.name> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2024-02-21reset: Instantiate reset GPIO controller for shared reset-gpiosKrzysztof Kozlowski1-13/+211
Devices sharing a reset GPIO could use the reset framework for coordinated handling of that shared GPIO line. We have several cases of such needs, at least for Devicetree-based platforms. If Devicetree-based device requests a reset line, while "resets" Devicetree property is missing but there is a "reset-gpios" one, instantiate a new "reset-gpio" platform device which will handle such reset line. This allows seamless handling of such shared reset-gpios without need of changing Devicetree binding [1]. To avoid creating multiple "reset-gpio" platform devices, store the Devicetree "reset-gpios" GPIO specifiers used for new devices on a linked list. Later such Devicetree GPIO specifier (phandle to GPIO controller, GPIO number and GPIO flags) is used to check if reset controller for given GPIO was already registered. If two devices have conflicting "reset-gpios" property, e.g. with different ACTIVE_xxx flags, this would allow to spawn two separate "reset-gpio" devices, where the second would fail probing on busy GPIO request. Link: https://lore.kernel.org/all/YXi5CUCEi7YmNxXM@robh.at.kernel.org/ [1] Cc: Bartosz Golaszewski <brgl@bgdev.pl> Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Cc: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240129115216.96479-5-krzysztof.kozlowski@linaro.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2024-02-21reset: gpio: Add GPIO-based reset controllerKrzysztof Kozlowski3-0/+129
Add a simple driver to control GPIO-based resets using the reset controller API for the cases when the GPIOs are shared and reset should be coordinated. The driver is expected to be used by reset core framework for ad-hoc reset controllers. Cc: Bartosz Golaszewski <brgl@bgdev.pl> Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Cc: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240129115216.96479-4-krzysztof.kozlowski@linaro.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2024-02-21reset: simple: add support for Sophgo SG2042Chen Wang2-1/+4
Reuse reset-simple driver for the Sophgo SG2042 reset generator. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/1cfd7b3ba447942784c4f7aa595e962399e9f617.1706577450.git.unicorn_wang@outlook.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2024-01-11Merge tag 'soc-drivers-6.8' of ↵Linus Torvalds10-25/+16
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC driver updates from Arnd Bergmann: "A new drivers/cache/ subsystem is added to contain drivers for abstracting cache flush methods on riscv and potentially others, as this is needed for handling non-coherent DMA but several SoCs require nonstandard hardware methods for it. op-tee gains support for asynchronous notification with FF-A, as well as support for a system thread for executing in secure world. The tee, reset, bus, memory and scmi subsystems have a couple of minor updates. Platform specific soc driver changes include: - Samsung Exynos gains driver support for Google GS101 (Tensor G1) across multiple subsystems - Qualcomm Snapdragon gains support for SM8650 and X1E along with added features for some other SoCs - Mediatek adds support for "Smart Voltage Scaling" on MT8186 and MT8195, and driver support for MT8188 along with some code refactoring. - Microchip Polarfire FPGA support for "Auto Update" of the FPGA bitstream - Apple M1 mailbox driver is rewritten into a SoC driver - minor updates on amlogic, mvebu, ti, zynq, imx, renesas and hisilicon" * tag 'soc-drivers-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (189 commits) memory: ti-emif-pm: Convert to platform remove callback returning void memory: ti-aemif: Convert to platform remove callback returning void memory: tegra210-emc: Convert to platform remove callback returning void memory: tegra186-emc: Convert to platform remove callback returning void memory: stm32-fmc2-ebi: Convert to platform remove callback returning void memory: exynos5422-dmc: Convert to platform remove callback returning void memory: renesas-rpc-if: Convert to platform remove callback returning void memory: omap-gpmc: Convert to platform remove callback returning void memory: mtk-smi: Convert to platform remove callback returning void memory: jz4780-nemc: Convert to platform remove callback returning void memory: fsl_ifc: Convert to platform remove callback returning void memory: fsl-corenet-cf: Convert to platform remove callback returning void memory: emif: Convert to platform remove callback returning void memory: brcmstb_memc: Convert to platform remove callback returning void memory: brcmstb_dpfe: Convert to platform remove callback returning void soc: qcom: llcc: Fix LLCC_TRP_ATTR2_CFGn offset firmware: qcom: qseecom: fix memory leaks in error paths dt-bindings: clock: google,gs101: rename CMU_TOP gate defines soc: qcom: llcc: Fix typo in kernel-doc dt-bindings: soc: qcom,aoss-qmp: document the X1E80100 Always-On Subsystem side channel ...
2023-11-30reset: Fix crash when freeing non-existent optional resetsGeert Uytterhoeven1-4/+4
When obtaining one or more optional resets, non-existent resets are stored as NULL pointers, and all related error and cleanup paths need to take this into account. Currently only reset_control_put() and reset_control_bulk_put() get this right. All of __reset_control_bulk_get(), of_reset_control_array_get(), and reset_control_array_put() lack the proper checking, causing NULL pointer dereferences on failure or release. Fix this by moving the existing check from reset_control_bulk_put() to __reset_control_put_internal(), so it applies to all callers. The double check in reset_control_put() doesn't hurt. Fixes: 17c82e206d2a3cd8 ("reset: Add APIs to manage array of resets") Fixes: 48d71395896d54ee ("reset: Add reset_control_bulk API") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/2440edae7ca8534628cdbaf559ded288f2998178.1701276806.git.geert+renesas@glider.be Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-11-28reset: Use device_get_match_data()Rob Herring2-8/+8
Use preferred device_get_match_data() instead of of_match_device() to get the driver match data. With this, adjust the includes to explicitly include the correct headers. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20231115205848.3732609-1-robh@kernel.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-11-28reset: reset-meson: add support for Amlogic C3 SoC Reset ControllerZelong Dong1-0/+1
Add a new compatible string to support for the reset controller on the C3 SoC. The count and offset for C3 Soc RESET registers are same as S4 Soc. Signed-off-by: Zelong Dong <zelong.dong@amlogic.com> Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230914064018.18790-3-zelong.dong@amlogic.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-11-28reset: uniphier-glue: Use devm_platform_get_and_ioremap_resource()Yangtao Li1-2/+1
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li <frank.li@vivo.com> Link: https://lore.kernel.org/r/20230704120211.38122-7-frank.li@vivo.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-11-28reset: sunplus: Use devm_platform_get_and_ioremap_resource()Yangtao Li1-2/+1
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li <frank.li@vivo.com> Link: https://lore.kernel.org/r/20230704120211.38122-6-frank.li@vivo.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-11-28reset: simple: Convert to devm_platform_get_and_ioremap_resource()Yangtao Li1-2/+1
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li <frank.li@vivo.com> Link: https://lore.kernel.org/r/20230704120211.38122-5-frank.li@vivo.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-11-28reset: qcom: Convert to devm_platform_ioremap_resource()Yangtao Li1-3/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <frank.li@vivo.com> Link: https://lore.kernel.org/r/20230704120211.38122-4-frank.li@vivo.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-11-28reset: qcom-aoss: Convert to devm_platform_ioremap_resource()Yangtao Li1-3/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <frank.li@vivo.com> Link: https://lore.kernel.org/r/20230704120211.38122-3-frank.li@vivo.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-11-28reset: meson-audio-arb: Convert to devm_platform_ioremap_resource()Yangtao Li1-3/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <frank.li@vivo.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230704120211.38122-2-frank.li@vivo.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-11-28reset: brcmstb: Use devm_platform_get_and_ioremap_resource()Yangtao Li1-2/+1
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li <frank.li@vivo.com> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/r/20230704120211.38122-1-frank.li@vivo.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-11-24reset: hisilicon: hi6220: fix Wvoid-pointer-to-enum-cast warningKrzysztof Kozlowski1-1/+1
'type' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: hi6220_reset.c:166:9: error: cast to smaller integer type 'enum hi6220_reset_ctrl_type' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230810091300.70197-1-krzysztof.kozlowski@linaro.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-10-24reset: Annotate struct reset_control_array with __counted_byKees Cook1-2/+2
Prepare for the coming implementation by GCC and Clang of the __counted_by attribute. Flexible array members annotated with __counted_by can have their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family functions). As found with Coccinelle[1], add __counted_by for struct reset_control_array. Additionally, since the element count member must be set before accessing the annotated flexible array member, move its initialization earlier. [1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci Cc: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: "Gustavo A. R. Silva" <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20230922175229.work.838-kees@kernel.org Signed-off-by: Kees Cook <keescook@chromium.org>
2023-08-30Merge tag 'clk-for-linus' of ↵Linus Torvalds1-0/+30
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk subsystem updates from Stephen Boyd: "This pull request is full of clk driver changes. In fact, there aren't any changes to the clk framework this time around. That's probably because everyone was on vacation (yours truly included). We did lose a couple clk drivers this time around because nobody was using those devices. That skews the diffstat a bit, but either way, nothing looks out of the ordinary here. The usual suspects are chugging along adding support for more SoCs and fixing bugs. If I had to choose, I'd say the theme for the past few months has been "polish". There's quite a few patches that migrate to devm_platform_ioremap_resource() in here. And there's more than a handful of patches that move the NR_CLKS define from the DT binding header to the driver. There's even patches that migrate drivers to use clk_parent_data and clk_hw to describe clk tree topology. It seems that the spring (summer?) cleaning bug got some folks, or the semiconductor shortage finally hit the software side. New Drivers: - StarFive JH7110 SoC clock drivers - Qualcomm IPQ5018 Global Clock Controller driver - Versa3 clk generator to support 48KHz playback/record with audio codec on RZ/G2L SMARC EVK Removed Drivers: - Remove non-OF mmp clk drivers - Remove OXNAS clk driver Updates: - Add __counted_by to struct clk_hw_onecell_data and struct spmi_pmic_div_clk_cc - Move defines for numbers of clks (NR_CLKS) from DT headers to drivers - Introduce kstrdup_and_replace() and use it - Add PLL rates for Rockchip rk3568 - Add the display clock tree for Rockchip rv1126 - Add Audio Clock Generator (ADG) clocks on Renesas R-Car Gen3 and RZ/G2 SoCs - Convert sun9i-mmc clock to use devm_platform_get_and_ioremap_resource() - Fix function name in a comment in ccu_mmc_timing.c - Parameter name correction for ccu_nkm_round_rate() - Implement CLK_SET_RATE_PARENT for Allwinner NKM clocks, i.e. consider alternative parent rates when determining clock rates - Set CLK_SET_RATE_PARENT for Allwinner A64 pll-mipi - Support finding closest (as opposed to closest but not higher) clock rate for NM, NKM, mux and div type clocks, as use it for Allwinner A64 pll-video0 - Prefer current parent rate if able to generate ideal clock rate for Allwinner NKM clocks - Clean up Qualcomm SMD RPM driver, with interconnect bus clocks moved out to the interconnect drivers - Fix various PM runtime bugs across many Qualcomm clk drivers - Migrate Qualcomm MDM9615 is to parent_hw and parent_data - Add network related resets on Qualcomm IPQ4019 - Add a couple missing USB related clocks to Qualcomm IPQ9574 - Add missing gpll0_sleep_clk_src to Qualcomm MSM8917 global clock controller - In the Qualcomm QDU1000 global clock controller, GDSCs, clkrefs, and GPLL1 are added, while PCIe pipe clock, SDCC rcg ops are corrected - Add missing GDSCs to and correct GDSCs for the SC8280XP global clock controller driver - Support retention for the Qualcomm SC8280XP display clock controller GDSCs. - Qualcommm's SDCC apps_clk_src is marked with CLK_OPS_PARENT_ENABLE to fix issues with missing parent clocks across sc7180, sm7150, sm6350 and sm8250, while sm8450 is corrected to use floor ops - Correct Qualcomm SM6350 GPU clock controller's clock supplies - Drop unwanted clocks from the Qualcomm IPQ5332 GCC driver - Add missing OXILICX GDSC to Qualcomm MSM8226 GCC - Change the delay in the Qualcomm reset controller to fsleep() for correctness - Extend the Qualcomm SM83550 Video clock controller to support SC8280XP - Add graphics clock support on Renesas RZ/G2M, RZ/G2N, RZ/G2E, and R-Car H3, M3-W, and M3-N SoCs - Add Clocked Serial Interface (CSI) clocks on Renesas RZ/V2M - Add PWM (MTU3) clock and reset on Renesas RZ/G2UL and RZ/Five - Add the PDM IPC clock for i.MX93 - Add 519.75MHz frequency support for i.MX9 PLL - Simplify the .determine_rate() implementation for i.MX GPR mux - Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource() - Add the audio mux clock to i.MX8 - Fix the SPLL2 MULT range for PLLv4 - Update the SPLL2 type in i.MX8ULP - Fix the SAI4 clock on i.MX8MP - Add silicon revision print for i.MX25 on clocks init - Drop the return value from __mx25_clocks_init() - Fix the clock pauses on no-op set_rate for i.MX8M composite clock - Drop restrictions for i.MX PLL14xx and fix its max prediv value - Drop the 393216000 and 361267200 from i.MX PLL14xx rate table to allow glitch free switching" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (207 commits) clk: qcom: Fix SM_GPUCC_8450 dependencies clk: lmk04832: Support using PLL1_LD as SPI readback pin clk: lmk04832: Don't disable vco clock on probe fail clk: lmk04832: Set missing parent_names for output clocks clk: mvebu: Convert to devm_platform_ioremap_resource() clk: nuvoton: Convert to devm_platform_ioremap_resource() clk: socfpga: agilex: Convert to devm_platform_ioremap_resource() clk: ti: Use devm_platform_get_and_ioremap_resource() clk: mediatek: Convert to devm_platform_ioremap_resource() clk: hsdk-pll: Convert to devm_platform_ioremap_resource() clk: gemini: Convert to devm_platform_ioremap_resource() clk: fsl-sai: Convert to devm_platform_ioremap_resource() clk: bm1880: Convert to devm_platform_ioremap_resource() clk: axm5516: Convert to devm_platform_ioremap_resource() clk: actions: Convert to devm_platform_ioremap_resource() clk: cdce925: Remove redundant of_match_ptr() clk: pxa910: Move number of clocks to driver source clk: pxa1928: Move number of clocks to driver source clk: pxa168: Move number of clocks to driver source clk: mmp2: Move number of clocks to driver source ...
2023-08-08reset: ti: syscon: remove unneeded call to platform_set_drvdata()Andrei Coardos1-2/+0
This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Signed-off-by: Andrei Coardos <aboutphysycs@gmail.com> Acked-by: Andrew Davis <afd@ti.com> Reviewed-by: Alexandru Ardelean <alex@shruggie.ro> Link: https://lore.kernel.org/r/20230807111534.12392-1-aboutphysycs@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-08-08reset: zynqmp: removed unneeded call to platform_set_drvdata()Andrei Coardos1-2/+0
This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Signed-off-by: Andrei Coardos <aboutphysycs@gmail.com> Reviewed-by: Alexandru Ardelean <alex@shruggie.ro> Link: https://lore.kernel.org/r/20230807114344.15076-1-aboutphysycs@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-08-08reset: zynq: remove unneeded call to platfrom_set_drvdata()Andrei Coardos1-1/+0
This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Signed-off-by: Andrei Coardos <aboutphysycs@gmail.com> Reviewed-by: Alexandru Ardelean <alex@shruggie.ro> Link: https://lore.kernel.org/r/20230807113545.14743-1-aboutphysycs@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-08-08reset: uniphier-glue: remove unneeded call to platform_set_drvdata()Andrei Coardos1-2/+0
This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Signed-off-by: Andrei Coardos <aboutphysycs@gmail.com> Reviewed-by: Alexandru Ardelean <alex@shruggie.ro> Link: https://lore.kernel.org/r/20230807112705.12862-1-aboutphysycs@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-08-08reset: npcm: remove unneeded call to platform_set_drvdata()Andrei Coardos1-2/+0
This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean <alex@shruggie.ro> Signed-off-by: Andrei Coardos <aboutphysycs@gmail.com> Link: https://lore.kernel.org/r/20230807105630.11638-1-aboutphysycs@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-08-08reset: meson: remove unneeded call to platform_set_drvdata()Andrei Coardos1-2/+0
This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean <alex@shruggie.ro> Signed-off-by: Andrei Coardos <aboutphysycs@gmail.com> Link: https://lore.kernel.org/r/20230807105400.11560-1-aboutphysycs@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-08-08reset: lpc18xx: remove unneeded call to platform_set_drvdata()Andrei Coardos1-2/+0
This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean <alex@shruggie.ro> Signed-off-by: Andrei Coardos <aboutphysycs@gmail.com> Link: https://lore.kernel.org/r/20230807104549.11225-1-aboutphysycs@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-08-08reset: lantiq: remove unneeded call to platform_set_drvdata()Andrei Coardos1-1/+0
This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean <alex@shruggie.ro> Signed-off-by: Andrei Coardos <aboutphysycs@gmail.com> Link: https://lore.kernel.org/r/20230803104225.29740-1-aboutphysycs@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-08-08reset: bcm6345: remove unneeded call to platform_set_drvdata()Andrei Coardos1-2/+0
This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean <alex@shruggie.ro> Signed-off-by: Andrei Coardos <aboutphysycs@gmail.com> Link: https://lore.kernel.org/r/20230803104142.29694-1-aboutphysycs@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-08-08reset: ath79: remove unneeded call to platform_set_drvdata()Andrei Coardos1-2/+0
This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean <alex@shruggie.ro> Signed-off-by: Andrei Coardos <aboutphysycs@gmail.com> Link: https://lore.kernel.org/r/20230803104102.29647-1-aboutphysycs@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-07-28reset: hisilicon: Use dev_err_probe instead of dev_errWang Ming1-2/+2
The probe process may generate EPROBE_DEFER. In this case, dev_err_probe can still record err information. This helps simplify code and standardize error output. Signed-off-by: Wang Ming <machel@vivo.com> Link: https://lore.kernel.org/r/20230726114555.5011-1-machel@vivo.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-07-28reset: reset-zynqmp: add support for Versal NET platformPiyush Mehta1-0/+7
Updated the reset driver to support Versal NET platform. As part of adding support for versal NET: - Added Versal NET specific compatible string. - Reset Id and number of resets. Signed-off-by: Piyush Mehta <piyush.mehta@amd.com> Link: https://lore.kernel.org/r/20230721041119.4058430-3-piyush.mehta@amd.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-07-28reset: Explicitly include correct DT includesRob Herring15-14/+11
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Damien Le Moal <dlemoal@kernel.org> Acked-by: Steen Hegelund <Steen.Hegelund@microchip.com> Link: https://lore.kernel.org/r/20230714174939.4063667-1-robh@kernel.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-07-26reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets supportXingyu Wu1-0/+30
Add new struct members and auxiliary_device_id of resets to support System-Top-Group, Image-Signal-Process and Video-Output on the StarFive JH7110 SoC. Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Link: https://lore.kernel.org/r/20230724055440.100947-1-xingyu.wu@starfivetech.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-06-29Merge tag 'soc-drivers-6.5' of ↵Linus Torvalds14-166/+18
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "Nothing surprising in the SoC specific drivers, with the usual updates: - Added or improved SoC driver support for Tegra234, Exynos4121, RK3588, as well as multiple Mediatek and Qualcomm chips - SCMI firmware gains support for multiple SMC/HVC transport and version 3.2 of the protocol - Cleanups amd minor changes for the reset controller, memory controller, firmware and sram drivers - Minor changes to amd/xilinx, samsung, tegra, nxp, ti, qualcomm, amlogic and renesas SoC specific drivers" * tag 'soc-drivers-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (118 commits) dt-bindings: interrupt-controller: Convert Amlogic Meson GPIO interrupt controller binding MAINTAINERS: add PHY-related files to Amlogic SoC file list drivers: meson: secure-pwrc: always enable DMA domain tee: optee: Use kmemdup() to replace kmalloc + memcpy soc: qcom: geni-se: Do not bother about enable/disable of interrupts in secondary sequencer dt-bindings: sram: qcom,imem: document qdu1000 soc: qcom: icc-bwmon: Fix MSM8998 count unit dt-bindings: soc: qcom,rpmh-rsc: Require power-domains soc: qcom: socinfo: Add Soc ID for IPQ5300 dt-bindings: arm: qcom,ids: add SoC ID for IPQ5300 soc: qcom: Fix a IS_ERR() vs NULL bug in probe soc: qcom: socinfo: Add support for new fields in revision 19 soc: qcom: socinfo: Add support for new fields in revision 18 dt-bindings: firmware: scm: Add compatible for SDX75 soc: qcom: mdt_loader: Fix split image detection dt-bindings: memory-controllers: drop unneeded quotes soc: rockchip: dtpm: use C99 array init syntax firmware: tegra: bpmp: Add support for DRAM MRQ GSCs soc/tegra: pmc: Use devm_clk_notifier_register() soc/tegra: pmc: Simplify debugfs initialization ...
2023-06-06reset: RESET_NUVOTON_MA35D1 should depend on ARCH_MA35Geert Uytterhoeven1-2/+3
The Nuvoton MA35D1 reset controller is only present on Nuvoton MA35 SoCs. Hence add a dependency on ARCH_MA35, to prevent asking the user about this driver when configuring a kernel without MA35 SoC support. Also, do not enable the driver by default when merely compile-testing. While at it, fix a misspelling of "Nuvoton". Fixes: e4bb55d6ccf0f774 ("reset: Add Nuvoton ma35d1 reset driver support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-05reset: Add Nuvoton ma35d1 reset driver supportJacky Huang3-0/+242
This driver supports individual IP reset for the MA35D1. The reset control registers are a subset of the system control registers. Signed-off-by: Jacky Huang <ychuang3@nuvoton.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-05-08reset: mpfs: select AUXILIARY_BUSPhilipp Zabel1-1/+2
CONFIG_AUXILIARY_BUS is not a user-visible symbol, replace 'depends on' with 'select'. Cc: Daire McNamara <daire.mcnamara@microchip.com> Suggested-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20230502102041.1418397-1-p.zabel@pengutronix.de Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-05-08reset: starfive: select AUXILIARY_BUSPhilipp Zabel1-1/+2
CONFIG_AUXILIARY_BUS is not a user-visible symbol, replace 'depends on' with 'select'. Suggested-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Link: https://lore.kernel.org/r/20230502102050.1418417-1-p.zabel@pengutronix.de Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-05-08reset: oxnas: remove obsolete reset driverNeil Armstrong3-118/+0
Due to lack of maintainance and stall of development for a few years now, and since no new features will ever be added upstream, remove support for OX810 and OX820 peripheral reset. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Daniel Golle <daniel@makrotopia.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230331-topic-oxnas-upstream-remove-v1-17-5bd58fd1dd1f@linaro.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-05-08reset: sti: simplify driver's config and buildLukas Bulwahn2-7/+1
With commit 64933513e461 ("reset: sti: Remove STiH415/6 reset support"), there is only one sti reset driver left and there no need to define a dedicated config STI_RESET_SYSCFG, which is selected by the config for the STiH407 reset driver. Simply add reset-syscfg.c to the build for the STiH407 reset driver. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20230330112347.31137-2-lukas.bulwahn@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-05-08reset: meson-audio-arb: Use dev_err_probe()Ye Xingchen1-5/+2
Replace the open-code with dev_err_probe() to simplify the code. Signed-off-by: Ye Xingchen <ye.xingchen@zte.com.cn> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/202303231653447704556@zte.com.cn Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-05-08reset: sti: rely on regmap_field_read_poll_timeout for ack waitAlain Volmat1-14/+4
Use regmap_field_read_poll_timeout function when waiting for the ack bit upon performing the reset control. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20230210224332.98482-1-avolmat@me.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-05-08reset: brcmstb-rescal: Use devm_platform_ioremap_resource()Ye Xingchen1-3/+1
Convert platform_get_resource(), devm_ioremap_resource() to a single call to Use devm_platform_ioremap_resource(), as this is exactly what this function does. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Ye Xingchen <ye.xingchen@zte.com.cn> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/202302161052126378140@zte.com.cn Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-05-08reset: meson: Use devm_platform_ioremap_resource()Ye Xingchen1-3/+1
Convert platform_get_resource(), devm_ioremap_resource() to a single call to Use devm_platform_ioremap_resource(), as this is exactly what this function does. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Ye Xingchen <ye.xingchen@zte.com.cn> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/202302161054598138273@zte.com.cn Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-05-08reset: reset-hsdk: Use devm_platform_ioremap_resource()Ye Xingchen1-5/+2
Convert platform_get_resource(), devm_ioremap_resource() to a single call to Use devm_platform_ioremap_resource(), as this is exactly what this function does. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Ye Xingchen <ye.xingchen@zte.com.cn> Link: https://lore.kernel.org/r/202302161056304138337@zte.com.cn Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-05-08reset: lpc18xx: Use devm_platform_ioremap_resource()Ye Xingchen1-3/+1
Convert platform_get_resource(), devm_ioremap_resource() to a single call to Use devm_platform_ioremap_resource(), as this is exactly what this function does. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Ye Xingchen <ye.xingchen@zte.com.cn> Link: https://lore.kernel.org/r/202302161053360618204@zte.com.cn Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-05-08reset: axs10x: Use devm_platform_ioremap_resource()Ye Xingchen1-3/+1
Convert platform_get_resource(), devm_ioremap_resource() to a single call to Use devm_platform_ioremap_resource(), as this is exactly what this function does. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Ye Xingchen <ye.xingchen@zte.com.cn> Link: https://lore.kernel.org/r/202302161050336958071@zte.com.cn Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-05-08reset: ath79: Use devm_platform_ioremap_resource()Ye Xingchen1-3/+1
Convert platform_get_resource(), devm_ioremap_resource() to a single call to Use devm_platform_ioremap_resource(), as this is exactly what this function does. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Ye Xingchen <ye.xingchen@zte.com.cn> Link: https://lore.kernel.org/r/202302161049100728015@zte.com.cn Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-04-29Merge tag 'clk-for-linus' of ↵Linus Torvalds9-181/+319
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "Nothing looks out of the ordinary in this batch of clk driver updates. There are a couple patches to the core clk framework, but they're all basically cleanups or debugging aids. The driver updates and new additions are dominated in the diffstat by Qualcomm and MediaTek drivers. Qualcomm gained a handful of new drivers for various SoCs, and MediaTek gained a bunch of drivers for MT8188. The MediaTek drivers are being modernized as well, so there are updates all over that vendor's clk drivers. There's also a couple other new clk drivers in here, for example the Starfive JH7110 SoC support is added. Outside of the two major SoC vendors though, we have the usual collection of non-critical fixes and cleanups to various clk drivers. It's good to see that we're getting more cleanups and modernization patches. Maybe one day we'll be able to properly split clk providers from clk consumers. Core: - Print an informational message before disabling unused clks New Drivers: - BCM63268 timer clock and reset controller - Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and MT8195 SoCs - Mediatek MT8188 SoC clk drivers - Clock driver for Sunplus SP7021 SoC - Clk driver support for Loongson-2 SoCs - Clock driver for Skyworks Si521xx I2C PCIe clock generators - Initial Starfive JH7110 clk/reset support - Global clock controller drivers for Qualcomm SM7150, IPQ9574, MSM8917 and IPQ5332 SoCs - GPU clock controller drivers for SM6115, SM6125, SM6375 and SA8775P SoCs Updates: - Shrink size of clk_fractional_divider a little - Convert various clk drivers to devm_of_clk_add_hw_provider() - Convert platform clk drivers to remove_new() - Converted most Mediatek clock drivers to struct platform_driver - MediaTek clock drivers can be built as modules - Reimplement Loongson-1 clk driver with DT support - Migrate socfpga clk driver to of_clk_add_hw_provider() - Support for i3c clks on Aspeed ast2600 SoCs - Add clock generic devm_clk_hw_register_gate_parent_data - Add audiomix block control for i.MX8MP - Add support for determine_rate to i.MX composite-8m - Let the LCDIF Pixel clock of i.MX8MM and i.MX8MN set parent rate - Provide clock name in error message for clk-gpr-mux on get parent failure - Drop duplicate imx_clk_mux_flags macro - Register the i.MX8MP Media Disp2 Pix clock as bus clock - Add Media LDB root clock to i.MX8MP - Make i.MX8MP nand_usdhc_bus clock as non-critical - Fix the rate table for i.MX fracn-gppll - Disable HW control for the fracn-gppll in order to be controlled by register write - Add support for interger PLL in fracn-gppll - Add mcore_booted module parameter to i.MX93 provider - Add NIC, A55 and ARM PLL clocks to i.MX93 - Fix i.MX8ULP XBAR_DIVBUS and AD_SLOW clock parents - Use "divider closest" clock type for PLL4_PFD dividers on i.MX8ULP to get more accurate clock rates - Mark the MU0_Bi and TPM5 clocks on i.MX8ULP as critical - Update some of the i.MX critical clocks flags to allow glitchless on-the-fly rate change. - Add I2C5 clock on Renesas R-Car V3H - Exynos850: Add CMU_G3D clock controller for the Mali GPU - Extract Exynos5433 (ARM64) clock controller power management code to common driver parts - Exynos850: make PMU_ALIVE_PCLK clock critical - Add Audio, thermal, camera (CSI-2), Image Signal Processor/Channel Selector (ISPCS), and video capture (VIN) clocks on Renesas R-Car V4H - Add video capture (VIN) clocks on Renesas R-Car V3H - Add Cortex-A53 System CPU (Z2) clocks on Renesas R-Car V3M and V3H - Support for Stromer Plus PLL on Qualcomm IPQ5332 - Add a missing reset to Qualcomm QCM2290 - Migrate Qualcomm IPQ4019 to clk_parent_data - Make USB GDSCs enter retention state when disabled on Qualcomm SM6375, MSM8996 and MSM8998 SoCs - Set floor rounding clk_ops for Qualcomm QCM2290 SDCC2 clk - Add two EMAC GDSCs on Qualcomm SC8280XP - Use shared rcg clk ops in Qualcomm SM6115 GCC - Park Qualcomm SM8350 PCIe PIPE clks when disabled - Add GDSCs to Qualcomm SC7280 LPASS audio clock controller - Add missing XO clocks to Qualcomm MSM8226 and MSM8974 - Convert some Qualcomm clk DT bindings to YAML - Reparenting fix for the clock supplying camera modules on Rockchip rk3399 - Mark more critical (bus-)clocks on Rockchip rk3588" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (290 commits) clk: qcom: gcc-sc8280xp: Add EMAC GDSCs clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers clk: rockchip: rk3588: make gate linked clocks critical clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk clk: qcom: add the GPUCC driver for sa8775p dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property clk: starfive: Avoid casting iomem pointers clk: microchip: fix potential UAF in auxdev release callback clk: qcom: rpm: Use managed `of_clk_add_hw_provider()` clk: mediatek: fhctl: Mark local variables static clk: sifive: make SiFive clk drivers depend on ARCH_ symbols clk: uniphier: Use managed `of_clk_add_hw_provider()` clk: si5351: Use managed `of_clk_add_hw_provider()` clk: si570: Use managed `of_clk_add_hw_provider()` clk: si514: Use managed `of_clk_add_hw_provider()` clk: lmk04832: Use managed `of_clk_add_hw_provider()` ...
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-28 14:45:45 +0000