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path: root/drivers/iommu/arm-smmu.c
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2014-07-31Merge branches 'x86/vt-d', 'x86/amd', 'arm/omap', 'ppc/pamu', 'arm/smmu', 'ar...Joerg Roedel1-253/+240
2014-07-09iommu/arm-smmu: fix some checkpatch issuesMitchel Humpherys1-22/+37
2014-07-07iommu: Constify struct iommu_opsThierry Reding1-1/+1
2014-07-04iommu/arm-smmu: fix capability checking prior to device attachWill Deacon1-1/+2
2014-07-03iommu/arm-smmu: prefer stage-1 mappings where we have a choiceWill Deacon1-4/+4
2014-07-03iommu/arm-smmu: remove support for chained SMMUsWill Deacon1-186/+77
2014-07-03iommu/arm-smmu: caps: add IOMMU_CAP_INTR_REMAP capabilityWill Deacon1-5/+9
2014-07-03iommu/arm-smmu: add support for PCI master devicesWill Deacon1-86/+160
2014-07-02iommu/arm-smmu: fix calculation of TCR.T0SZWill Deacon1-1/+3
2014-05-02iommu/arm-smmu: fix incorrect use of S2CR_TYPE_SHIFTKefeng Wang1-1/+1
2014-05-02iommu/arm-smmu: allow 42-bit stage-1 output size with 64K pagesWill Deacon1-1/+1
2014-04-15iommu/arm-smmu: fix panic in arm_smmu_alloc_init_pteBin Wang1-1/+1
2014-04-15iommu/arm-smmu: Return 0 on unmap failureLaurent Pinchart1-1/+1
2014-02-27iommu/arm-smmu: fix incorrect comment regarding TLB invalidationWill Deacon1-3/+2
2014-02-24iommu/arm-smmu: provide option to dsb macro when publishing tablesWill Deacon1-1/+1
2014-02-24iommu/arm-smmu: clean up use of `flags' in page table handling codeWill Deacon1-19/+19
2014-02-24iommu/arm-smmu: support buggy implementations with secure cfg accessesAndreas Herrmann1-10/+48
2014-02-24iommu/arm-smmu: set MAX_MASTER_STREAMIDS to MAX_PHANDLE_ARGSAndreas Herrmann1-1/+1
2014-02-20arm/smmu: Use irqsafe spinlock for domain lockJoerg Roedel1-5/+7
2014-02-10iommu/arm-smmu: fix compilation issue when !CONFIG_ARM_AMBAWill Deacon1-0/+2
2014-02-10iommu/arm-smmu: set CBARn.BPSHCFG to NSH for s1-s2-bypass contextsWill Deacon1-4/+12
2014-02-10iommu/arm-smmu: fix table flushing during initial allocationsWill Deacon1-24/+27
2014-02-10iommu/arm-smmu: really fix page table lockingWill Deacon1-10/+10
2014-02-10iommu/arm-smmu: fix pud/pmd entry fill sequenceYifan Zhang1-4/+10
2013-12-16iommu/arm-smmu: add support for IOMMU_EXECWill Deacon1-3/+6
2013-12-16iommu/arm-smmu: use VA_BITS to determine arm64 virtual address spaceWill Deacon1-3/+2
2013-12-16iommu/arm-smmu: add devices attached to the SMMU to an IOMMU groupAntonios Motakis1-1/+18
2013-12-06iommu/arm-smmu: fix error return code in arm_smmu_device_dt_probe()Wei Yongjun1-0/+1
2013-12-06iommu/arm-smmu: remove potential NULL dereference on mapping pathWill Deacon1-2/+1
2013-12-06iommu/arm-smmu: use mutex instead of spinlock for locking page tablesWill Deacon1-36/+26
2013-11-15Merge tag 'iommu-updates-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds1-32/+37
2013-11-15iommu/arm-smmu: handle pgtable_page_ctor() failKirill A. Shutemov1-1/+4
2013-10-09iommu/arm-smmu: Clear global and context bank fault status registersAndreas Herrmann1-11/+20
2013-10-09iommu/arm-smmu: Print context fault informationAndreas Herrmann1-0/+3
2013-10-09iommu/arm-smmu: Check for num_context_irqs > 0 to avoid divide by zero exceptionAndreas Herrmann1-5/+4
2013-10-09iommu/arm-smmu: Refine check for proper size of mapped regionAndreas Herrmann1-5/+4
2013-10-09iommu/arm-smmu: Switch to subsys_initcall for driver registrationAndreas Herrmann1-1/+1
2013-10-09iommu/arm-smmu: use relaxed accessors where possibleWill Deacon1-3/+3
2013-10-09iommu/arm-smmu: replace devm_request_and_ioremap by devm_ioremap_resourceJulia Lawall1-8/+3
2013-09-17iommu/arm-smmu: don't enable SMMU device until probing has completedWill Deacon1-2/+2
2013-09-17iommu/arm-smmu: fix iommu_present() test in initDan Carpenter1-2/+2
2013-09-17iommu/arm-smmu: fix a signedness bugDan Carpenter1-2/+3
2013-08-14iommu/arm-smmu: Simplify VMID and ASID allocationWill Deacon1-22/+11
2013-08-14iommu/arm-smmu: Don't use VMIDs for stage-1 translationsWill Deacon1-13/+46
2013-08-14iommu/arm-smmu: Tighten up global fault reportingWill Deacon1-2/+5
2013-08-14iommu/arm-smmu: Remove broken big-endian checkWill Deacon1-6/+0
2013-06-25iommu/arm: Add support for ARM Ltd. System MMU architectureWill Deacon1-0/+1969
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