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drivers
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clk
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sunxi-ng
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ccu-sun8i-a33.c
Age
Commit message (
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Author
Files
Lines
2018-12-05
clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks
Chen-Yu Tsai
1
-3
/
+3
2018-12-05
clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLL
Chen-Yu Tsai
1
-13
/
+24
2017-07-21
clk: Convert to using %pOF instead of full_name
Rob Herring
1
-2
/
+1
2017-06-07
clk: sunxi-ng: Support multiple variable pre-dividers
Chen-Yu Tsai
1
-5
/
+5
2017-04-19
Merge tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel...
Stephen Boyd
1
-7
/
+11
2017-04-13
clk: sunxi-ng: a33: gate then ungate PLL CPU clk after rate change
Chen-Yu Tsai
1
-0
/
+11
2017-04-05
clk: sunxi-ng: a33: Add offset and minimum value for DDR1 PLL N factor
Chen-Yu Tsai
1
-7
/
+11
2017-01-27
clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for the GPU
Maxime Ripard
1
-1
/
+1
2017-01-17
clk: sunxi-ng: a33: Add CLK_SET_RATE_PARENT to ac-dig
Mylène Josserand
1
-1
/
+1
2017-01-02
clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33
Icenowy Zheng
1
-1
/
+1
2017-01-02
clk: sunxi-ng: fix PLL_CPUX adjusting on A33
Icenowy Zheng
1
-0
/
+10
2016-11-23
clk: sunxi-ng: enable so-said LDOs for A33 SoC's pll-mipi clock
Icenowy Zheng
1
-1
/
+1
2016-09-20
clk: sunxi-ng: Fix reset offset for the A23 and A33
Maxime Ripard
1
-8
/
+8
2016-09-10
clk: sunxi-ng: Add A33 CCU support
Maxime Ripard
1
-0
/
+780