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path: root/drivers/clk/clk-cdce925.c
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2017-01-09clk: cdce925: add support for CDCE913, CDCE937, and CDCE949Akinobu Mita1-25/+83
The CDCE925 is a member of the CDCE(L)9xx programmable clock generator family. There are also CDCE913, CDCE937, CDCE949 which have different number of PLLs and outputs. The clk-cdce925 driver supports only CDCE925 in the family. This adds support for the CDCE913, CDCE937, CDCE949, too. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Mike Looijmans <mike.looijmans@topic.nl> Cc: Michael Turquette <mturquette@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-12-08clk: cdce925: Fix limit checkChristophe JAILLET1-1/+1
It is likely that instead of '1>64', 'q>64' was expected. Moreover, according to datasheet, http://www.ti.com/lit/ds/symlink/cdce925.pdf SCAS847I - JULY 2007 - REVISED OCTOBER 2016 PLL settings limits are: 16 <= q <= 63 So change the upper limit check from 64 to 63. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-08-24clk: cdce925: Migrate to clk_hw based OF and provider APIsStephen Boyd1-19/+23
Now that we have clk_hw based provider APIs to register clks, we can get rid of struct clk pointers while registering clks in these drivers, allowing us to move closer to a clear split of consumer and provider clk APIs. Cc: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20clk: cdce925: Include clk.hStephen Boyd1-0/+1
This clock provider uses the consumer API, so include clk.h explicitly. Cc: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-06-10clk: cdce925: Fix printk size_t warningStephen Boyd1-1/+1
drivers/clk/clk-cdce925.c:550: warning: format ‘%u’ expects type ‘unsigned int’, but argument 6 has type ‘size_t’ Cc: Mike Looijmans <mike.looijmans@topic.nl> Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-06-03Add TI CDCE925 I2C controlled clock synthesizer driverMike Looijmans1-0/+749
This driver supports the TI CDCE925 programmable clock synthesizer. The chip contains two PLLs with spread-spectrum clocking support and five output dividers. The driver only supports the following setup, and uses a fixed setting for the output muxes: Y1 is derived from the input clock Y2 and Y3 derive from PLL1 Y4 and Y5 derive from PLL2 Given a target output frequency, the driver will set the PLL and divider to best approximate the desired output. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michael Turquette <mturquette@linaro.org>