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2016-11-16ARM: zynq: Fix pmu register description coding styleMichal Simek1-1/+2
Drop the space before/after '<' and '>'; and separate the entries to be a bit more readable. Reported-by: Julia Cartwright <julia@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Series-to: arm-soc Series-cc: julia@ni.com
2016-11-16ARM: zynq: Fix W=1 dtc 1.4 warningsMichal Simek1-2/+2
The patch removes these warnings reported by dtc 1.4: Warning (unit_address_vs_reg): Node /pmu has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /fixedregulator@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Julia Cartwright <julia@ni.com> Series-to: arm-soc
2016-11-16ARM: zynq: Remove skeleton.dtsiMichal Simek1-1/+2
Based on "ARM: dts: explicitly mark skeleton.dtsi as deprecated" (sha1: 9c0da3cc61f1233c2782e2d3d91e3d0707dd4ba5) skeleton.dtsi is deprecated. Move address and size-cells directly to zynq-7000.dtsi. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Julia Cartwright <julia@ni.com>
2015-12-14ARM: dt: zynq: Add labels to cpu nodes to allow overriding OPPs.Moritz Fischer1-2/+2
By adding labels to the cpu nodes in the dtsi, a dts that includes it can change the OPPs by referencing the cpu0 through the label. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-12-14ARM: dts: zynq: describe SLCR as simple-mfd rather than simple-busMasahiro Yamada1-1/+1
The SLCR (System-Level Control Registers) block is an MFD (Multi Function Device) rather than a bus. "simple-mfd" seems a more suitable compatible string than "simple-bus". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-12-14ARM: zynq: DT: Add interrupt-controller property to GPIOSoren Brinkmann1-0/+2
GPIO can be used as interrupt-controller. Add the missing properties to the GPIO node. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-10-17ARM: zynq: dt: Updated devicetree for Zynq 7000 platform.Moritz Fischer1-0/+5
Added addtional nodes required for FPGA Manager operation of the Xilinx Zynq Devc configuration interface. Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-08-21ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.Moritz Fischer1-0/+7
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-31ARM: zynq: DT: Add missing interrupt for L2 pl310Alex Wilson1-0/+1
Add pl310 interrupt to the Zynq devicetree. Signed-off-by: Alex Wilson <alex.david.wilson@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-31ARM: dts: zynq: Add OCM nodeMichal Simek1-1/+1
Add OCM node for all zynq boards. OCM location can changed but for all current boards this is the location where OCM is.` Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-05-28ARM: zynq: DT: Use the zynq binding with macbNathan Sullivan1-2/+2
Use the new zynq binding for macb ethernet, since it will disable half duplex gigabit like the Zynq TRM says to do. Also allow the compatible cadence gem binding that won't disable half duplex but works otherwise. Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-01-28ARM: zynq: DT: Fix binding for cadence WDTMichal Simek1-3/+1
Based on: "devicetree: Add Cadence WDT devicetree bindings documentation" (sha1: 191891c0378f44aec8e06e889a08d0b76fe6c5cb) - compatible string is cdns,wdt-r1p2 - remove device_type property - remove int reset property (reset-on-timeout is bool) Signed-off-by: Michal Simek <michal.simek@xilinx.com> Series-to: arm-soc Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-01-12ARM: zynq: DT: Add pinctrl informationSoren Brinkmann1-1/+7
Add pinctrl descriptions to the zc702 and zc706 device trees. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-01-08ARM: zynq: DT: Add USB to device treeSoren Brinkmann1-0/+20
Add USB nodes to zc702, zc706 and zed device trees. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-12-04Merge tag 'zynq-dt-for-3.19' of https://github.com/Xilinx/linux-xlnx into ↵Arnd Bergmann1-1/+0
next/dt Pull "arm: Xilinx Zynq dt patches for v3.19" from Michal Simek: - Declare Digilent and vendor - Add Zybo board support - Fix VDMA documentation to be align with the driver * tag 'zynq-dt-for-3.19' of https://github.com/Xilinx/linux-xlnx: arm: dts: zynq: Add Digilent ZYBO board arm: dts: zynq: Move crystal freq. to board level doc: dt: vendor-prefixes: Add Digilent Inc Documentation: devicetree: Fix Xilinx VDMA specification Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-12-01arm: dts: zynq: Move crystal freq. to board levelPeter Crosthwaite1-1/+0
The fact that all supported boards use the same 33MHz crystal is a co-incidence. The Zynq PS support a range of crystal freqs so the hardcoded setting should be removed from the dtsi. Re-implement it on the board level. This prepares support for Zynq boards with different crystal frequencies (e.g. the Digilent ZYBO). Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-10-20ARM: zynq: DT: trivial: Fix mc nodeMichal Simek1-1/+1
sed -i 's/}\ ;/};/g' Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-10-20ARM: zynq: DT: Add cadence watchdog nodeMichal Simek1-0/+11
Add the cadence watchdog node to the Zynq devicetree. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-10-20ARM: zynq: DT: Add missing reference for memory-controllerMichal Simek1-1/+1
Add missing reference for memory-controller. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-10-20ARM: zynq: DT: Add missing reference for ADCMichal Simek1-1/+1
Add missing reference for ADC node. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-10-20ARM: zynq: DT: Add missing address for L2 pl310Michal Simek1-1/+1
By in sync with others node and add also baseaddr to the node name. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-10-20ARM: zynq: DT: Remove 222 MHz OPPSoren Brinkmann1-1/+0
Due to dependencies between timer and CPU frequency, only changes by powers of two are allowed. The clocksource driver prevents other changes, but with cpufreq and its governors it can result in being spammed with error messages constantly. Hence, remove the 222 MHz OPP. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-10-20ARM: zynq: DT: Fix GEM register area sizeSoren Brinkmann1-2/+2
The size of the GEM's register area is only 0x1000 bytes. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-10-08Merge tag 'dt-for-linus' of ↵Linus Torvalds1-4/+10
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Arnd Bergmann: "As usual, this is the largest branch, though this time a little under half of the total changes with 307 individual non-merge changesets. The largest changes are the addition of new machines, in particular the Tegra based Chromebook, the Renesas r8a7794 SoC, and DT support for the old i.MX1 platform. Other changes include - at91: various sam9 and sama5 updates - exynos: much extended Peach Pi/Pit (Chromebook 2) support - keystone: new peripherals - meson: added DT for meson6 SoC - mvebu: new device support for Armada 370/375 - qcom: improved support for IPQ8064 and MSM8x60 - rockchip: much improved support for rk3288 - shmobile: lots of updates all over the place - sunxi: dts license change - sunxi: more a23 device support - vexpress: CLCD DT description" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (308 commits) ARM: DTS: meson: update DTSI to add watchdog node ARM: dts: keystone-k2l: fix mdio io start address ARM: dts: keystone-k2e: fix mdio io start address ARM: dts: keystone-k2e: update usb1 node for dma properties ARM: dts: keystone: fix io range for usb_phy0 Revert "Merge tag 'hix5hd2-dt-for-3.18' of git://github.com/hisilicon/linux-hisi into next/dt" Revert "ARM: dts: hix5hd2: add wdg node" ARM: dts: add rk3288 i2s controller ARM: vexpress: Add CLCD Device Tree properties ARM: bcm2835: add I2S pinctrl to device tree ARM: meson: documentation: add bindings documentation ARM: meson: dts: add basic Meson/Meson6/Meson6-atv1200 DTSI/DTS ARM: dts: mt6589: Change compatible string for GIC ARM: dts: mediatek: Add compatible property for aquaris5 ARM: dts: mt6589-aquaris5: Add boot argument earlyprintk ARM: dts: mt6589: Fix typo in GIC unit address ARM: dts: Build dtb for Mediatek board ARM: dts: keystone: fix bindings for pcie and usb clock nodes ARM: dts: keystone: k2l: Fix chip selects for SPI devices ARM: dts: keystone: add dsp gpio controllers nodes ...
2014-09-16ARM: zynq: DT: Add DDRC nodeSoren Brinkmann1-0/+5
Add the DDR controller to the Zynq devicetree. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-09-01ARM: zynq: DT: Fix coding style issues in dtsiMichal Simek1-4/+4
Remove space before semicolon. sed -i 's/}\ ;/};/g' arch/arm/boot/dts/zynq-* Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-09-01ARM: zynq: DT: Describe interrupt-names for pl330Michal Simek1-0/+2
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-09-01ARM: zynq: DT: Move size/address properties to dtsiSoren Brinkmann1-0/+4
Move the GEM's size and address cells properties to the common dtsi file. Cc: Andreas Färber <afaerber@suse.de> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-07-29ARM: zynq: DT: Add CAN nodeMichal Simek1-1/+25
Add node describing Zynq's CAN controller. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2014-07-28ARM: dts: zynq: Add SPIAndreas Färber1-0/+24
Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-07-25ARM: dts: zynq: Add DMAC for ParallellaAndreas Färber1-0/+16
Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-07-23ARM: zynq: DT: Add GPIO nodeSoren Brinkmann1-0/+10
Add node describing Zynq's GPIO controller. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-07-23ARM: zynq: DT: Add XADC nodeSoren Brinkmann1-0/+8
Add node for the Xilinx A/D Converter. Cc: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-07-18ARM: zynq: DT: Migrate UART to Cadence bindingSoren Brinkmann1-4/+4
The Zynq UART is Cadence IP and the driver has been renamed accordingly. Migrate the DT to use the new binding for the UART driver. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Acked-by: Rob Herring <robh@kernel.org> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-06-02Merge tag 'dt-for-3.16' of ↵Linus Torvalds1-15/+25
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next Pull ARM SoC devicetree updates from Olof Johansson: "As with previous release, this continues to be among the largest branches we merge, with lots of new contents. New things for this release are among other things: - DTSI contents for the new SoCs supported in 3.16 (see SoC pull request) - Qualcomm APQ8064 and APQ8084 SoCs and eval boards - Nvidia Jetson TK1 development board (Tegra T124-based) Two new SoCs that didn't need enough new platform code to stand out enough for me to notice when writing the SoC tag, but that adds new DT contents are: - TI DRA72 - Marvell Berlin 2Q" * tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits) ARM: dts: add secure firmware support for exynos5420-arndale-octa ARM: dts: add pmu sysreg node to exynos3250 ARM: dts: correct the usb phy node in exynos5800-peach-pi ARM: dts: correct the usb phy node in exynos5420-peach-pit ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410 ARM: dts: add dts files for exynos3250 SoC ARM: dts: add mfc node for exynos5800 ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi ARM: dts: enable fimd for exynos5800-peach-pi ARM: dts: enable display controller for exynos5800-peach-pi ARM: dts: enable hdmi for exynos5800-peach-pi ARM: dts: add dts file for exynos5800-peach-pi board ARM: dts: add dts file for exynos5800 SoC ARM: dts: add dts file for exynos5260-xyref5260 board ARM: dts: add dts files for exynos5260 SoC ARM: dts: update watchdog node name in exynos5440 ARM: dts: use key code macros on Origen and Arndale boards ARM: dts: enable RTC and WDT nodes on Origen boards ARM: dts: qcom: Add APQ8084-MTP board support ARM: dts: qcom: Add APQ8084 SoC support ...
2014-05-26Merge tag 'zynq-cleanup-for-3.16' of git://git.xilinx.com/linux-xlnx into ↵Olof Johansson1-0/+5
next/soc Merge "Xilinx Zynq changes for v3.16" from Michal Simek: arm: Xilinx Zynq cleanup patches for v3.16 - Add support for BIG Endian - Add SOC_BUS support - Sort Kconfig options - Fix early console * tag 'zynq-cleanup-for-3.16' of git://git.xilinx.com/linux-xlnx: ARM: zynq: Enable big-endian ARM: zynq: Fix uart0 early console virtual address clocksource: cadence_ttc: Use readl/writel_relaxed instead of __raw ARM: zynq: Sort Kconfig options ARM: zynq: Add support for SOC_BUS Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-20ARM: zynq: Add support for SOC_BUSMichal Simek1-0/+5
Provide information through SOC_BUS to user space. Silicon revision is provided through devcfg device. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-16ARM: zynq: dt: Add a fixed regulator for CPU voltageSoren Brinkmann1-0/+10
To silence the warning cpufreq_cpu0: failed to get cpu0 regulator: -19 from the cpufreq driver regarding a missing regulator, add a fixed regulator to the DT. Zynq does not support voltage scaling and the CPU rail should always be supplied with 1 V, hence it is added in the SOC-level dtsi. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-06ARM: zynq: dt: Clean up device treeSoren Brinkmann1-14/+15
- Use generic node names - Fix up some weird formatting and white spaces - Update copyright info Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2014-04-28ARM: dts: zynq: drop address cells from GIC nodeLucas Stach1-1/+0
This is likely a copy-and-paste error from the ARM GIC documentation, that has already been fixed. address-cells should have been set to 0, as with the size cells. As having those properties set to 0 is the same thing as not specifying them, drop them completely. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-04-22ARM: zynq: dt: Add I2C nodes to Zynq device treeSoren Brinkmann1-0/+22
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-04-22ARM: zynq: DT: Add 'clock-latency' propertySoren Brinkmann1-0/+1
Specify the 'clock-latency' property to avoid certain cpufreq governors from refusing to work with the following error: ondemand governor failed, too long transition latency of HW, fallback to performance governor Reported-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-04-05Merge tag 'tags/cleanup2-3.15' of ↵Linus Torvalds1-23/+21
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late cleanups from Arnd Bergmann: "These could not be part of the first cleanup branch, because they either came too late in the cycle, or they have dependencies on other branches. Important changes are: - The integrator platform is almost multiplatform capable after some reorganization (Linus Walleij) - Minor cleanups on Zynq (Michal Simek) - Lots of changes for Exynos and other Samsung platforms, including further preparations for multiplatform support and the clocks bindings are rearranged" * tag 'tags/cleanup2-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits) devicetree: fix newly added exynos sata bindings ARM: EXYNOS: Fix compilation error in cpuidle.c ARM: S5P64X0: Explicitly include linux/serial_s3c.h in mach/pm-core.h ARM: EXYNOS: Remove hardware.h file ARM: SAMSUNG: Remove hardware.h inclusion ARM: S3C24XX: Remove invalid code from hardware.h dt-bindings: clock: Move exynos-audss-clk.h to dt-bindings/clock ARM: dts: Keep some essential LDOs enabled for arndale-octa board ARM: dts: Disable MDMA1 node for arndale-octa board ARM: S3C64XX: Fix build for implicit serial_s3c.h inclusion serial: s3c: Fix build of header without serial_core.h preinclusion ARM: EXYNOS: Allow wake-up using GIC interrupts ARM: EXYNOS: Stop using legacy Samsung PM code ARM: EXYNOS: Remove PM initcalls and useless indirection ARM: EXYNOS: Fix abuse of CONFIG_PM ARM: SAMSUNG: Move s3c_pm_check_* prototypes to plat/pm-common.h ARM: SAMSUNG: Move common save/restore helpers to separate file ARM: SAMSUNG: Move Samsung PM debug code into separate file ARM: SAMSUNG: Consolidate PM debug functions ARM: SAMSUNG: Use debug_ll_addr() to get UART base address ...
2014-04-05Merge tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-0/+1
Pull ARM SoC device tree changes from Arnd Bergmann: "A large part of the arm-soc patches are nowadays DT changes, adding support for new SoCs, boards and devices without changing kernel source. The plan is still to move the devicetree files out of the kernel tree and reduce the amount of churn going on here, but we keep finding reasons to delay doing that. Changes are really all over the place, with little sticking out particularly. We have contributions from a total of 116 people in this branch. Unfortunately, the size of this branch also causes a significant number of conflicts at the moment, typically when subsystem maintainers merge patches that change the driver at the same time as the dts files. In most cases this could be avoided because the dts changes are supposed to be compatible in both ways, and we are asking everyone to send ARM dts changes through our tree only" * tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (541 commits) dts: stmmac: Document the clocks property in the stmmac base document dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac. ARM: STi: stih41x: Add support for the FSM Serial Flash Controller ARM: STi: stih416: Add support for the FSM Serial Flash Controller ARM: tegra: fix Dalmore pinctrl configuration ARM: dts: keystone: use common "ti,keystone" compatible instead of -evm ARM: dts: k2hk-evm: set ubifs partition size for 512M NAND ARM: dts: Build all keystone dt blobs ARM: dts: keystone: Fix control register range for clktsip ARM: dts: keystone: Fix domain register range for clkfftc1 ARM: dts: bcm28155-ap: leave camldo1 on to fix reboot ARM: dts: add bcm590xx pmu support and enable for bcm28155-ap ARM: dts: bcm21664: Add device tree files. ARM: DT: bcm21664: Device tree bindings ARM: efm32: properly namespace i2c location property ARM: efm32: fix unit address part in USART2 device nodes' names ARM: mvebu: Enable NAND controller in Armada 385-DB ARM: mvebu: Add support for NAND controller in Armada 38x SoC ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs ...
2014-03-11arm: zynq: Add support for cpufreqSoren Brinkmann1-0/+6
The generic cpufreq-cpu0 driver can scale the CPU frequency on Zynq SOCs. Add the required platform device to the BSP and appropriate OPPs to the dts. Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: devicetree@vger.kernel.org Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Michal Simek <michal.simek@xilinx.com>
2014-02-10ARM: zynq: Map I/O memory on clkc initMichal Simek1-22/+20
The clkc has its registers in the range of the slcr. Instead of passing around the slcr base address pointer, let the clkc get the address from the DT. This prepares the slcr to be a real driver with multiple memory ranges (slcr, clocks, pinctrl,...) Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-10ARM: zynq: Split slcr in two partsMichal Simek1-1/+1
Split the slcr into an early part for unlocking and cpu starting and a later syscon driver. Also add "syscon" compatible property for slcr. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-03arm: dt: zynq: Add fclk-enable property to clkc nodeSoren Brinkmann1-0/+1
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-01-31ARM: dts: zynq: Add SDHCI nodesSoren Brinkmann1-0/+20
Add nodes for the Arasan SDHCI controller to Zynq dts files. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-12arm: dt: zynq: Add 'cpus' nodeSoren Brinkmann1-0/+19
Add a 'cpus' node to describe the CPU cores of Zynq. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-21 09:06:39 +0000