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2013-02-20drm/nvc0/graph: remove redundant null checksMarcin Slusarz1-6/+3
It's safe to call kfree(NULL). Found by smatch. Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/fan: fix selection of fan speed when fan->get returns an errorMarcin Slusarz1-3/+3
fan->get returns int, but we write it to unsigned variable, and then check whether it's >= 0 (it always is) Found by smatch: drivers/gpu/drm/nouveau/core/subdev/therm/fan.c:61 nouveau_fan_update() warn: always true condition '(duty >= 0) => (0-u32max >= 0)' Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau: quiet static-related sparse noiseMarcin Slusarz8-11/+11
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/bios: tiny debugging messages fixesMarcin Slusarz1-2/+2
COPY_ZM_REG: destination and source addresses were swapped RAM_RESTRICT_ZM_REG_GROUP: missing 0x prefix for register address Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau: mark nv_printk_ as printf-like functionMarcin Slusarz10-16/+17
...and fix all warnings Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau: share fence structures between nv10+ and nv50 implementationsMarcin Slusarz3-27/+24
We already rely on them having the same fields and layout. Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/fan: handle the cases where we are outside of the linear zoneMartin Peres1-0/+7
This fixes a bug where, when temperature is outside of the linear range, fan pwm would be outside of the allowed range ([0, 100]) and could get negative in some cases. It seems like a regression that happened when we re-worked the fan management logic before merging. Tested-by: Ozan Çağlayan <ozancag@gmail.com> Signed-off-by: Martin Peres <martin.peres@labri.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau: report channel owner in error messagesMarcin Slusarz18-107/+199
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau: prepare for reporting channel ownerMarcin Slusarz7-5/+36
- record channel owner process name - add some helpers for accessing this information - let nouveau_enum hold additional value (will be needed in the next patch) Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau: use pr_contMarcin Slusarz16-53/+53
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau: split fifo interrupt handlerMarcin Slusarz1-86/+88
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/therm: force a minimum hysteresis on temperature alarm thresholdsMartin Peres1-0/+7
This should avoid the situation where a user gets its kernel logs flooded when temperature oscillates around a threshold with 0°C hysteresis. This patch is just meant to fix broken vbios (as reported on a nv4e on sysfs hwmon interface. Signed-off-by: Martin Peres <martin.peres@labri.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau: set legacy bios data before parsing the structureEmil Velikov1-2/+2
Commit 767baf82 drm/nouveau: remove some more unnecessary legacy bios code has introduced a regression my misplacing the code that sets the major/chip versions, which are used whist parsing the bmp/bit structure in vbios Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/therm: don't try pwm/toggle control if GPIO_FAN is inputBen Skeggs2-7/+23
My GTX660 has the GPIO_FAN function, but it's configured in input-mode; presumably to monitor the frequency set by an I2C fan controller? Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/bios: rename DCB_GPIO_PWM_FAN to DCB_GPIO_FANBen Skeggs3-4/+4
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/bios: add support for parsing xpio table dataBen Skeggs5-4/+105
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau: remove some more unnecessary legacy bios codeBen Skeggs2-66/+5
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau: remove legacy vbios type detectionBen Skeggs1-42/+20
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/hwmon: create hwmon attributes under hwmon device in sysfsBen Skeggs1-6/+6
From browsing my /sys, a few other things seem to do this, and it looks cleaner this way too :) Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/hwmon: s/fan0/fan1/Ben Skeggs2-4/+4
Fan speed info now shown by sensors. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/therm: better transitions and debug loggingBen Skeggs5-36/+46
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2013-02-20drm/nouveau/doc: document the sysfs thermal management interfaceMartin Peres1-0/+81
Signed-off-by: Martin Peres <martin.peres@labri.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/hwmon: add missing alarm thresholdsMartin Peres1-0/+215
Expose all the hysteresis parameters + shutdown (emergency) + fan_boost (fixed pwm trip point). Signed-off-by: Martin Peres <martin.peres@labri.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/therm: implement support for temperature alarmsMartin Peres9-1/+366
For now, we only boost the fan speed to the maximum and auto-mode when hitting the FAN_BOOST threshold and halt the computer when it reaches the shutdown temperature. The downclock and critical thresholds do nothing. On nv43:50 and nva3+, temperature is polled because of the limited hardware. I'll improve the nva3+ situation by implementing alarm management in PDAEMON whenever I can but polling once every second shouldn't be such a problem. v2 (Ben Skeggs): - rebased v3: fixed false-detections and threshold reprogrammation handling on nv50:nvc0 Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2013-02-20drm/nv41/bus: report useful data on mmio faultMartin Peres2-3/+15
Based on Ben Skeggs's nvc0 patch. Tested on my nv4b, 84 and 92. Signed-off-by: Martin Peres <martin.peres@labri.fr>
2013-02-20drm/nvc0/bus: report useful data on mmio faultBen Skeggs1-5/+10
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/pbus: add a PBUS subdev that hands IRQs to the right subdevsMartin Peres21-4/+517
We are going to use PTHERM's IRQs for thermal monitoring but we need to route them first. On nv31-50, PBUS's IRQ line is shared with GPIOs IRQs. It seems like nv10-31 GPIO interruptions aren't well handled. I kept the original behaviour but it is wrong and may lead to an IRQ storm. Since we enable all PBUS IRQs, we need a way to avoid being stormed if we don't handle them. The solution I used was to mask the IRQs that have not been handled. This will also print one message in the logs to let us know. v2: drop the shared intr handler because of was racy v3: style fixes v4: drop a useless construct in the chipset-dependent INTR v5: add BUS to the disable mask v6 (Ben Skeggs): - general tidy to match the rest of the driver's style - nva3->nvc0, nva3 can be serviced just fine with nv50.c, rnndb even notes that the THERM_ALARM bit got left in the hw until fermi anyway.. so, it's not going to conflict - removed the peephole and user stuff, for the moment.. will handle them later if we find a good reason to actually care.. - limited INTR_EN to just what we can handle for now, mostly to prevent spam of unknown status bits (seen on at least nv4x) Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2013-02-20drm/nouveau/therm: implement automatic fan managementMartin Peres4-40/+139
v2: improved design but drops safety monitoring (to be in a later patch) v3: fix locking and mode management v4: gently fallback to the no-control mode when temperature cannot be got and use kernel-provided min/max macros v5 (Ben Skeggs): - rebased on my previous patches v6: fix hysterisis management in trip-based auto fan management This commit also forbids access to fan management to nvc0+ chipsets as fan management is already taken care of my PDAEMON's default fw. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2013-02-20drm/nouveau/fan: obey fan bump/slow periods as defined by vbiosMartin Peres3-13/+82
v2 (Ben Skeggs): - split from larger patch - fixed to not require alarm resched patch Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2013-02-20drm/nouveau/bios: parse fan bump/slow periods, and trip pointsMartin Peres2-0/+42
Signed-off-by: Martin Peres <martin.peres@labri.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/fan: add toggle fan supportMartin Peres6-9/+132
v2: change percent from int to atomic_t v3: random fixes v4 (Ben Skeggs): - adapted for split-out fan-control "protocol" structure - removed need for timer resched - support for forcing 'toggle' control on PWM boards Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2013-02-20drm/nouveau/therm: cleanly separate pwm control logic from thermBen Skeggs11-135/+290
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2013-02-20drm/nouveau/therm: add interfaces to allow forcing off pwm fan controlBen Skeggs5-8/+56
Mostly to allow for the possibility of testing 'toggle' fan control easily. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2013-02-20drm/nvd0/therm: add support for hardware fan tachometerBen Skeggs3-2/+27
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nva3/therm: add support for hardware fan tachometerBen Skeggs5-12/+111
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/therm: collect fan tach info in common fan constructorBen Skeggs2-5/+17
This info will be used by two more implementations in upcoming commits. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2013-02-20drm/nouveau/therm: fix various style issues, make more consistentBen Skeggs7-74/+86
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2013-02-20nvd0/therm: implement more appropriate pwm fan control functionsBen Skeggs6-4/+129
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20Merge branch 'drm-intel-fixes' of ↵Dave Airlie24-238/+482
git://people.freedesktop.org/~danvet/drm-intel into drm-next So here's my promised pile of fixes for 3.9. I've dropped the core prep patches for vt-switchless suspend/resume as discussed on irc. Highlights: - Fix dmar on g4x. Not really gfx related, but I'm fed up with getting blamed for dmar crapouts. - Disable wc ptes updates on ilk when dmar is enabled (Chris). So again, dmar, but this time gfx related :( - Reduced range support for hsw, using the pipe CSC (Ville). - Fixup pll limits for gen3/4 (Patrick Jakobsson). The sdvo patch is already confirmed to fix 2 bug reports, so added cc: stable on that one. - Regression fix for 8bit fb console (Ville). - Preserve lane reversal bits on DDI/FDI ports (Damien). - Page flip vs. gpu hang fixes (Ville). Unfortuntely not quite all of them, need to decide what to do with the currently still in-flight ones. - Panel fitter regression fix from Mika Kuoppala (was accidentally left on on some pipes with the new modset code since 3.7). This also improves the modeset sequence and might help a few other unrelated issues with lvds. - Write backlight regs even harder ... another installement in our eternal fight against the BIOS and backlights. - Fixup lid notifier vs. suspend/resume races (Zhang Rui). Prep work for new ACPI stuff, but closing the race itself seems worthwile on its own. - A few other small fixes and tiny cleanups all over. Lots of the patches are cc: stable since I've stalled on a few not-so-important fixes for 3.8 due to the grumpy noise Linus made. * 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel: (33 commits) intel/iommu: force writebuffer-flush quirk on Gen 4 Chipsets drm/i915: Disable WC PTE updates to w/a buggy IOMMU on ILK drm/i915: Implement pipe CSC based limited range RGB output drm/i915: inverted brightness quirk for Acer Aspire 4736Z drm/i915: Print the hw context status is debugfs drm/i915: Use HAS_L3_GPU_CACHE in i915_gem_l3_remap drm/i915: Fix PIPE_CONTROL DW/QW write through global GTT on IVB+ drm/i915: Set i9xx sdvo clock limits according to specifications drm/i915: Set i9xx lvds clock limits according to specifications drm/i915: Preserve the DDI link reversal configuration drm/i915: Preserve the FDI line reversal override bit on CPT drm/i915: add missing \n to UTS_RELEASE in the error_state drm: Use C8 instead of RGB332 when determining the format from depth/bpp drm: Fill depth/bits_per_pixel for C8 format drm/i915: don't clflush gem objects in stolen memory drm/i915: Don't wait for page flips if there was GPU reset drm/i915: Kill obj->pending_flip drm/i915: Fix a typo in a intel_modeset_stage_output_state() comment drm/i915: remove bogus mutex_unlock from error-path drm/i915: Print the pipe control page GTT address ...
2013-02-20intel/iommu: force writebuffer-flush quirk on Gen 4 ChipsetsDaniel Vetter1-1/+7
We already have the quirk entry for the mobile platform, but also reports on some desktop versions. So be paranoid and set it everywhere. References: http://www.mail-archive.com/dri-devel@lists.freedesktop.org/msg33138.html Cc: stable@vger.kernel.org Cc: David Woodhouse <dwmw2@infradead.org> Cc: "Sankaran, Rajesh" <rajesh.sankaran@intel.com> Reported-and-tested-by: Mihai Moldovan <ionic@ionic.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-02-20drm/i915: Disable WC PTE updates to w/a buggy IOMMU on ILKChris Wilson1-2/+35
Whilst IOMMU is enabled for the Intel GPU on Ironlake, it appears that using WC writes to update the PTE on the GPU fails miserably. The result looks like the majority of the writes do not land leading to lots of screen corruption and a hard system hang. v2: s/</<=/ to preserve the current exclusion of Sandybridge Reported-by: Nathan Myers <ncm@cantrip.org> Bugzilla: https://bugzilla.freedesktop.org/show_bug.cgi?id=60391 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Tested-by: Nathan Myers <ncm@cantrip.org> [danvet: Remove cc: stable and add tested-by.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-02-20drm/i915: Implement pipe CSC based limited range RGB outputVille Syrjälä3-2/+124
HSW no longer has the PIPECONF bit for limited range RGB output. Instead the pipe CSC unit must be used to perform that task. The CSC pre offset are set to 0, since the incoming data is full [0:255] range RGB, the coefficients are programmed to compress the data into [0:219] range, and then we use either the CSC_MODE black screen offset bit, or the CSC post offsets to shift the data to the correct [16:235] range. Also have to change the confiuration of all planes so that the data is sent through the pipe CSC unit. For simplicity send the plane data through the pipe CSC unit always, and in case full range output is requested, the pipe CSC unit is set up with an identity transform to pass the plane data through unchanged. I've been told by some hardware people that the use of the pipe CSC unit shouldn't result in any measurable increase in power consumption numbers. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-02-20drm/i915: inverted brightness quirk for Acer Aspire 4736ZDaniel Vetter1-0/+3
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=53881 Cc: stable@vger.kernel.org Cc: Jani Nikula <jani.nikula@intel.com> Tested-by: Jani Monoses <jani@ubuntu.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-02-20drm/i915: Print the hw context status is debugfsBen Widawsky1-1/+10
Print out the HW context object information per ring. Even though the existing code only utilizes the render ring, it's simple enough to support future expansion. I had this in a patch somewhere in a rev of the original implementation, but I must have lost it. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> [danvet: s/context/default context/ bikeshed applied.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-02-20drm/i915: Use HAS_L3_GPU_CACHE in i915_gem_l3_remapDaniel Vetter1-1/+1
Yet another remnant ... this might explain why l3 remapping didn't really work on HSW. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57441 Spotted-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: stable@vger.kernel.org Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-02-20drm/i915: Fix PIPE_CONTROL DW/QW write through global GTT on IVB+Ville Syrjälä2-1/+3
The bit controlling whether PIPE_CONTROL DW/QW write targets the global GTT or PPGTT moved moved from DW 2 bit 2 to DW 1 bit 24 on IVB. I verified on IVB that the fix is in fact effective. Without the fix none of the scratch writes actually landed in the pipe control page. With the fix the writes show up correctly. v2: move PIPE_CONTROL_GLOBAL_GTT_IVB setup to where other flags are set Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-02-20drm/i915: Set i9xx sdvo clock limits according to specificationsPatrik Jakobsson1-2/+2
The Intel PRM says the M1 and M2 divisors must be in the range of 10-20 and 5-9. Since we do all calculations based on them being register values (which are subtracted by 2) we need to specify them accordingly. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56359 Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-02-20drm/i915: Set i9xx lvds clock limits according to specificationsPatrik Jakobsson1-2/+2
The Intel PRM says the M1 and M2 divisors must be in the range of 10-20 and 5-9. Since we do all calculations based on them being register values (which are subtracted by 2) we need to specify them accordingly. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-02-20drm/i915: Preserve the DDI link reversal configurationDamien Lespiau3-3/+18
Similarly to: commit 6a0d1df3d3a0d2370541164eb0595fe35dcd6de3 Author: Damien Lespiau <damien.lespiau@intel.com> Date: Tue Dec 11 15:18:28 2012 +0000 drm/i915: Preserve the FDI line reversal override bit on CPT DDI port support lane reversal to easy the PCB layouting work. Let's preserve the bit configured by the BIOS (until we find how to correctly retrieve the information from the VBT, but this does sound more fragile then just relying on the BIOS that has, hopefully, been validated already. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-02-20drm/i915: Preserve the FDI line reversal override bit on CPTDamien Lespiau4-11/+13
The FDI link has supported link reversal to make the PCB layout engineer's life easier for quite a while and we have always presered this bit as we programmed FDI_RX_CTL with a read/modify/write sequence. We're trying to take a bit more control over what the BIOS leaves in various register and with the introduction of DDI, started to program FDI_RX_CTL fully. There's a fused bit to indicate DMI link reversal and FDI defaults to mirroring that configuration. We have a bit to override that behaviour that we need to preserve from the BIOS. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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