diff options
| -rw-r--r-- | drivers/gpu/drm/xe/xe_module.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_pci.c | 7 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_uc_fw.c | 3 |
3 files changed, 12 insertions, 1 deletions
diff --git a/drivers/gpu/drm/xe/xe_module.c b/drivers/gpu/drm/xe/xe_module.c index 07b27114be9a..0f2c20e9204a 100644 --- a/drivers/gpu/drm/xe/xe_module.c +++ b/drivers/gpu/drm/xe/xe_module.c @@ -21,6 +21,9 @@ struct xe_modparam xe_modparam = { .probe_display = true, .guc_log_level = 3, .force_probe = CONFIG_DRM_XE_FORCE_PROBE, +#ifdef CONFIG_PCI_IOV + .max_vfs = IS_ENABLED(CONFIG_DRM_XE_DEBUG) ? ~0 : 0, +#endif .wedged_mode = 1, /* the rest are 0 by default */ }; diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c index 6b7f77425c7f..7d146e3e8e21 100644 --- a/drivers/gpu/drm/xe/xe_pci.c +++ b/drivers/gpu/drm/xe/xe_pci.c @@ -241,6 +241,7 @@ static const struct xe_device_desc adl_s_desc = { PLATFORM(ALDERLAKE_S), .has_display = true, .has_llc = true, + .has_sriov = IS_ENABLED(CONFIG_DRM_XE_DEBUG), .require_force_probe = true, .subplatforms = (const struct xe_subplatform_desc[]) { { XE_SUBPLATFORM_ALDERLAKE_S_RPLS, "RPLS", adls_rpls_ids }, @@ -256,6 +257,7 @@ static const struct xe_device_desc adl_p_desc = { PLATFORM(ALDERLAKE_P), .has_display = true, .has_llc = true, + .has_sriov = IS_ENABLED(CONFIG_DRM_XE_DEBUG), .require_force_probe = true, .subplatforms = (const struct xe_subplatform_desc[]) { { XE_SUBPLATFORM_ALDERLAKE_P_RPLU, "RPLU", adlp_rplu_ids }, @@ -269,6 +271,7 @@ static const struct xe_device_desc adl_n_desc = { PLATFORM(ALDERLAKE_N), .has_display = true, .has_llc = true, + .has_sriov = IS_ENABLED(CONFIG_DRM_XE_DEBUG), .require_force_probe = true, }; @@ -307,6 +310,7 @@ static const struct xe_device_desc ats_m_desc = { DG2_FEATURES, .has_display = false, + .has_sriov = IS_ENABLED(CONFIG_DRM_XE_DEBUG), }; static const struct xe_device_desc dg2_desc = { @@ -318,7 +322,7 @@ static const struct xe_device_desc dg2_desc = { .has_display = true, }; -static const __maybe_unused struct xe_device_desc pvc_desc = { +static const struct xe_device_desc pvc_desc = { .graphics = &graphics_xehpc, DGFX_FEATURES, PLATFORM(PVC), @@ -393,6 +397,7 @@ static const struct pci_device_id pciidlist[] = { INTEL_ATS_M_IDS(INTEL_VGA_DEVICE, &ats_m_desc), INTEL_ARL_IDS(INTEL_VGA_DEVICE, &mtl_desc), INTEL_DG2_IDS(INTEL_VGA_DEVICE, &dg2_desc), + INTEL_PVC_IDS(INTEL_VGA_DEVICE, &pvc_desc), INTEL_MTL_IDS(INTEL_VGA_DEVICE, &mtl_desc), INTEL_LNL_IDS(INTEL_VGA_DEVICE, &lnl_desc), INTEL_BMG_IDS(INTEL_VGA_DEVICE, &bmg_desc), diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c index fb0eda3d5682..9c14b0adad0c 100644 --- a/drivers/gpu/drm/xe/xe_uc_fw.c +++ b/drivers/gpu/drm/xe/xe_uc_fw.c @@ -107,9 +107,11 @@ struct fw_blobs_by_type { }; #define XE_GUC_FIRMWARE_DEFS(fw_def, mmp_ver, major_ver) \ + fw_def(PANTHERLAKE, mmp_ver(xe, guc, ptl, 70, 36, 0)) \ fw_def(BATTLEMAGE, major_ver(xe, guc, bmg, 70, 29, 2)) \ fw_def(LUNARLAKE, major_ver(xe, guc, lnl, 70, 29, 2)) \ fw_def(METEORLAKE, major_ver(i915, guc, mtl, 70, 29, 2)) \ + fw_def(PVC, mmp_ver(xe, guc, pvc, 70, 29, 2)) \ fw_def(DG2, major_ver(i915, guc, dg2, 70, 29, 2)) \ fw_def(DG1, major_ver(i915, guc, dg1, 70, 29, 2)) \ fw_def(ALDERLAKE_N, major_ver(i915, guc, tgl, 70, 29, 2)) \ @@ -119,6 +121,7 @@ struct fw_blobs_by_type { fw_def(TIGERLAKE, major_ver(i915, guc, tgl, 70, 29, 2)) #define XE_HUC_FIRMWARE_DEFS(fw_def, mmp_ver, no_ver) \ + fw_def(PANTHERLAKE, mmp_ver(xe, huc, ptl, 10, 2, 1)) \ fw_def(BATTLEMAGE, no_ver(xe, huc, bmg)) \ fw_def(LUNARLAKE, no_ver(xe, huc, lnl)) \ fw_def(METEORLAKE, no_ver(i915, huc_gsc, mtl)) \ |