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authorJerome Brunet <jbrunet@baylibre.com>2018-02-19 12:21:45 +0100
committerNeil Armstrong <narmstrong@baylibre.com>2018-03-13 10:09:58 +0100
commit05f814402d6174369b3b29832cbb5eb5ed287059 (patch)
tree55806276dd6ea4734e2ec86238680c4e4ec06961 /lib/crc8.c
parent513b67ac39b0ef91761d94d1d6e31bb84e380744 (diff)
clk: meson: add fdiv clock gates
Fdiv fixed dividers clocks of the fixed_pll can actually gate independently. We never had an issue so far because these clocks were provided 'enabled' by the bootloader. Add these gates to enable/disable the clocks when required. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Diffstat (limited to 'lib/crc8.c')
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