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authorClaudiu Beznea <claudiu.beznea@microchip.com>2020-11-13 17:21:09 +0200
committerMark Brown <broonie@kernel.org>2020-11-13 16:13:10 +0000
commit322eb8666d2f50556e89d73b54cf2dad8703c4e0 (patch)
treecb693c8c8cb010a518c1541f26b4c013f96aa542 /drivers
parent3e5532a011b09861abc2da3aa518b9aafc250570 (diff)
regulator: mcp16502: add support for ramp delay
MCP16502 have configurable ramp delay support (via DVSR bits in regulators' CFG register). Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1605280870-32432-6-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/regulator/mcp16502.c89
1 files changed, 87 insertions, 2 deletions
diff --git a/drivers/regulator/mcp16502.c b/drivers/regulator/mcp16502.c
index 48eb64bc4018..f81afeeddb19 100644
--- a/drivers/regulator/mcp16502.c
+++ b/drivers/regulator/mcp16502.c
@@ -22,8 +22,9 @@
#define VDD_LOW_SEL 0x0D
#define VDD_HIGH_SEL 0x3F
-#define MCP16502_FLT BIT(7)
-#define MCP16502_ENS BIT(0)
+#define MCP16502_FLT BIT(7)
+#define MCP16502_DVSR GENMASK(3, 2)
+#define MCP16502_ENS BIT(0)
/*
* The PMIC has four sets of registers corresponding to four power modes:
@@ -88,6 +89,12 @@ enum mcp16502_reg {
MCP16502_REG_CFG,
};
+/* Ramp delay (uV/us) for buck1, ldo1, ldo2. */
+static const int mcp16502_ramp_b1l12[] = { 6250, 3125, 2083, 1563 };
+
+/* Ramp delay (uV/us) for buck2, buck3, buck4. */
+static const int mcp16502_ramp_b234[] = { 3125, 1563, 1042, 781 };
+
static unsigned int mcp16502_of_map_mode(unsigned int mode)
{
if (mode == REGULATOR_MODE_NORMAL || mode == REGULATOR_MODE_IDLE)
@@ -271,6 +278,80 @@ static int mcp16502_get_status(struct regulator_dev *rdev)
return REGULATOR_STATUS_UNDEFINED;
}
+static int mcp16502_set_voltage_time_sel(struct regulator_dev *rdev,
+ unsigned int old_sel,
+ unsigned int new_sel)
+{
+ static const u8 us_ramp[] = { 8, 16, 24, 32 };
+ int id = rdev_get_id(rdev);
+ unsigned int uV_delta, val;
+ int ret;
+
+ ret = regmap_read(rdev->regmap, MCP16502_REG_BASE(id, CFG), &val);
+ if (ret)
+ return ret;
+
+ val = (val & MCP16502_DVSR) >> 2;
+ uV_delta = abs(new_sel * rdev->desc->linear_ranges->step -
+ old_sel * rdev->desc->linear_ranges->step);
+ switch (id) {
+ case BUCK1:
+ case LDO1:
+ case LDO2:
+ ret = DIV_ROUND_CLOSEST(uV_delta * us_ramp[val],
+ mcp16502_ramp_b1l12[val]);
+ break;
+
+ case BUCK2:
+ case BUCK3:
+ case BUCK4:
+ ret = DIV_ROUND_CLOSEST(uV_delta * us_ramp[val],
+ mcp16502_ramp_b234[val]);
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ return ret;
+}
+
+static int mcp16502_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
+{
+ const int *ramp;
+ int id = rdev_get_id(rdev);
+ unsigned int i, size;
+
+ switch (id) {
+ case BUCK1:
+ case LDO1:
+ case LDO2:
+ ramp = mcp16502_ramp_b1l12;
+ size = ARRAY_SIZE(mcp16502_ramp_b1l12);
+ break;
+
+ case BUCK2:
+ case BUCK3:
+ case BUCK4:
+ ramp = mcp16502_ramp_b234;
+ size = ARRAY_SIZE(mcp16502_ramp_b234);
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ for (i = 0; i < size; i++) {
+ if (ramp[i] == ramp_delay)
+ break;
+ }
+ if (i == size)
+ return -EINVAL;
+
+ return regmap_update_bits(rdev->regmap, MCP16502_REG_BASE(id, CFG),
+ MCP16502_DVSR, (i << 2));
+}
+
#ifdef CONFIG_SUSPEND
/*
* mcp16502_suspend_get_target_reg() - get the reg of the target suspend PMIC
@@ -365,6 +446,8 @@ static const struct regulator_ops mcp16502_buck_ops = {
.disable = regulator_disable_regmap,
.is_enabled = regulator_is_enabled_regmap,
.get_status = mcp16502_get_status,
+ .set_voltage_time_sel = mcp16502_set_voltage_time_sel,
+ .set_ramp_delay = mcp16502_set_ramp_delay,
.set_mode = mcp16502_set_mode,
.get_mode = mcp16502_get_mode,
@@ -389,6 +472,8 @@ static const struct regulator_ops mcp16502_ldo_ops = {
.disable = regulator_disable_regmap,
.is_enabled = regulator_is_enabled_regmap,
.get_status = mcp16502_get_status,
+ .set_voltage_time_sel = mcp16502_set_voltage_time_sel,
+ .set_ramp_delay = mcp16502_set_ramp_delay,
#ifdef CONFIG_SUSPEND
.set_suspend_voltage = mcp16502_set_suspend_voltage,