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authorXiao Wang <xiao.w.wang@intel.com>2023-10-31 14:45:52 +0800
committerPalmer Dabbelt <palmer@rivosinc.com>2023-11-09 10:15:51 -0800
commite72c4333d2f2e7f2200f71a88c0480fd2a769a64 (patch)
tree3fbea8f0e7b28f499221ac66eef8fd7eb3d0d1bc /drivers/perf/riscv_pmu_sbi.c
parent68444b93ed6c622f77745ea25f8db05cd0afb1b6 (diff)
riscv: Rearrange hwcap.h and cpufeature.h
Now hwcap.h and cpufeature.h are mutually including each other, and most of the variable/API declarations in hwcap.h are implemented in cpufeature.c, so, it's better to move them into cpufeature.h and leave only macros for ISA extension logical IDs in hwcap.h. BTW, the riscv_isa_extension_mask macro is not used now, so this patch removes it. Suggested-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Xiao Wang <xiao.w.wang@intel.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Link: https://lore.kernel.org/r/20231031064553.2319688-2-xiao.w.wang@intel.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'drivers/perf/riscv_pmu_sbi.c')
-rw-r--r--drivers/perf/riscv_pmu_sbi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index cd8a2b9efd78..16acd4dcdb96 100644
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -22,7 +22,7 @@
#include <asm/errata_list.h>
#include <asm/sbi.h>
-#include <asm/hwcap.h>
+#include <asm/cpufeature.h>
#define SYSCTL_NO_USER_ACCESS 0
#define SYSCTL_USER_ACCESS 1