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authorDan Williams <dan.j.williams@intel.com>2016-05-27 09:23:01 -0700
committerDan Williams <dan.j.williams@intel.com>2016-07-11 16:16:03 -0700
commit0c27af60d1bbd33c7d3dffb46a4c9f6aa103d754 (patch)
tree8ee81feb4fcd84140077008b15e5c295d19ad972 /drivers/nvdimm/nd.h
parentf284a4f23752d0334e482d04e0a584d19c9c8cd0 (diff)
libnvdimm: cycle flush hints
When the NFIT provides multiple flush hint addresses per-dimm it is expressing that the platform is capable of processing multiple flush requests in parallel. There is some fixed cost per flush request, let the cost be shared in parallel on multiple cpus. Since there may not be enough flush hint addresses for each cpu to have one, keep a per-cpu index of the last used hint, hash it with current pid, and assume that access pattern and scheduler randomness will keep the flush-hint usage somewhat staggered across cpus. Cc: Ross Zwisler <ross.zwisler@linux.intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/nvdimm/nd.h')
-rw-r--r--drivers/nvdimm/nd.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h
index 5912bd6b4234..40476399d227 100644
--- a/drivers/nvdimm/nd.h
+++ b/drivers/nvdimm/nd.h
@@ -52,6 +52,7 @@ struct nvdimm_drvdata {
struct nd_region_data {
int ns_count;
int ns_active;
+ unsigned int flush_mask;
void __iomem *flush_wpq[0][0];
};