diff options
author | Russell King <rmk+kernel@armlinux.org.uk> | 2021-02-05 10:39:59 +0000 |
---|---|---|
committer | Jakub Kicinski <kuba@kernel.org> | 2021-02-06 14:35:21 -0800 |
commit | 694a0006c0b15ed22aa53dc4b244d64c5f12e45e (patch) | |
tree | 6bde5ac36d8b9068b0097e286a5590dda8dcebb9 /drivers/net/pcs | |
parent | 8cc8993cbcee7dd4a8763e70ef46aba327dcac00 (diff) |
net: pcs: add pcs-lynx 1000BASE-X support
Add support for 1000BASE-X to pcs-lynx for the LX2160A.
This commit prepares the ground work for allowing 1G fiber connections
to be used with DPAA2 on the SolidRun CEX7 platforms.
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/net/pcs')
-rw-r--r-- | drivers/net/pcs/pcs-lynx.c | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/drivers/net/pcs/pcs-lynx.c b/drivers/net/pcs/pcs-lynx.c index 62bb9272dcb2..af36cd647bf5 100644 --- a/drivers/net/pcs/pcs-lynx.c +++ b/drivers/net/pcs/pcs-lynx.c @@ -11,6 +11,7 @@ #define LINK_TIMER_VAL(ns) ((u32)((ns) / SGMII_CLOCK_PERIOD_NS)) #define SGMII_AN_LINK_TIMER_NS 1600000 /* defined by SGMII spec */ +#define IEEE8023_LINK_TIMER_NS 10000000 #define LINK_TIMER_LO 0x12 #define LINK_TIMER_HI 0x13 @@ -83,6 +84,7 @@ static void lynx_pcs_get_state(struct phylink_pcs *pcs, struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs); switch (state->interface) { + case PHY_INTERFACE_MODE_1000BASEX: case PHY_INTERFACE_MODE_SGMII: case PHY_INTERFACE_MODE_QSGMII: phylink_mii_c22_pcs_get_state(lynx->mdio, state); @@ -108,6 +110,30 @@ static void lynx_pcs_get_state(struct phylink_pcs *pcs, state->link, state->an_enabled, state->an_complete); } +static int lynx_pcs_config_1000basex(struct mdio_device *pcs, + unsigned int mode, + const unsigned long *advertising) +{ + struct mii_bus *bus = pcs->bus; + int addr = pcs->addr; + u32 link_timer; + int err; + + link_timer = LINK_TIMER_VAL(IEEE8023_LINK_TIMER_NS); + mdiobus_write(bus, addr, LINK_TIMER_LO, link_timer & 0xffff); + mdiobus_write(bus, addr, LINK_TIMER_HI, link_timer >> 16); + + err = mdiobus_modify(bus, addr, IF_MODE, + IF_MODE_SGMII_EN | IF_MODE_USE_SGMII_AN, + 0); + if (err) + return err; + + return phylink_mii_c22_pcs_config(pcs, mode, + PHY_INTERFACE_MODE_1000BASEX, + advertising); +} + static int lynx_pcs_config_sgmii(struct mdio_device *pcs, unsigned int mode, const unsigned long *advertising) { @@ -163,6 +189,8 @@ static int lynx_pcs_config(struct phylink_pcs *pcs, unsigned int mode, struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs); switch (ifmode) { + case PHY_INTERFACE_MODE_1000BASEX: + return lynx_pcs_config_1000basex(lynx->mdio, mode, advertising); case PHY_INTERFACE_MODE_SGMII: case PHY_INTERFACE_MODE_QSGMII: return lynx_pcs_config_sgmii(lynx->mdio, mode, advertising); @@ -185,6 +213,13 @@ static int lynx_pcs_config(struct phylink_pcs *pcs, unsigned int mode, return 0; } +static void lynx_pcs_an_restart(struct phylink_pcs *pcs) +{ + struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs); + + phylink_mii_c22_pcs_an_restart(lynx->mdio); +} + static void lynx_pcs_link_up_sgmii(struct mdio_device *pcs, unsigned int mode, int speed, int duplex) { @@ -290,6 +325,7 @@ static void lynx_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode, static const struct phylink_pcs_ops lynx_pcs_phylink_ops = { .pcs_get_state = lynx_pcs_get_state, .pcs_config = lynx_pcs_config, + .pcs_an_restart = lynx_pcs_an_restart, .pcs_link_up = lynx_pcs_link_up, }; |