diff options
author | Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> | 2020-05-21 12:32:45 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2020-07-01 01:59:20 -0400 |
commit | ca8e2084e54b0c81638d94dfcaae84accb05869d (patch) | |
tree | 334d547343201455e30189d56a74a277e186d8fa /drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c | |
parent | b7efa4f5cdb4c44311483ffacc1cfe235af28b25 (diff) |
drm/amd/display: Use u16 for drm_bpp in DSC calculations
[Why]
DSC calculations fail because the u16 bits_per_pixel from
the DRM struct is being casted to the u8 drm_bpp parameters
and locals. Integer wraparound is happening because this
value is greater than 255.
[How]
Use u16 to match what's in the structure instead of u8.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c b/drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c index 667afbc260f9..4da21966ddce 100644 --- a/drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c +++ b/drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c @@ -175,7 +175,7 @@ static int median3(int a, int b, int c) } static void _do_calc_rc_params(struct rc_params *rc, enum colour_mode cm, - enum bits_per_comp bpc, u8 drm_bpp, + enum bits_per_comp bpc, u16 drm_bpp, bool is_navite_422_or_420, int slice_width, int slice_height, int minor_version) @@ -265,7 +265,7 @@ static void _do_calc_rc_params(struct rc_params *rc, enum colour_mode cm, rc->rc_buf_thresh[13] = 8064; } -static u32 _do_bytes_per_pixel_calc(int slice_width, u8 drm_bpp, +static u32 _do_bytes_per_pixel_calc(int slice_width, u16 drm_bpp, bool is_navite_422_or_420) { float bpp; @@ -321,7 +321,7 @@ void calc_rc_params(struct rc_params *rc, const struct drm_dsc_config *pps) enum colour_mode mode; enum bits_per_comp bpc; bool is_navite_422_or_420; - u8 drm_bpp = pps->bits_per_pixel; + u16 drm_bpp = pps->bits_per_pixel; int slice_width = pps->slice_width; int slice_height = pps->slice_height; @@ -357,7 +357,7 @@ u32 calc_dsc_bytes_per_pixel(const struct drm_dsc_config *pps) { u32 ret; - u8 drm_bpp = pps->bits_per_pixel; + u16 drm_bpp = pps->bits_per_pixel; int slice_width = pps->slice_width; bool is_navite_422_or_420 = pps->native_422 || pps->native_420; |