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authorFederico Vaga <federico.vaga@cern.ch>2019-02-14 09:51:32 +0100
committerWolfram Sang <wsa@the-dreams.de>2019-02-14 17:55:40 +0100
commit69c8c0c0efa84cc7c95ef774e97cac237b0f6d36 (patch)
tree9175aedc766bcbde006776b3dc920296cd9c5863 /COPYING
parent2dc9834688ae3ba057d46e60525a11ec146ae3df (diff)
i2c: ocores: add polling interface
This driver assumes that an interrupt line is always available for the I2C master. This is not always the case and this patch adds support for a polling version. Report from Andrew Lunn: I did some timing tests for this. On my box, we request a udelay of 80uS. The kernel actually delays for about 79uS. We then spin in ocores_wait() for an additional 10-11uS, which is 3 to 4 iterations. There are actually 9 bits on the wire, not 8, since there is an ACK/NACK bit after the actual data transfer. So i changed the delay to (9 * 1000) / i2c->bus_clock_khz. That resulted in ocores_wait() mostly not looping at all. But for reading an 4K AT24 EEPROM, it increased the read time by 10ms, from 424ms to 434ms. So we should probably keep with 8. Signed-off-by: Federico Vaga <federico.vaga@cern.ch> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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