From 27b1fec2caa668c162cd1a862c69e087df277fae Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Tue, 28 Sep 2010 21:02:58 +0530 Subject: OMAP: I2C: Convert i2c driver to use PM runtime api's This patch converts the i2c driver to use PM runtime apis Signed-off-by: Rajendra Nayak Cc: Paul Walmsley Cc: Jean Delvare Acked-by: Ben Dooks Signed-off-by: Kevin Hilman --- drivers/i2c/busses/i2c-omap.c | 69 +++++++++++++++---------------------------- 1 file changed, 23 insertions(+), 46 deletions(-) (limited to 'drivers') diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index b33c78586bfc..760b8be6975f 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -39,6 +39,7 @@ #include #include #include +#include /* I2C controller revisions */ #define OMAP_I2C_REV_2 0x20 @@ -175,8 +176,6 @@ struct omap_i2c_dev { void __iomem *base; /* virtual */ int irq; int reg_shift; /* bit shift for I2C register addresses */ - struct clk *iclk; /* Interface clock */ - struct clk *fclk; /* Functional clock */ struct completion cmd_complete; struct resource *ioarea; u32 latency; /* maximum mpu wkup latency */ @@ -265,45 +264,18 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg) (i2c_dev->regs[reg] << i2c_dev->reg_shift)); } -static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev) +static void omap_i2c_unidle(struct omap_i2c_dev *dev) { - int ret; + struct platform_device *pdev; + struct omap_i2c_bus_platform_data *pdata; - dev->iclk = clk_get(dev->dev, "ick"); - if (IS_ERR(dev->iclk)) { - ret = PTR_ERR(dev->iclk); - dev->iclk = NULL; - return ret; - } + WARN_ON(!dev->idle); - dev->fclk = clk_get(dev->dev, "fck"); - if (IS_ERR(dev->fclk)) { - ret = PTR_ERR(dev->fclk); - if (dev->iclk != NULL) { - clk_put(dev->iclk); - dev->iclk = NULL; - } - dev->fclk = NULL; - return ret; - } + pdev = to_platform_device(dev->dev); + pdata = pdev->dev.platform_data; - return 0; -} + pm_runtime_get_sync(&pdev->dev); -static void omap_i2c_put_clocks(struct omap_i2c_dev *dev) -{ - clk_put(dev->fclk); - dev->fclk = NULL; - clk_put(dev->iclk); - dev->iclk = NULL; -} - -static void omap_i2c_unidle(struct omap_i2c_dev *dev) -{ - WARN_ON(!dev->idle); - - clk_enable(dev->iclk); - clk_enable(dev->fclk); if (cpu_is_omap34xx()) { omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->pscstate); @@ -326,10 +298,15 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev) static void omap_i2c_idle(struct omap_i2c_dev *dev) { + struct platform_device *pdev; + struct omap_i2c_bus_platform_data *pdata; u16 iv; WARN_ON(dev->idle); + pdev = to_platform_device(dev->dev); + pdata = pdev->dev.platform_data; + dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); if (dev->rev >= OMAP_I2C_REV_ON_4430) omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1); @@ -345,8 +322,8 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev) omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG); } dev->idle = 1; - clk_disable(dev->fclk); - clk_disable(dev->iclk); + + pm_runtime_put_sync(&pdev->dev); } static int omap_i2c_init(struct omap_i2c_dev *dev) @@ -356,6 +333,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) unsigned long fclk_rate = 12000000; unsigned long timeout; unsigned long internal_clk = 0; + struct clk *fclk; if (dev->rev >= OMAP_I2C_REV_2) { /* Disable I2C controller before soft reset */ @@ -414,7 +392,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) * always returns 12MHz for the functional clock, we can * do this bit unconditionally. */ - fclk_rate = clk_get_rate(dev->fclk); + fclk = clk_get(dev->dev, "fck"); + fclk_rate = clk_get_rate(fclk); + clk_put(fclk); /* TRM for 5912 says the I2C clock must be prescaled to be * between 7 - 12 MHz. The XOR input clock is typically @@ -443,7 +423,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) internal_clk = 9600; else internal_clk = 4000; - fclk_rate = clk_get_rate(dev->fclk) / 1000; + fclk = clk_get(dev->dev, "fck"); + fclk_rate = clk_get_rate(fclk) / 1000; + clk_put(fclk); /* Compute prescaler divisor */ psc = fclk_rate / internal_clk; @@ -1048,14 +1030,12 @@ omap_i2c_probe(struct platform_device *pdev) else dev->reg_shift = 2; - if ((r = omap_i2c_get_clocks(dev)) != 0) - goto err_iounmap; - if (cpu_is_omap44xx()) dev->regs = (u8 *) omap4_reg_map; else dev->regs = (u8 *) reg_map; + pm_runtime_enable(&pdev->dev); omap_i2c_unidle(dev); dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff; @@ -1127,8 +1107,6 @@ err_free_irq: err_unuse_clocks: omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); omap_i2c_idle(dev); - omap_i2c_put_clocks(dev); -err_iounmap: iounmap(dev->base); err_free_mem: platform_set_drvdata(pdev, NULL); @@ -1150,7 +1128,6 @@ omap_i2c_remove(struct platform_device *pdev) free_irq(dev->irq, dev); i2c_del_adapter(&dev->adapter); omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); - omap_i2c_put_clocks(dev); iounmap(dev->base); kfree(dev); mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); -- cgit v1.2.3 From 9632f9890e76aa7a78f719b0b3b572f65e3e968b Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Tue, 16 Nov 2010 14:26:57 -0800 Subject: OMAP1: drop AMS_DELTA_FIQ config option This patches removes a config option that was used to select a FIQ handler to be build for Amstrad Delta, as required by the on-board serio interface driver. Not having any problem reports received since it was introduced in 2.6.35, the FIQ handler can now be built and initialized by default, thus reqiring no extra config option. Signed-off-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/Kconfig | 11 +---------- arch/arm/mach-omap1/Makefile | 4 ++-- arch/arm/mach-omap1/board-ams-delta.c | 2 -- drivers/input/serio/Kconfig | 1 - 4 files changed, 3 insertions(+), 15 deletions(-) (limited to 'drivers') diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index 5f6496375404..8d2f2daba0c0 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig @@ -152,20 +152,11 @@ config MACH_NOKIA770 config MACH_AMS_DELTA bool "Amstrad E3 (Delta)" depends on ARCH_OMAP1 && ARCH_OMAP15XX + select FIQ help Support for the Amstrad E3 (codename Delta) videophone. Say Y here if you have such a device. -config AMS_DELTA_FIQ - bool "Fast Interrupt Request (FIQ) support for the E3" - depends on MACH_AMS_DELTA - select FIQ - help - Provide a FIQ handler for the E3. - This allows for fast handling of interrupts generated - by the clock line of the E3 mailboard (or a PS/2 keyboard) - connected to the GPIO based external keyboard port. - config MACH_OMAP_GENERIC bool "Generic OMAP board" depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX) diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index 9a304d854e33..de3cc130ab8e 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile @@ -39,8 +39,8 @@ obj-$(CONFIG_MACH_OMAP_PALMTE) += board-palmte.o obj-$(CONFIG_MACH_OMAP_PALMZ71) += board-palmz71.o obj-$(CONFIG_MACH_OMAP_PALMTT) += board-palmtt.o obj-$(CONFIG_MACH_NOKIA770) += board-nokia770.o -obj-$(CONFIG_MACH_AMS_DELTA) += board-ams-delta.o -obj-$(CONFIG_AMS_DELTA_FIQ) += ams-delta-fiq.o ams-delta-fiq-handler.o +obj-$(CONFIG_MACH_AMS_DELTA) += board-ams-delta.o ams-delta-fiq.o \ + ams-delta-fiq-handler.o obj-$(CONFIG_MACH_SX1) += board-sx1.o board-sx1-mmc.o obj-$(CONFIG_MACH_HERALD) += board-htcherald.o diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 1d4163b9f0b7..eaa7081fef8f 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -307,9 +307,7 @@ static void __init ams_delta_init(void) #endif platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); -#ifdef CONFIG_AMS_DELTA_FIQ ams_delta_init_fiq(); -#endif omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1); } diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig index 6256233d2bfb..bcb1fdedb595 100644 --- a/drivers/input/serio/Kconfig +++ b/drivers/input/serio/Kconfig @@ -214,7 +214,6 @@ config SERIO_AMS_DELTA tristate "Amstrad Delta (E3) mailboard support" depends on MACH_AMS_DELTA default y - select AMS_DELTA_FIQ ---help--- Say Y here if you have an E3 and want to use its mailboard, or any standard AT keyboard connected to the mailboard port. -- cgit v1.2.3 From 498cb95175c29ed96bf32f30df2d11ec1c7f3879 Mon Sep 17 00:00:00 2001 From: Andrei Emeltchenko Date: Tue, 30 Nov 2010 14:11:49 -0800 Subject: OMAP: Serial: Define OMAP uart MDR1 reg and remove magic numbers Define MDR1 register serial definitions used in serial and bluetooth drivers. Change magic number to ones defined in serial_reg for omap1/2 serial driver. Remove redefined MDR1 register definitions in omap-serial driver. Signed-off-by: Andrei Emeltchenko Acked-by: G, Manjunath Kondaiah Acked-by: Govindraj.R Acked-by: Greg Kroah-Hartman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/serial.c | 6 ++++-- arch/arm/mach-omap2/serial.c | 15 +++++++++------ arch/arm/plat-omap/include/plat/omap-serial.h | 3 --- drivers/serial/omap-serial.c | 6 +++--- include/linux/serial_reg.h | 12 ++++++++++++ 5 files changed, 28 insertions(+), 14 deletions(-) (limited to 'drivers') diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index b78d0749f13d..c73d1b77b364 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -52,9 +52,11 @@ static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset, */ static void __init omap_serial_reset(struct plat_serial8250_port *p) { - omap_serial_outp(p, UART_OMAP_MDR1, 0x07); /* disable UART */ + omap_serial_outp(p, UART_OMAP_MDR1, + UART_OMAP_MDR1_DISABLE); /* disable UART */ omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ - omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */ + omap_serial_outp(p, UART_OMAP_MDR1, + UART_OMAP_MDR1_16X_MODE); /* enable UART */ if (!cpu_is_omap15xx()) { omap_serial_outp(p, UART_OMAP_SYSC, 0x01); diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index d17960a1be25..fa9806250b50 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -169,9 +169,9 @@ static inline void serial_write_reg(struct omap_uart_state *uart, int offset, static inline void __init omap_uart_reset(struct omap_uart_state *uart) { - serial_write_reg(uart, UART_OMAP_MDR1, 0x07); + serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); serial_write_reg(uart, UART_OMAP_SCR, 0x08); - serial_write_reg(uart, UART_OMAP_MDR1, 0x00); + serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE); } #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) @@ -247,9 +247,10 @@ static void omap_uart_restore_context(struct omap_uart_state *uart) uart->context_valid = 0; if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS) - omap_uart_mdr1_errataset(uart, 0x07, 0xA0); + omap_uart_mdr1_errataset(uart, UART_OMAP_MDR1_DISABLE, 0xA0); else - serial_write_reg(uart, UART_OMAP_MDR1, 0x7); + serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); + serial_write_reg(uart, UART_LCR, 0xBF); /* Config B mode */ efr = serial_read_reg(uart, UART_EFR); serial_write_reg(uart, UART_EFR, UART_EFR_ECB); @@ -268,11 +269,13 @@ static void omap_uart_restore_context(struct omap_uart_state *uart) serial_write_reg(uart, UART_OMAP_SCR, uart->scr); serial_write_reg(uart, UART_OMAP_WER, uart->wer); serial_write_reg(uart, UART_OMAP_SYSC, uart->sysc); + if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS) - omap_uart_mdr1_errataset(uart, 0x00, 0xA1); + omap_uart_mdr1_errataset(uart, UART_OMAP_MDR1_16X_MODE, 0xA1); else /* UART 16x mode */ - serial_write_reg(uart, UART_OMAP_MDR1, 0x00); + serial_write_reg(uart, UART_OMAP_MDR1, + UART_OMAP_MDR1_16X_MODE); } #else static inline void omap_uart_save_context(struct omap_uart_state *uart) {} diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h index c8dae02f0704..6a1788014611 100644 --- a/arch/arm/plat-omap/include/plat/omap-serial.h +++ b/arch/arm/plat-omap/include/plat/omap-serial.h @@ -31,9 +31,6 @@ */ #define OMAP_SERIAL_NAME "ttyO" -#define OMAP_MDR1_DISABLE 0x07 -#define OMAP_MDR1_MODE13X 0x03 -#define OMAP_MDR1_MODE16X 0x00 #define OMAP_MODE13X_SPEED 230400 /* diff --git a/drivers/serial/omap-serial.c b/drivers/serial/omap-serial.c index 14365f72b664..03a96db67de4 100644 --- a/drivers/serial/omap-serial.c +++ b/drivers/serial/omap-serial.c @@ -753,7 +753,7 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, /* Protocol, Baud Rate, and Interrupt Settings */ - serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_DISABLE); + serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); up->efr = serial_in(up, UART_EFR); @@ -774,9 +774,9 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, serial_out(up, UART_LCR, cval); if (baud > 230400 && baud != 3000000) - serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_MODE13X); + serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_13X_MODE); else - serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_MODE16X); + serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE); /* Hardware Flow Control Configuration */ diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h index c7a0ce11cd47..6f3823474e6c 100644 --- a/include/linux/serial_reg.h +++ b/include/linux/serial_reg.h @@ -341,5 +341,17 @@ #define UART_OMAP_SYSS 0x16 /* System status register */ #define UART_OMAP_WER 0x17 /* Wake-up enable register */ +/* + * These are the definitions for the MDR1 register + */ +#define UART_OMAP_MDR1_16X_MODE 0x00 /* UART 16x mode */ +#define UART_OMAP_MDR1_SIR_MODE 0x01 /* SIR mode */ +#define UART_OMAP_MDR1_16X_ABAUD_MODE 0x02 /* UART 16x auto-baud */ +#define UART_OMAP_MDR1_13X_MODE 0x03 /* UART 13x mode */ +#define UART_OMAP_MDR1_MIR_MODE 0x04 /* MIR mode */ +#define UART_OMAP_MDR1_FIR_MODE 0x05 /* FIR mode */ +#define UART_OMAP_MDR1_CIR_MODE 0x06 /* CIR mode */ +#define UART_OMAP_MDR1_DISABLE 0x07 /* Disable (default state) */ + #endif /* _LINUX_SERIAL_REG_H */ -- cgit v1.2.3 From 662b083a87a3489f3f19c6e0651c1b99b0de5df0 Mon Sep 17 00:00:00 2001 From: Andrei Emeltchenko Date: Tue, 30 Nov 2010 14:11:49 -0800 Subject: omap: Serial: Define register access modes in LCR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Access to some registers depends on register access mode Three different modes are available for OMAP (at least) • Operational mode LCR_REG[7] = 0x0 • Configuration mode A LCR_REG[7] = 0x1 and LCR_REG[7:0]! = 0xBF • Configuration mode B LCR_REG[7] = 0x1 and LCR_REG[7:0] = 0xBF Define access modes and remove redefinitions and magic numbers in serial drivers (and later in bluetooth driver). Signed-off-by: Andrei Emeltchenko Acked-by: Govindraj.R Acked-by: Greg Kroah-Hartman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/serial.c | 12 +++++----- arch/arm/plat-omap/include/plat/omap-serial.h | 9 ------- drivers/serial/8250.c | 26 ++++++++++---------- drivers/serial/omap-serial.c | 34 +++++++++++++-------------- include/linux/serial_reg.h | 7 ++++++ 5 files changed, 43 insertions(+), 45 deletions(-) (limited to 'drivers') diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index fa9806250b50..9dc077e2d8af 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -219,7 +219,7 @@ static void omap_uart_save_context(struct omap_uart_state *uart) return; lcr = serial_read_reg(uart, UART_LCR); - serial_write_reg(uart, UART_LCR, 0xBF); + serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B); uart->dll = serial_read_reg(uart, UART_DLL); uart->dlh = serial_read_reg(uart, UART_DLM); serial_write_reg(uart, UART_LCR, lcr); @@ -227,7 +227,7 @@ static void omap_uart_save_context(struct omap_uart_state *uart) uart->sysc = serial_read_reg(uart, UART_OMAP_SYSC); uart->scr = serial_read_reg(uart, UART_OMAP_SCR); uart->wer = serial_read_reg(uart, UART_OMAP_WER); - serial_write_reg(uart, UART_LCR, 0x80); + serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_A); uart->mcr = serial_read_reg(uart, UART_MCR); serial_write_reg(uart, UART_LCR, lcr); @@ -251,19 +251,19 @@ static void omap_uart_restore_context(struct omap_uart_state *uart) else serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); - serial_write_reg(uart, UART_LCR, 0xBF); /* Config B mode */ + serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B); efr = serial_read_reg(uart, UART_EFR); serial_write_reg(uart, UART_EFR, UART_EFR_ECB); serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */ serial_write_reg(uart, UART_IER, 0x0); - serial_write_reg(uart, UART_LCR, 0xBF); /* Config B mode */ + serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B); serial_write_reg(uart, UART_DLL, uart->dll); serial_write_reg(uart, UART_DLM, uart->dlh); serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */ serial_write_reg(uart, UART_IER, uart->ier); - serial_write_reg(uart, UART_LCR, 0x80); + serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_A); serial_write_reg(uart, UART_MCR, uart->mcr); - serial_write_reg(uart, UART_LCR, 0xBF); /* Config B mode */ + serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B); serial_write_reg(uart, UART_EFR, efr); serial_write_reg(uart, UART_LCR, UART_LCR_WLEN8); serial_write_reg(uart, UART_OMAP_SCR, uart->scr); diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h index 6a1788014611..b3e0bad9b77e 100644 --- a/arch/arm/plat-omap/include/plat/omap-serial.h +++ b/arch/arm/plat-omap/include/plat/omap-serial.h @@ -33,15 +33,6 @@ #define OMAP_MODE13X_SPEED 230400 -/* - * LCR = 0XBF: Switch to Configuration Mode B. - * In configuration mode b allow access - * to EFR,DLL,DLH. - * Reference OMAP TRM Chapter 17 - * Section: 1.4.3 Mode Selection - */ -#define OMAP_UART_LCR_CONF_MDB 0XBF - /* WER = 0x7F * Enable module level wakeup in WER reg */ diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c index 4d8e14b7aa93..aaf9907e6014 100644 --- a/drivers/serial/8250.c +++ b/drivers/serial/8250.c @@ -653,13 +653,13 @@ static void serial8250_set_sleep(struct uart_8250_port *p, int sleep) { if (p->capabilities & UART_CAP_SLEEP) { if (p->capabilities & UART_CAP_EFR) { - serial_outp(p, UART_LCR, 0xBF); + serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B); serial_outp(p, UART_EFR, UART_EFR_ECB); serial_outp(p, UART_LCR, 0); } serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0); if (p->capabilities & UART_CAP_EFR) { - serial_outp(p, UART_LCR, 0xBF); + serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B); serial_outp(p, UART_EFR, 0); serial_outp(p, UART_LCR, 0); } @@ -752,7 +752,7 @@ static int size_fifo(struct uart_8250_port *up) serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); serial_outp(up, UART_MCR, UART_MCR_LOOP); - serial_outp(up, UART_LCR, UART_LCR_DLAB); + serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A); old_dl = serial_dl_read(up); serial_dl_write(up, 0x0001); serial_outp(up, UART_LCR, 0x03); @@ -764,7 +764,7 @@ static int size_fifo(struct uart_8250_port *up) serial_inp(up, UART_RX); serial_outp(up, UART_FCR, old_fcr); serial_outp(up, UART_MCR, old_mcr); - serial_outp(up, UART_LCR, UART_LCR_DLAB); + serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A); serial_dl_write(up, old_dl); serial_outp(up, UART_LCR, old_lcr); @@ -782,7 +782,7 @@ static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p) unsigned int id; old_lcr = serial_inp(p, UART_LCR); - serial_outp(p, UART_LCR, UART_LCR_DLAB); + serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_A); old_dll = serial_inp(p, UART_DLL); old_dlm = serial_inp(p, UART_DLM); @@ -836,7 +836,7 @@ static void autoconfig_has_efr(struct uart_8250_port *up) * recommended for new designs). */ up->acr = 0; - serial_out(up, UART_LCR, 0xBF); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_out(up, UART_EFR, UART_EFR_ECB); serial_out(up, UART_LCR, 0x00); id1 = serial_icr_read(up, UART_ID1); @@ -945,7 +945,7 @@ static void autoconfig_16550a(struct uart_8250_port *up) * Check for presence of the EFR when DLAB is set. * Only ST16C650V1 UARTs pass this test. */ - serial_outp(up, UART_LCR, UART_LCR_DLAB); + serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A); if (serial_in(up, UART_EFR) == 0) { serial_outp(up, UART_EFR, 0xA8); if (serial_in(up, UART_EFR) != 0) { @@ -963,7 +963,7 @@ static void autoconfig_16550a(struct uart_8250_port *up) * Maybe it requires 0xbf to be written to the LCR. * (other ST16C650V2 UARTs, TI16C752A, etc) */ - serial_outp(up, UART_LCR, 0xBF); + serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) { DEBUG_AUTOCONF("EFRv2 "); autoconfig_has_efr(up); @@ -1024,7 +1024,7 @@ static void autoconfig_16550a(struct uart_8250_port *up) serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); status1 = serial_in(up, UART_IIR) >> 5; serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); - serial_outp(up, UART_LCR, UART_LCR_DLAB); + serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A); serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); status2 = serial_in(up, UART_IIR) >> 5; serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); @@ -1183,7 +1183,7 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags) * We also initialise the EFR (if any) to zero for later. The * EFR occupies the same register location as the FCR and IIR. */ - serial_outp(up, UART_LCR, 0xBF); + serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_outp(up, UART_EFR, 0); serial_outp(up, UART_LCR, 0); @@ -1952,7 +1952,7 @@ static int serial8250_startup(struct uart_port *port) if (up->port.type == PORT_16C950) { /* Wake up and initialize UART */ up->acr = 0; - serial_outp(up, UART_LCR, 0xBF); + serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_outp(up, UART_EFR, UART_EFR_ECB); serial_outp(up, UART_IER, 0); serial_outp(up, UART_LCR, 0); @@ -2002,7 +2002,7 @@ static int serial8250_startup(struct uart_port *port) if (up->port.type == PORT_16850) { unsigned char fctr; - serial_outp(up, UART_LCR, 0xbf); + serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX); serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX); @@ -2363,7 +2363,7 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios, if (termios->c_cflag & CRTSCTS) efr |= UART_EFR_CTS; - serial_outp(up, UART_LCR, 0xBF); + serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_outp(up, UART_EFR, efr); } diff --git a/drivers/serial/omap-serial.c b/drivers/serial/omap-serial.c index 03a96db67de4..1201eff1831e 100644 --- a/drivers/serial/omap-serial.c +++ b/drivers/serial/omap-serial.c @@ -570,7 +570,7 @@ serial_omap_configure_xonxoff unsigned char efr = 0; up->lcr = serial_in(up, UART_LCR); - serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); up->efr = serial_in(up, UART_EFR); serial_out(up, UART_EFR, up->efr & ~UART_EFR_ECB); @@ -598,7 +598,7 @@ serial_omap_configure_xonxoff efr |= OMAP_UART_SW_RX; serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); - serial_out(up, UART_LCR, UART_LCR_DLAB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); up->mcr = serial_in(up, UART_MCR); @@ -612,14 +612,14 @@ serial_omap_configure_xonxoff up->mcr |= UART_MCR_XONANY; serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); - serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); /* Enable special char function UARTi.EFR_REG[5] and * load the new software flow control mode IXON or IXOFF * and restore the UARTi.EFR_REG[4] ENHANCED_EN value. */ serial_out(up, UART_EFR, efr | UART_EFR_SCD); - serial_out(up, UART_LCR, UART_LCR_DLAB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR); serial_out(up, UART_LCR, up->lcr); @@ -724,22 +724,22 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, * baud clock is not running * DLL_REG and DLH_REG set to 0. */ - serial_out(up, UART_LCR, UART_LCR_DLAB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); serial_out(up, UART_DLL, 0); serial_out(up, UART_DLM, 0); serial_out(up, UART_LCR, 0); - serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); up->efr = serial_in(up, UART_EFR); serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); - serial_out(up, UART_LCR, UART_LCR_DLAB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); up->mcr = serial_in(up, UART_MCR); serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); /* FIFO ENABLE, DMA MODE */ serial_out(up, UART_FCR, up->fcr); - serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); if (up->use_dma) { serial_out(up, UART_TI752_TLR, 0); @@ -748,27 +748,27 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, } serial_out(up, UART_EFR, up->efr); - serial_out(up, UART_LCR, UART_LCR_DLAB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); serial_out(up, UART_MCR, up->mcr); /* Protocol, Baud Rate, and Interrupt Settings */ serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); - serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); up->efr = serial_in(up, UART_EFR); serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); serial_out(up, UART_LCR, 0); serial_out(up, UART_IER, 0); - serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ serial_out(up, UART_LCR, 0); serial_out(up, UART_IER, up->ier); - serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_out(up, UART_EFR, up->efr); serial_out(up, UART_LCR, cval); @@ -782,18 +782,18 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, if (termios->c_cflag & CRTSCTS) { efr |= (UART_EFR_CTS | UART_EFR_RTS); - serial_out(up, UART_LCR, UART_LCR_DLAB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); up->mcr = serial_in(up, UART_MCR); serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); - serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); up->efr = serial_in(up, UART_EFR); serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); serial_out(up, UART_EFR, efr); /* Enable AUTORTS and AUTOCTS */ - serial_out(up, UART_LCR, UART_LCR_DLAB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); serial_out(up, UART_MCR, up->mcr | UART_MCR_RTS); serial_out(up, UART_LCR, cval); } @@ -815,13 +815,13 @@ serial_omap_pm(struct uart_port *port, unsigned int state, unsigned char efr; dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id); - serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); efr = serial_in(up, UART_EFR); serial_out(up, UART_EFR, efr | UART_EFR_ECB); serial_out(up, UART_LCR, 0); serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0); - serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_out(up, UART_EFR, efr); serial_out(up, UART_LCR, 0); /* Enable module level wake up */ diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h index 6f3823474e6c..3ecb71a9e505 100644 --- a/include/linux/serial_reg.h +++ b/include/linux/serial_reg.h @@ -99,6 +99,13 @@ #define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */ #define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */ +/* + * Access to some registers depends on register access / configuration + * mode. + */ +#define UART_LCR_CONF_MODE_A UART_LCR_DLAB /* Configutation mode A */ +#define UART_LCR_CONF_MODE_B 0xBF /* Configutation mode B */ + #define UART_MCR 4 /* Out: Modem Control Register */ #define UART_MCR_CLKSEL 0x80 /* Divide clock by 4 (TI16C752, EFR[4]=1) */ #define UART_MCR_TCRTLR 0x40 /* Access TCR/TLR (TI16C752, EFR[4]=1) */ -- cgit v1.2.3 From f7bb0d9ab29e3159e22c3bfc843bd37c7d3c91a0 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Thu, 9 Dec 2010 14:24:16 +0000 Subject: I2C: i2c-omap: Change device name: i2c_omap -> omap_i2c The convention for omap device naming is omap_XXX. Rename the device and driver name in order to stick to this naming convention. Change device name in clock nodes as well. Signed-off-by: Benoit Cousson Cc: Kevin Hilman Cc: Rajendra Nayak Cc: Ben Dooks Acked-by: Paul Walmsley Acked-by: Ben Dooks Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/clock_data.c | 6 +++--- arch/arm/mach-omap2/clock2420_data.c | 8 ++++---- arch/arm/mach-omap2/clock2430_data.c | 8 ++++---- arch/arm/mach-omap2/clock3xxx_data.c | 12 ++++++------ arch/arm/mach-omap2/clock44xx_data.c | 16 ++++++++-------- arch/arm/plat-omap/i2c.c | 2 +- drivers/i2c/busses/i2c-omap.c | 4 ++-- 7 files changed, 28 insertions(+), 28 deletions(-) (limited to 'drivers') diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index 423d21d8c190..12fee24181b2 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -736,9 +736,9 @@ static struct omap_clk omap_clks[] = { CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX), /* Virtual clocks */ CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310), - CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX), - CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX), - CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX), + CLK("omap_i2c.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK("omap_i2c.1", "ick", &i2c_ick, CK_16XX), + CLK("omap_i2c.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX), CLK("omap1_spi100k.1", "fck", &dummy_ck, CK_7XX), CLK("omap1_spi100k.1", "ick", &dummy_ck, CK_7XX), CLK("omap1_spi100k.2", "fck", &dummy_ck, CK_7XX), diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index 21f856252ad8..ed61ac2c6f7b 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c @@ -1862,10 +1862,10 @@ static struct omap_clk omap2420_clks[] = { CLK(NULL, "eac_fck", &eac_fck, CK_242X), CLK("omap_hdq.0", "ick", &hdq_ick, CK_242X), CLK("omap_hdq.1", "fck", &hdq_fck, CK_242X), - CLK("i2c_omap.1", "ick", &i2c1_ick, CK_242X), - CLK("i2c_omap.1", "fck", &i2c1_fck, CK_242X), - CLK("i2c_omap.2", "ick", &i2c2_ick, CK_242X), - CLK("i2c_omap.2", "fck", &i2c2_fck, CK_242X), + CLK("omap_i2c.1", "ick", &i2c1_ick, CK_242X), + CLK("omap_i2c.1", "fck", &i2c1_fck, CK_242X), + CLK("omap_i2c.2", "ick", &i2c2_ick, CK_242X), + CLK("omap_i2c.2", "fck", &i2c2_fck, CK_242X), CLK(NULL, "gpmc_fck", &gpmc_fck, CK_242X), CLK(NULL, "sdma_fck", &sdma_fck, CK_242X), CLK(NULL, "sdma_ick", &sdma_ick, CK_242X), diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index e32afcbdfb88..1bded4e07489 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c @@ -1969,10 +1969,10 @@ static struct omap_clk omap2430_clks[] = { CLK(NULL, "fac_fck", &fac_fck, CK_243X), CLK("omap_hdq.0", "ick", &hdq_ick, CK_243X), CLK("omap_hdq.1", "fck", &hdq_fck, CK_243X), - CLK("i2c_omap.1", "ick", &i2c1_ick, CK_243X), - CLK("i2c_omap.1", "fck", &i2chs1_fck, CK_243X), - CLK("i2c_omap.2", "ick", &i2c2_ick, CK_243X), - CLK("i2c_omap.2", "fck", &i2chs2_fck, CK_243X), + CLK("omap_i2c.1", "ick", &i2c1_ick, CK_243X), + CLK("omap_i2c.1", "fck", &i2chs1_fck, CK_243X), + CLK("omap_i2c.2", "ick", &i2c2_ick, CK_243X), + CLK("omap_i2c.2", "fck", &i2chs2_fck, CK_243X), CLK(NULL, "gpmc_fck", &gpmc_fck, CK_243X), CLK(NULL, "sdma_fck", &sdma_fck, CK_243X), CLK(NULL, "sdma_ick", &sdma_ick, CK_243X), diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index d85ecd5aebfd..ee8aa39269f3 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -3285,9 +3285,9 @@ static struct omap_clk omap3xxx_clks[] = { CLK("mmci-omap-hs.1", "fck", &mmchs2_fck, CK_3XXX), CLK(NULL, "mspro_fck", &mspro_fck, CK_343X), CLK("mmci-omap-hs.0", "fck", &mmchs1_fck, CK_3XXX), - CLK("i2c_omap.3", "fck", &i2c3_fck, CK_3XXX), - CLK("i2c_omap.2", "fck", &i2c2_fck, CK_3XXX), - CLK("i2c_omap.1", "fck", &i2c1_fck, CK_3XXX), + CLK("omap_i2c.3", "fck", &i2c3_fck, CK_3XXX), + CLK("omap_i2c.2", "fck", &i2c2_fck, CK_3XXX), + CLK("omap_i2c.1", "fck", &i2c1_fck, CK_3XXX), CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_3XXX), CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_3XXX), CLK(NULL, "core_48m_fck", &core_48m_fck, CK_3XXX), @@ -3326,9 +3326,9 @@ static struct omap_clk omap3xxx_clks[] = { CLK("omap2_mcspi.3", "ick", &mcspi3_ick, CK_3XXX), CLK("omap2_mcspi.2", "ick", &mcspi2_ick, CK_3XXX), CLK("omap2_mcspi.1", "ick", &mcspi1_ick, CK_3XXX), - CLK("i2c_omap.3", "ick", &i2c3_ick, CK_3XXX), - CLK("i2c_omap.2", "ick", &i2c2_ick, CK_3XXX), - CLK("i2c_omap.1", "ick", &i2c1_ick, CK_3XXX), + CLK("omap_i2c.3", "ick", &i2c3_ick, CK_3XXX), + CLK("omap_i2c.2", "ick", &i2c2_ick, CK_3XXX), + CLK("omap_i2c.1", "ick", &i2c1_ick, CK_3XXX), CLK(NULL, "uart2_ick", &uart2_ick, CK_3XXX), CLK(NULL, "uart1_ick", &uart1_ick, CK_3XXX), CLK(NULL, "gpt11_ick", &gpt11_ick, CK_3XXX), diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 1599836ba3d9..217cce489738 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -2872,10 +2872,10 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "gpu_fck", &gpu_fck, CK_443X), CLK("omap2_hdq.0", "fck", &hdq1w_fck, CK_443X), CLK(NULL, "hsi_fck", &hsi_fck, CK_443X), - CLK("i2c_omap.1", "fck", &i2c1_fck, CK_443X), - CLK("i2c_omap.2", "fck", &i2c2_fck, CK_443X), - CLK("i2c_omap.3", "fck", &i2c3_fck, CK_443X), - CLK("i2c_omap.4", "fck", &i2c4_fck, CK_443X), + CLK("omap_i2c.1", "fck", &i2c1_fck, CK_443X), + CLK("omap_i2c.2", "fck", &i2c2_fck, CK_443X), + CLK("omap_i2c.3", "fck", &i2c3_fck, CK_443X), + CLK("omap_i2c.4", "fck", &i2c4_fck, CK_443X), CLK(NULL, "ipu_fck", &ipu_fck, CK_443X), CLK(NULL, "iss_ctrlclk", &iss_ctrlclk, CK_443X), CLK(NULL, "iss_fck", &iss_fck, CK_443X), @@ -2975,10 +2975,10 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "gpt9_ick", &dummy_ck, CK_443X), CLK(NULL, "gpt10_ick", &dummy_ck, CK_443X), CLK(NULL, "gpt11_ick", &dummy_ck, CK_443X), - CLK("i2c_omap.1", "ick", &dummy_ck, CK_443X), - CLK("i2c_omap.2", "ick", &dummy_ck, CK_443X), - CLK("i2c_omap.3", "ick", &dummy_ck, CK_443X), - CLK("i2c_omap.4", "ick", &dummy_ck, CK_443X), + CLK("omap_i2c.1", "ick", &dummy_ck, CK_443X), + CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X), + CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X), + CLK("omap_i2c.4", "ick", &dummy_ck, CK_443X), CLK("mmci-omap-hs.0", "ick", &dummy_ck, CK_443X), CLK("mmci-omap-hs.1", "ick", &dummy_ck, CK_443X), CLK("mmci-omap-hs.2", "ick", &dummy_ck, CK_443X), diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c index db9c4efd79e3..a4f8003de664 100644 --- a/arch/arm/plat-omap/i2c.c +++ b/arch/arm/plat-omap/i2c.c @@ -40,7 +40,7 @@ #define OMAP_I2C_SIZE 0x3f #define OMAP1_I2C_BASE 0xfffb3800 -static const char name[] = "i2c_omap"; +static const char name[] = "omap_i2c"; #define I2C_RESOURCE_BUILDER(base, irq) \ { \ diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 760b8be6975f..9d090833e245 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -1139,7 +1139,7 @@ static struct platform_driver omap_i2c_driver = { .probe = omap_i2c_probe, .remove = omap_i2c_remove, .driver = { - .name = "i2c_omap", + .name = "omap_i2c", .owner = THIS_MODULE, }, }; @@ -1161,4 +1161,4 @@ module_exit(omap_i2c_exit_driver); MODULE_AUTHOR("MontaVista Software, Inc. (and others)"); MODULE_DESCRIPTION("TI OMAP I2C bus adapter"); MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:i2c_omap"); +MODULE_ALIAS("platform:omap_i2c"); -- cgit v1.2.3 From 4931445b94f49672028b81ace9d4eee8ddf19ab2 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Thu, 9 Dec 2010 11:22:50 +0200 Subject: OMAP2/3: OneNAND: add 104MHz support Add GPMC timings for 104MHz OneNAND. Signed-off-by: Adrian Hunter Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/gpmc-onenand.c | 9 +++++++++ drivers/mtd/onenand/omap2.c | 3 +++ 2 files changed, 12 insertions(+) (limited to 'drivers') diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c index 1db606ca007e..3a7d25fb00ef 100644 --- a/arch/arm/mach-omap2/gpmc-onenand.c +++ b/arch/arm/mach-omap2/gpmc-onenand.c @@ -173,6 +173,15 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg, } switch (freq) { + case 104: + min_gpmc_clk_period = 9600; /* 104 MHz */ + t_ces = 3; + t_avds = 4; + t_avdh = 2; + t_ach = 3; + t_aavdh = 6; + t_rdyo = 9; + break; case 83: min_gpmc_clk_period = 12000; /* 83 MHz */ t_ces = 5; diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c index 9f322f1a7f22..d0894ca7798b 100644 --- a/drivers/mtd/onenand/omap2.c +++ b/drivers/mtd/onenand/omap2.c @@ -721,6 +721,9 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev) case 3: c->freq = 83; break; + case 4: + c->freq = 104; + break; } #ifdef CONFIG_MTD_PARTITIONS -- cgit v1.2.3 From 59fb659b065f52fcc2deed293cfbfc58f890376c Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 21 Dec 2010 15:30:55 -0700 Subject: OMAP2/3: PRCM: split OMAP2/3-specific PRCM code into OMAP2/3-specific files In preparation for adding OMAP4-specific PRCM accessor/mutator functions, split the existing OMAP2/3 PRCM code into OMAP2/3-specific files. Most of what was in mach-omap2/{cm,prm}.{c,h} has now been moved into mach-omap2/{cm,prm}2xxx_3xxx.{c,h}, since it was OMAP2xxx/3xxx-specific. This process also requires the #includes in each of these files to be changed to reference the new file name. As part of doing so, add some comments into plat-omap/sram.c and plat-omap/mcbsp.c, which use "sideways includes", to indicate that these users of the PRM/CM includes should not be doing so. Thanks to Felipe Contreras for comments on this patch. Signed-off-by: Paul Walmsley Cc: Jarkko Nikula Cc: Peter Ujfalusi Cc: Liam Girdwood Cc: Omar Ramirez Luna Acked-by: Omar Ramirez Luna Cc: Felipe Contreras Acked-by: Felipe Contreras Cc: Greg Kroah-Hartman Acked-by: Mark Brown Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Tested-by: Rajendra Nayak Tested-by: Santosh Shilimkar --- arch/arm/mach-omap2/Makefile | 11 +- arch/arm/mach-omap2/clkt2xxx_apll.c | 2 +- arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 2 +- arch/arm/mach-omap2/clkt2xxx_osc.c | 2 +- arch/arm/mach-omap2/clkt2xxx_sys.c | 2 +- arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 2 +- arch/arm/mach-omap2/clkt_dpll.c | 1 - arch/arm/mach-omap2/clock.c | 4 +- arch/arm/mach-omap2/clock2420_data.c | 4 +- arch/arm/mach-omap2/clock2430.c | 2 +- arch/arm/mach-omap2/clock2430_data.c | 4 +- arch/arm/mach-omap2/clock34xx.c | 2 +- arch/arm/mach-omap2/clock3517.c | 2 +- arch/arm/mach-omap2/clock3xxx.c | 4 +- arch/arm/mach-omap2/clock3xxx_data.c | 4 +- arch/arm/mach-omap2/clock44xx_data.c | 6 +- arch/arm/mach-omap2/clockdomain.c | 5 +- arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c | 4 +- arch/arm/mach-omap2/clockdomains44xx_data.c | 2 + arch/arm/mach-omap2/cm-regbits-24xx.h | 2 - arch/arm/mach-omap2/cm-regbits-34xx.h | 2 - arch/arm/mach-omap2/cm-regbits-44xx.h | 3 - arch/arm/mach-omap2/cm.c | 68 ----- arch/arm/mach-omap2/cm.h | 134 +-------- arch/arm/mach-omap2/cm2xxx_3xxx.c | 99 ++++++ arch/arm/mach-omap2/cm2xxx_3xxx.h | 131 ++++++++ arch/arm/mach-omap2/cm44xx.h | 1 + arch/arm/mach-omap2/cm4xxx.c | 2 +- arch/arm/mach-omap2/control.c | 4 +- arch/arm/mach-omap2/dpll3xxx.c | 4 +- arch/arm/mach-omap2/dsp.c | 11 +- arch/arm/mach-omap2/omap_hwmod.c | 5 +- arch/arm/mach-omap2/pm-debug.c | 4 +- arch/arm/mach-omap2/pm24xx.c | 4 +- arch/arm/mach-omap2/pm34xx.c | 4 +- arch/arm/mach-omap2/powerdomain.c | 3 + arch/arm/mach-omap2/powerdomain44xx.c | 1 + arch/arm/mach-omap2/powerdomains2xxx_data.c | 4 +- arch/arm/mach-omap2/powerdomains3xxx_data.c | 4 +- arch/arm/mach-omap2/powerdomains44xx_data.c | 1 - arch/arm/mach-omap2/prcm-common.h | 6 + arch/arm/mach-omap2/prcm.c | 88 +----- arch/arm/mach-omap2/prm-regbits-24xx.h | 2 +- arch/arm/mach-omap2/prm-regbits-34xx.h | 8 +- arch/arm/mach-omap2/prm-regbits-44xx.h | 2 - arch/arm/mach-omap2/prm.h | 352 +--------------------- arch/arm/mach-omap2/prm2xxx_3xxx.c | 51 +++- arch/arm/mach-omap2/prm2xxx_3xxx.h | 367 +++++++++++++++++++++++ arch/arm/mach-omap2/prm44xx.h | 1 + arch/arm/mach-omap2/sdrc.c | 2 - arch/arm/mach-omap2/sdrc2xxx.c | 2 +- arch/arm/mach-omap2/serial.c | 4 +- arch/arm/mach-omap2/sleep34xx.S | 4 +- arch/arm/mach-omap2/sram242x.S | 4 +- arch/arm/mach-omap2/sram243x.S | 4 +- arch/arm/mach-omap2/sram34xx.S | 2 +- arch/arm/plat-omap/include/plat/common.h | 2 + arch/arm/plat-omap/include/plat/prcm.h | 7 - arch/arm/plat-omap/mcbsp.c | 2 + arch/arm/plat-omap/sram.c | 5 +- drivers/staging/tidspbridge/core/_tiomap.h | 6 + 61 files changed, 763 insertions(+), 714 deletions(-) delete mode 100644 arch/arm/mach-omap2/cm.c create mode 100644 arch/arm/mach-omap2/cm2xxx_3xxx.c create mode 100644 arch/arm/mach-omap2/cm2xxx_3xxx.h create mode 100644 arch/arm/mach-omap2/prm2xxx_3xxx.h (limited to 'drivers') diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 2006deef0183..b2e4f7bcfa34 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -6,7 +6,7 @@ obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \ common.o gpio.o dma.o wd_timer.o -omap-2-3-common = irq.o sdrc.o prm2xxx_3xxx.o +omap-2-3-common = irq.o sdrc.o hwmod-common = omap_hwmod.o \ omap_hwmod_common_data.o clock-common = clock.o clock_common_data.o \ @@ -72,9 +72,12 @@ endif endif # PRCM -obj-$(CONFIG_ARCH_OMAP2) += prcm.o cm.o -obj-$(CONFIG_ARCH_OMAP3) += prcm.o cm.o -obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm4xxx.o +obj-$(CONFIG_ARCH_OMAP2) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o +obj-$(CONFIG_ARCH_OMAP3) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o +# XXX The presence of cm2xxx_3xxx.o on the line below is temporary and +# will be removed once the OMAP4 part of the codebase is converted to +# use OMAP4-specific PRCM functions. +obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cm4xxx.o # OMAP powerdomain framework powerdomain-common += powerdomain.o powerdomain-common.o diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c index 66e01acfd585..954d11f37542 100644 --- a/arch/arm/mach-omap2/clkt2xxx_apll.c +++ b/arch/arm/mach-omap2/clkt2xxx_apll.c @@ -26,7 +26,7 @@ #include "clock.h" #include "clock2xxx.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" #include "cm-regbits-24xx.h" /* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */ diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c index 019048434f13..530a76bc4a6c 100644 --- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c +++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c @@ -32,7 +32,7 @@ #include "clock.h" #include "clock2xxx.h" #include "opp2xxx.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" #include "cm-regbits-24xx.h" /* #define DOWN_VARIABLE_DPLL 1 */ /* Experimental */ diff --git a/arch/arm/mach-omap2/clkt2xxx_osc.c b/arch/arm/mach-omap2/clkt2xxx_osc.c index 2167be84a5bc..df7b80506483 100644 --- a/arch/arm/mach-omap2/clkt2xxx_osc.c +++ b/arch/arm/mach-omap2/clkt2xxx_osc.c @@ -27,7 +27,7 @@ #include "clock.h" #include "clock2xxx.h" -#include "prm.h" +#include "prm2xxx_3xxx.h" #include "prm-regbits-24xx.h" static int omap2_enable_osc_ck(struct clk *clk) diff --git a/arch/arm/mach-omap2/clkt2xxx_sys.c b/arch/arm/mach-omap2/clkt2xxx_sys.c index 822b5a79f457..8693cfdac49a 100644 --- a/arch/arm/mach-omap2/clkt2xxx_sys.c +++ b/arch/arm/mach-omap2/clkt2xxx_sys.c @@ -26,7 +26,7 @@ #include "clock.h" #include "clock2xxx.h" -#include "prm.h" +#include "prm2xxx_3xxx.h" #include "prm-regbits-24xx.h" void __iomem *prcm_clksrc_ctrl; diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c index aef62918aaf0..f49f47d7457d 100644 --- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c +++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c @@ -40,7 +40,7 @@ #include "clock.h" #include "clock2xxx.h" #include "opp2xxx.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" #include "cm-regbits-24xx.h" const struct prcm_config *curr_prcm_set; diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c index 6ce512e902c6..337392c3f549 100644 --- a/arch/arm/mach-omap2/clkt_dpll.c +++ b/arch/arm/mach-omap2/clkt_dpll.c @@ -24,7 +24,6 @@ #include #include "clock.h" -#include "cm.h" #include "cm-regbits-24xx.h" #include "cm-regbits-34xx.h" diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index b5babf5440e4..cda2f1da2e1f 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -29,9 +29,7 @@ #include #include "clock.h" -#include "prm.h" -#include "prm-regbits-24xx.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" #include "cm-regbits-24xx.h" #include "cm-regbits-34xx.h" diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index ed61ac2c6f7b..0b2471add7d2 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c @@ -22,8 +22,8 @@ #include "clock.h" #include "clock2xxx.h" #include "opp2xxx.h" -#include "prm.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" +#include "prm2xxx_3xxx.h" #include "prm-regbits-24xx.h" #include "cm-regbits-24xx.h" #include "sdrc.h" diff --git a/arch/arm/mach-omap2/clock2430.c b/arch/arm/mach-omap2/clock2430.c index 44d0cccc51a9..d87bc9cb2a36 100644 --- a/arch/arm/mach-omap2/clock2430.c +++ b/arch/arm/mach-omap2/clock2430.c @@ -25,7 +25,7 @@ #include "clock.h" #include "clock2xxx.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" #include "cm-regbits-24xx.h" /** diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index 1bded4e07489..570c26d81467 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c @@ -22,8 +22,8 @@ #include "clock.h" #include "clock2xxx.h" #include "opp2xxx.h" -#include "prm.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" +#include "prm2xxx_3xxx.h" #include "prm-regbits-24xx.h" #include "cm-regbits-24xx.h" #include "sdrc.h" diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 6febd5f11e85..287abc480924 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -25,7 +25,7 @@ #include "clock.h" #include "clock34xx.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" #include "cm-regbits-34xx.h" /** diff --git a/arch/arm/mach-omap2/clock3517.c b/arch/arm/mach-omap2/clock3517.c index b496a9305e1c..74116a3cf099 100644 --- a/arch/arm/mach-omap2/clock3517.c +++ b/arch/arm/mach-omap2/clock3517.c @@ -25,7 +25,7 @@ #include "clock.h" #include "clock3517.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" #include "cm-regbits-34xx.h" /* diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c index a447c4d2c28a..81f5fdb256dc 100644 --- a/arch/arm/mach-omap2/clock3xxx.c +++ b/arch/arm/mach-omap2/clock3xxx.c @@ -25,9 +25,9 @@ #include "clock.h" #include "clock3xxx.h" -#include "prm.h" +#include "prm2xxx_3xxx.h" #include "prm-regbits-34xx.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" #include "cm-regbits-34xx.h" /* diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index ee8aa39269f3..a179edb03c13 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -28,9 +28,9 @@ #include "clock36xx.h" #include "clock3517.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" #include "cm-regbits-34xx.h" -#include "prm.h" +#include "prm2xxx_3xxx.h" #include "prm-regbits-34xx.h" #include "control.h" diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 254f341e4bd3..91ab6f223b80 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -33,11 +33,15 @@ #include "cm1_44xx.h" #include "cm2_44xx.h" #include "cm-regbits-44xx.h" -#include "prm.h" +#include "prm44xx.h" #include "prm44xx.h" #include "prm-regbits-44xx.h" #include "control.h" +/* OMAP4 modulemode control */ +#define OMAP4430_MODULEMODE_HWCTRL 0 +#define OMAP4430_MODULEMODE_SWCTRL 1 + /* Root clocks */ static struct clk extalt_clkin_ck = { diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 6fb61b1a0d46..a2142e0f1ef4 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -27,9 +27,10 @@ #include -#include "prm.h" +#include "prm2xxx_3xxx.h" #include "prm-regbits-24xx.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" +#include "cm2xxx_3xxx.h" #include #include diff --git a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c index 8dadf754ff11..de1d3b759aee 100644 --- a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c +++ b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c @@ -36,8 +36,8 @@ #include #include -#include "cm.h" -#include "prm.h" +#include "prm2xxx_3xxx.h" +#include "cm2xxx_3xxx.h" #include "cm-regbits-24xx.h" #include "cm-regbits-34xx.h" #include "cm-regbits-44xx.h" diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c index d4a520603470..7fc81f651b5e 100644 --- a/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c @@ -27,6 +27,8 @@ #include #include +#include "cm1_44xx.h" +#include "cm2_44xx.h" #include "cm1_44xx.h" #include "cm2_44xx.h" diff --git a/arch/arm/mach-omap2/cm-regbits-24xx.h b/arch/arm/mach-omap2/cm-regbits-24xx.h index 9a106c04c4a0..0856f2bcee5d 100644 --- a/arch/arm/mach-omap2/cm-regbits-24xx.h +++ b/arch/arm/mach-omap2/cm-regbits-24xx.h @@ -14,8 +14,6 @@ * published by the Free Software Foundation. */ -#include "cm.h" - /* Bits shared between registers */ /* CM_FCLKEN1_CORE and CM_ICLKEN1_CORE shared bits */ diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h index 4f959a7d881c..cd9ff8b6a109 100644 --- a/arch/arm/mach-omap2/cm-regbits-34xx.h +++ b/arch/arm/mach-omap2/cm-regbits-34xx.h @@ -14,8 +14,6 @@ * published by the Free Software Foundation. */ -#include "cm.h" - /* Bits shared between registers */ /* CM_FCLKEN1_CORE and CM_ICLKEN1_CORE shared bits */ diff --git a/arch/arm/mach-omap2/cm-regbits-44xx.h b/arch/arm/mach-omap2/cm-regbits-44xx.h index 0b72be433776..9d47a05b17b4 100644 --- a/arch/arm/mach-omap2/cm-regbits-44xx.h +++ b/arch/arm/mach-omap2/cm-regbits-44xx.h @@ -22,9 +22,6 @@ #ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H #define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H -#include "cm.h" - - /* * Used by CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, * CM_TESLA_DYNAMICDEP diff --git a/arch/arm/mach-omap2/cm.c b/arch/arm/mach-omap2/cm.c deleted file mode 100644 index 721c3b66740a..000000000000 --- a/arch/arm/mach-omap2/cm.c +++ /dev/null @@ -1,68 +0,0 @@ -/* - * OMAP2/3 CM module functions - * - * Copyright (C) 2009 Nokia Corporation - * Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include "cm.h" -#include "cm-regbits-24xx.h" -#include "cm-regbits-34xx.h" - -static const u8 cm_idlest_offs[] = { - CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3 -}; - -/** - * omap2_cm_wait_idlest_ready - wait for a module to leave idle or standby - * @prcm_mod: PRCM module offset - * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3) - * @idlest_shift: shift of the bit in the CM_IDLEST* register to check - * - * XXX document - */ -int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) -{ - int ena = 0, i = 0; - u8 cm_idlest_reg; - u32 mask; - - if (!idlest_id || (idlest_id > ARRAY_SIZE(cm_idlest_offs))) - return -EINVAL; - - cm_idlest_reg = cm_idlest_offs[idlest_id - 1]; - - mask = 1 << idlest_shift; - - if (cpu_is_omap24xx()) - ena = mask; - else if (cpu_is_omap34xx()) - ena = 0; - else - BUG(); - - /* XXX should be OMAP2 CM */ - omap_test_timeout(((cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) == ena), - MAX_MODULE_READY_TIME, i); - - return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; -} - diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index bf21375eee7a..a7bc096bd407 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h @@ -1,8 +1,5 @@ -#ifndef __ARCH_ASM_MACH_OMAP2_CM_H -#define __ARCH_ASM_MACH_OMAP2_CM_H - /* - * OMAP2/3 Clock Management (CM) register definitions + * OMAP2+ Clock Management prototypes * * Copyright (C) 2007-2009 Texas Instruments, Inc. * Copyright (C) 2007-2009 Nokia Corporation @@ -13,133 +10,8 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ - -#include "prcm-common.h" - -#define OMAP2420_CM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) -#define OMAP2430_CM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg)) -#define OMAP34XX_CM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg)) - - -#include "cm44xx.h" - -/* - * Architecture-specific global CM registers - * Use cm_{read,write}_reg() with these registers. - * These registers appear once per CM module. - */ - -#define OMAP3430_CM_REVISION OMAP34XX_CM_REGADDR(OCP_MOD, 0x0000) -#define OMAP3430_CM_SYSCONFIG OMAP34XX_CM_REGADDR(OCP_MOD, 0x0010) -#define OMAP3430_CM_POLCTRL OMAP34XX_CM_REGADDR(OCP_MOD, 0x009c) - -#define OMAP3_CM_CLKOUT_CTRL_OFFSET 0x0070 -#define OMAP3430_CM_CLKOUT_CTRL OMAP_CM_REGADDR(OMAP3430_CCR_MOD, 0x0070) - -/* - * Module specific CM registers from CM_BASE + domain offset - * Use cm_{read,write}_mod_reg() with these registers. - * These register offsets generally appear in more than one PRCM submodule. - */ - -/* Common between 24xx and 34xx */ - -#define CM_FCLKEN 0x0000 -#define CM_FCLKEN1 CM_FCLKEN -#define CM_CLKEN CM_FCLKEN -#define CM_ICLKEN 0x0010 -#define CM_ICLKEN1 CM_ICLKEN -#define CM_ICLKEN2 0x0014 -#define CM_ICLKEN3 0x0018 -#define CM_IDLEST 0x0020 -#define CM_IDLEST1 CM_IDLEST -#define CM_IDLEST2 0x0024 -#define CM_AUTOIDLE 0x0030 -#define CM_AUTOIDLE1 CM_AUTOIDLE -#define CM_AUTOIDLE2 0x0034 -#define CM_AUTOIDLE3 0x0038 -#define CM_CLKSEL 0x0040 -#define CM_CLKSEL1 CM_CLKSEL -#define CM_CLKSEL2 0x0044 -#define OMAP2_CM_CLKSTCTRL 0x0048 -#define OMAP4_CM_CLKSTCTRL 0x0000 - - -/* Architecture-specific registers */ - -#define OMAP24XX_CM_FCLKEN2 0x0004 -#define OMAP24XX_CM_ICLKEN4 0x001c -#define OMAP24XX_CM_AUTOIDLE4 0x003c - -#define OMAP2430_CM_IDLEST3 0x0028 - -#define OMAP3430_CM_CLKEN_PLL 0x0004 -#define OMAP3430ES2_CM_CLKEN2 0x0004 -#define OMAP3430ES2_CM_FCLKEN3 0x0008 -#define OMAP3430_CM_IDLEST_PLL CM_IDLEST2 -#define OMAP3430_CM_AUTOIDLE_PLL CM_AUTOIDLE2 -#define OMAP3430ES2_CM_AUTOIDLE2_PLL CM_AUTOIDLE2 -#define OMAP3430_CM_CLKSEL1 CM_CLKSEL -#define OMAP3430_CM_CLKSEL1_PLL CM_CLKSEL -#define OMAP3430_CM_CLKSEL2_PLL CM_CLKSEL2 -#define OMAP3430_CM_SLEEPDEP CM_CLKSEL2 -#define OMAP3430_CM_CLKSEL3 OMAP2_CM_CLKSTCTRL -#define OMAP3430_CM_CLKSTST 0x004c -#define OMAP3430ES2_CM_CLKSEL4 0x004c -#define OMAP3430ES2_CM_CLKSEL5 0x0050 -#define OMAP3430_CM_CLKSEL2_EMU 0x0050 -#define OMAP3430_CM_CLKSEL3_EMU 0x0054 - -/* CM2.CEFUSE_CM2 register offsets */ - -/* OMAP4 modulemode control */ -#define OMAP4430_MODULEMODE_HWCTRL 0 -#define OMAP4430_MODULEMODE_SWCTRL 1 - -/* Clock management domain register get/set */ - -#ifndef __ASSEMBLER__ - -extern u32 cm_read_mod_reg(s16 module, u16 idx); -extern void cm_write_mod_reg(u32 val, s16 module, u16 idx); -extern u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); - -extern int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, - u8 idlest_shift); -extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg); - -static inline u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) -{ - return cm_rmw_mod_reg_bits(bits, bits, module, idx); -} - -static inline u32 cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) -{ - return cm_rmw_mod_reg_bits(bits, 0x0, module, idx); -} - -#endif - -/* CM register bits shared between 24XX and 3430 */ - -/* CM_CLKSEL_GFX */ -#define OMAP_CLKSEL_GFX_SHIFT 0 -#define OMAP_CLKSEL_GFX_MASK (0x7 << 0) - -/* CM_ICLKEN_GFX */ -#define OMAP_EN_GFX_SHIFT 0 -#define OMAP_EN_GFX_MASK (1 << 0) - -/* CM_IDLEST_GFX */ -#define OMAP_ST_GFX_MASK (1 << 0) - - -/* CM_IDLEST indicator */ -#define OMAP24XX_CM_IDLEST_VAL 0 -#define OMAP34XX_CM_IDLEST_VAL 1 +#ifndef __ARCH_ASM_MACH_OMAP2_CM_H +#define __ARCH_ASM_MACH_OMAP2_CM_H /* * MAX_MODULE_READY_TIME: max duration in microseconds to wait for the diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c new file mode 100644 index 000000000000..5978ce426ec5 --- /dev/null +++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c @@ -0,0 +1,99 @@ +/* + * OMAP2/3 CM module functions + * + * Copyright (C) 2009 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "cm.h" +#include "cm2xxx_3xxx.h" +#include "cm-regbits-24xx.h" +#include "cm-regbits-34xx.h" + +static const u8 cm_idlest_offs[] = { + CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3 +}; + + +u32 cm_read_mod_reg(s16 module, u16 idx) +{ + return __raw_readl(cm_base + module + idx); +} + +void cm_write_mod_reg(u32 val, s16 module, u16 idx) +{ + __raw_writel(val, cm_base + module + idx); +} + +/* Read-modify-write a register in a CM module. Caller must lock */ +u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx) +{ + u32 v; + + v = cm_read_mod_reg(module, idx); + v &= ~mask; + v |= bits; + cm_write_mod_reg(v, module, idx); + + return v; +} + +u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) +{ + return cm_rmw_mod_reg_bits(bits, bits, module, idx); +} + +u32 cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) +{ + return cm_rmw_mod_reg_bits(bits, 0x0, module, idx); +} + +/** + * omap2_cm_wait_idlest_ready - wait for a module to leave idle or standby + * @prcm_mod: PRCM module offset + * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3) + * @idlest_shift: shift of the bit in the CM_IDLEST* register to check + * + * XXX document + */ +int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) +{ + int ena = 0, i = 0; + u8 cm_idlest_reg; + u32 mask; + + if (!idlest_id || (idlest_id > ARRAY_SIZE(cm_idlest_offs))) + return -EINVAL; + + cm_idlest_reg = cm_idlest_offs[idlest_id - 1]; + + mask = 1 << idlest_shift; + + if (cpu_is_omap24xx()) + ena = mask; + else if (cpu_is_omap34xx()) + ena = 0; + else + BUG(); + + omap_test_timeout(((cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) == ena), + MAX_MODULE_READY_TIME, i); + + return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; +} + diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.h b/arch/arm/mach-omap2/cm2xxx_3xxx.h new file mode 100644 index 000000000000..5e572112be06 --- /dev/null +++ b/arch/arm/mach-omap2/cm2xxx_3xxx.h @@ -0,0 +1,131 @@ +/* + * OMAP2/3 Clock Management (CM) register definitions + * + * Copyright (C) 2007-2009 Texas Instruments, Inc. + * Copyright (C) 2007-2010 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * The CM hardware modules on the OMAP2/3 are quite similar to each + * other. The CM modules/instances on OMAP4 are quite different, so + * they are handled in a separate file. + */ +#ifndef __ARCH_ASM_MACH_OMAP2_CM2XXX_3XXX_H +#define __ARCH_ASM_MACH_OMAP2_CM2XXX_3XXX_H + +#include "prcm-common.h" + +#define OMAP2420_CM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) +#define OMAP2430_CM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg)) +#define OMAP34XX_CM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg)) + + +/* + * OMAP3-specific global CM registers + * Use cm_{read,write}_reg() with these registers. + * These registers appear once per CM module. + */ + +#define OMAP3430_CM_REVISION OMAP34XX_CM_REGADDR(OCP_MOD, 0x0000) +#define OMAP3430_CM_SYSCONFIG OMAP34XX_CM_REGADDR(OCP_MOD, 0x0010) +#define OMAP3430_CM_POLCTRL OMAP34XX_CM_REGADDR(OCP_MOD, 0x009c) + +#define OMAP3_CM_CLKOUT_CTRL_OFFSET 0x0070 +#define OMAP3430_CM_CLKOUT_CTRL OMAP_CM_REGADDR(OMAP3430_CCR_MOD, 0x0070) + +/* + * Module specific CM register offsets from CM_BASE + domain offset + * Use cm_{read,write}_mod_reg() with these registers. + * These register offsets generally appear in more than one PRCM submodule. + */ + +/* Common between OMAP2 and OMAP3 */ + +#define CM_FCLKEN 0x0000 +#define CM_FCLKEN1 CM_FCLKEN +#define CM_CLKEN CM_FCLKEN +#define CM_ICLKEN 0x0010 +#define CM_ICLKEN1 CM_ICLKEN +#define CM_ICLKEN2 0x0014 +#define CM_ICLKEN3 0x0018 +#define CM_IDLEST 0x0020 +#define CM_IDLEST1 CM_IDLEST +#define CM_IDLEST2 0x0024 +#define CM_AUTOIDLE 0x0030 +#define CM_AUTOIDLE1 CM_AUTOIDLE +#define CM_AUTOIDLE2 0x0034 +#define CM_AUTOIDLE3 0x0038 +#define CM_CLKSEL 0x0040 +#define CM_CLKSEL1 CM_CLKSEL +#define CM_CLKSEL2 0x0044 +#define OMAP2_CM_CLKSTCTRL 0x0048 + +/* OMAP2-specific register offsets */ + +#define OMAP24XX_CM_FCLKEN2 0x0004 +#define OMAP24XX_CM_ICLKEN4 0x001c +#define OMAP24XX_CM_AUTOIDLE4 0x003c + +#define OMAP2430_CM_IDLEST3 0x0028 + +/* OMAP3-specific register offsets */ + +#define OMAP3430_CM_CLKEN_PLL 0x0004 +#define OMAP3430ES2_CM_CLKEN2 0x0004 +#define OMAP3430ES2_CM_FCLKEN3 0x0008 +#define OMAP3430_CM_IDLEST_PLL CM_IDLEST2 +#define OMAP3430_CM_AUTOIDLE_PLL CM_AUTOIDLE2 +#define OMAP3430ES2_CM_AUTOIDLE2_PLL CM_AUTOIDLE2 +#define OMAP3430_CM_CLKSEL1 CM_CLKSEL +#define OMAP3430_CM_CLKSEL1_PLL CM_CLKSEL +#define OMAP3430_CM_CLKSEL2_PLL CM_CLKSEL2 +#define OMAP3430_CM_SLEEPDEP CM_CLKSEL2 +#define OMAP3430_CM_CLKSEL3 OMAP2_CM_CLKSTCTRL +#define OMAP3430_CM_CLKSTST 0x004c +#define OMAP3430ES2_CM_CLKSEL4 0x004c +#define OMAP3430ES2_CM_CLKSEL5 0x0050 +#define OMAP3430_CM_CLKSEL2_EMU 0x0050 +#define OMAP3430_CM_CLKSEL3_EMU 0x0054 + + +/* CM_IDLEST bit field values to indicate deasserted IdleReq */ + +#define OMAP24XX_CM_IDLEST_VAL 0 +#define OMAP34XX_CM_IDLEST_VAL 1 + + +/* Clock management domain register get/set */ + +#ifndef __ASSEMBLER__ + +extern u32 cm_read_mod_reg(s16 module, u16 idx); +extern void cm_write_mod_reg(u32 val, s16 module, u16 idx); +extern u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); + +extern int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, + u8 idlest_shift); +extern u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx); +extern u32 cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx); + +#endif + +/* CM register bits shared between 24XX and 3430 */ + +/* CM_CLKSEL_GFX */ +#define OMAP_CLKSEL_GFX_SHIFT 0 +#define OMAP_CLKSEL_GFX_MASK (0x7 << 0) + +/* CM_ICLKEN_GFX */ +#define OMAP_EN_GFX_SHIFT 0 +#define OMAP_EN_GFX_MASK (1 << 0) + +/* CM_IDLEST_GFX */ +#define OMAP_ST_GFX_MASK (1 << 0) + +#endif diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h index d3905263e035..48fc3f426fbd 100644 --- a/arch/arm/mach-omap2/cm44xx.h +++ b/arch/arm/mach-omap2/cm44xx.h @@ -18,6 +18,7 @@ #include "prcm-common.h" +#include "cm.h" #define OMAP4_CM_CLKSTCTRL 0x0000 diff --git a/arch/arm/mach-omap2/cm4xxx.c b/arch/arm/mach-omap2/cm4xxx.c index f8a660a1a4a6..25d2b3e4c6f7 100644 --- a/arch/arm/mach-omap2/cm4xxx.c +++ b/arch/arm/mach-omap2/cm4xxx.c @@ -23,7 +23,7 @@ #include -#include "cm.h" +#include "cm44xx.h" #include "cm-regbits-44xx.h" /** diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index b066c6e110a6..2506edfc4acb 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -20,8 +20,8 @@ #include "cm-regbits-34xx.h" #include "prm-regbits-34xx.h" -#include "cm.h" -#include "prm.h" +#include "prm2xxx_3xxx.h" +#include "cm2xxx_3xxx.h" #include "sdrc.h" #include "pm.h" #include "control.h" diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c index ed8d330522f1..cb535ee4e8fe 100644 --- a/arch/arm/mach-omap2/dpll3xxx.c +++ b/arch/arm/mach-omap2/dpll3xxx.c @@ -32,9 +32,7 @@ #include #include "clock.h" -#include "prm.h" -#include "prm-regbits-34xx.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" #include "cm-regbits-34xx.h" /* CM_AUTOIDLE_PLL*.AUTO_* bit values */ diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c index 6feeeae6c21b..cf5f3331af27 100644 --- a/arch/arm/mach-omap2/dsp.c +++ b/arch/arm/mach-omap2/dsp.c @@ -11,9 +11,16 @@ * published by the Free Software Foundation. */ +/* + * XXX The function pointers to the PRM/CM functions are incorrect and + * should be removed. No device driver should be changing PRM/CM bits + * directly; that's a layering violation -- those bits are the responsibility + * of the OMAP PM core code. + */ + #include -#include "prm.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" +#include "prm2xxx_3xxx.h" #ifdef CONFIG_BRIDGE_DVFS #include #endif diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 2b660e57a302..1312ce2913a5 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -145,8 +145,9 @@ #include #include -#include "cm.h" -#include "prm.h" +#include "cm2xxx_3xxx.h" +#include "cm44xx.h" +#include "prm2xxx_3xxx.h" #include "prm44xx.h" /* Maximum microseconds to wait for OMAP module to softreset */ diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index a8afb610c7d8..1f5d68beabf3 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -33,8 +33,8 @@ #include #include -#include "prm.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" +#include "prm2xxx_3xxx.h" #include "pm.h" int omap2_pm_debug; diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index aea7ced9a2ff..8ea49dcaae4d 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -42,9 +42,9 @@ #include #include -#include "prm.h" +#include "prm2xxx_3xxx.h" #include "prm-regbits-24xx.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" #include "cm-regbits-24xx.h" #include "sdrc.h" #include "pm.h" diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index c45b4fa1deeb..7e500d892804 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -41,11 +41,11 @@ #include -#include "cm.h" +#include "cm2xxx_3xxx.h" #include "cm-regbits-34xx.h" #include "prm-regbits-34xx.h" -#include "prm.h" +#include "prm2xxx_3xxx.h" #include "pm.h" #include "sdrc.h" #include "control.h" diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 77f42b96df41..8a0dcd05afeb 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -19,6 +19,9 @@ #include #include #include +#include "cm2xxx_3xxx.h" +#include "cm44xx.h" +#include "prm2xxx_3xxx.h" #include "prm44xx.h" #include diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c index 7efdf682d7fd..dae767bf1952 100644 --- a/arch/arm/mach-omap2/powerdomain44xx.c +++ b/arch/arm/mach-omap2/powerdomain44xx.c @@ -18,6 +18,7 @@ #include #include +#include "prm2xxx_3xxx.h" #include "prm44xx.h" #include "prm-regbits-44xx.h" #include "powerdomains.h" diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c index adc85d359289..e136895e0a37 100644 --- a/arch/arm/mach-omap2/powerdomains2xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c @@ -19,10 +19,8 @@ #include "powerdomains.h" #include "prcm-common.h" -#include "prm.h" +#include "prm2xxx_3xxx.h" #include "prm-regbits-24xx.h" -#include "cm.h" -#include "cm-regbits-24xx.h" /* 24XX powerdomains and dependencies */ diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c index 1ddc040d7bc0..1830c63ae676 100644 --- a/arch/arm/mach-omap2/powerdomains3xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c @@ -19,9 +19,9 @@ #include "powerdomains.h" #include "prcm-common.h" -#include "prm.h" +#include "prm2xxx_3xxx.h" #include "prm-regbits-34xx.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" #include "cm-regbits-34xx.h" /* diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c index cf6adfcf035f..069a21d54911 100644 --- a/arch/arm/mach-omap2/powerdomains44xx_data.c +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c @@ -26,7 +26,6 @@ #include "powerdomains.h" #include "prcm-common.h" -#include "prm.h" #include "prm-regbits-44xx.h" #include "prm44xx.h" #include "prcm_mpu44xx.h" diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 427ab612f0de..87486f559784 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h @@ -396,5 +396,11 @@ */ #define MAX_MODULE_HARDRESET_WAIT 10000 +# ifndef __ASSEMBLER__ +extern void __iomem *prm_base; +extern void __iomem *cm_base; +extern void __iomem *cm2_base; +# endif + #endif diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index aac8070fadcd..171c710c8221 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -29,16 +29,17 @@ #include "clock.h" #include "clock2xxx.h" -#include "cm.h" -#include "prm.h" +#include "cm2xxx_3xxx.h" +#include "cm44xx.h" +#include "prm2xxx_3xxx.h" #include "prm44xx.h" #include "prm-regbits-24xx.h" #include "prm-regbits-44xx.h" #include "control.h" -static void __iomem *prm_base; -static void __iomem *cm_base; -static void __iomem *cm2_base; +void __iomem *prm_base; +void __iomem *cm_base; +void __iomem *cm2_base; #define MAX_MODULE_ENABLE_WAIT 100000 @@ -158,56 +159,6 @@ void omap_prcm_arch_reset(char mode, const char *cmd) prcm_offs, OMAP4_RM_RSTCTRL); } -static inline u32 __omap_prcm_read(void __iomem *base, s16 module, u16 reg) -{ - BUG_ON(!base); - return __raw_readl(base + module + reg); -} - -static inline void __omap_prcm_write(u32 value, void __iomem *base, - s16 module, u16 reg) -{ - BUG_ON(!base); - __raw_writel(value, base + module + reg); -} - -/* Read a register in a PRM module */ -u32 prm_read_mod_reg(s16 module, u16 idx) -{ - return __omap_prcm_read(prm_base, module, idx); -} - -/* Write into a register in a PRM module */ -void prm_write_mod_reg(u32 val, s16 module, u16 idx) -{ - __omap_prcm_write(val, prm_base, module, idx); -} - -/* Read-modify-write a register in a PRM module. Caller must lock */ -u32 prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx) -{ - u32 v; - - v = prm_read_mod_reg(module, idx); - v &= ~mask; - v |= bits; - prm_write_mod_reg(v, module, idx); - - return v; -} - -/* Read a PRM register, AND it, and shift the result down to bit 0 */ -u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) -{ - u32 v; - - v = prm_read_mod_reg(domain, idx); - v &= mask; - v >>= __ffs(mask); - - return v; -} - /* Read a PRM register, AND it, and shift the result down to bit 0 */ u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask) { @@ -232,30 +183,6 @@ u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg) return v; } -/* Read a register in a CM module */ -u32 cm_read_mod_reg(s16 module, u16 idx) -{ - return __omap_prcm_read(cm_base, module, idx); -} - -/* Write into a register in a CM module */ -void cm_write_mod_reg(u32 val, s16 module, u16 idx) -{ - __omap_prcm_write(val, cm_base, module, idx); -} - -/* Read-modify-write a register in a CM module. Caller must lock */ -u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx) -{ - u32 v; - - v = cm_read_mod_reg(module, idx); - v &= ~mask; - v |= bits; - cm_write_mod_reg(v, module, idx); - - return v; -} /** * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness @@ -266,6 +193,9 @@ u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx) * * Returns 1 if the module indicated readiness in time, or 0 if it * failed to enable in roughly MAX_MODULE_ENABLE_WAIT microseconds. + * + * XXX This function is deprecated. It should be removed once the + * hwmod conversion is complete. */ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest, const char *name) diff --git a/arch/arm/mach-omap2/prm-regbits-24xx.h b/arch/arm/mach-omap2/prm-regbits-24xx.h index 0b188ffa710e..6ac966103f34 100644 --- a/arch/arm/mach-omap2/prm-regbits-24xx.h +++ b/arch/arm/mach-omap2/prm-regbits-24xx.h @@ -14,7 +14,7 @@ * published by the Free Software Foundation. */ -#include "prm.h" +#include "prm2xxx_3xxx.h" /* Bits shared between registers */ diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h index ec1a710db9ce..64c087af6a8b 100644 --- a/arch/arm/mach-omap2/prm-regbits-34xx.h +++ b/arch/arm/mach-omap2/prm-regbits-34xx.h @@ -1,6 +1,3 @@ -#ifndef __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_34XX_H -#define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_34XX_H - /* * OMAP3430 Power/Reset Management register bits * @@ -13,8 +10,11 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#ifndef __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_34XX_H +#define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_34XX_H + -#include "prm.h" +#include "prm2xxx_3xxx.h" /* Shared register bits */ diff --git a/arch/arm/mach-omap2/prm-regbits-44xx.h b/arch/arm/mach-omap2/prm-regbits-44xx.h index 25b19b610177..6d2776f6fc08 100644 --- a/arch/arm/mach-omap2/prm-regbits-44xx.h +++ b/arch/arm/mach-omap2/prm-regbits-44xx.h @@ -22,8 +22,6 @@ #ifndef __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_44XX_H #define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_44XX_H -#include "prm.h" - /* * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP, diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 10a24ca3f400..39d562169d18 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -1,304 +1,20 @@ -#ifndef __ARCH_ARM_MACH_OMAP2_PRM_H -#define __ARCH_ARM_MACH_OMAP2_PRM_H - /* - * OMAP2/3 Power/Reset Management (PRM) register definitions + * OMAP2/3/4 Power/Reset Management (PRM) bitfield definitions * * Copyright (C) 2007-2009 Texas Instruments, Inc. * Copyright (C) 2010 Nokia Corporation * - * Written by Paul Walmsley + * Paul Walmsley * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#ifndef __ARCH_ARM_MACH_OMAP2_PRM_H +#define __ARCH_ARM_MACH_OMAP2_PRM_H #include "prcm-common.h" -#define OMAP2420_PRM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) -#define OMAP2430_PRM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg)) -#define OMAP34XX_PRM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) - -/* - * Architecture-specific global PRM registers - * Use __raw_{read,write}l() with these registers. - * - * With a few exceptions, these are the register names beginning with - * PRCM_* on 24xx, and PRM_* on 34xx. (The exceptions are the - * IRQSTATUS and IRQENABLE bits.) - * - */ - -#define OMAP2_PRCM_REVISION_OFFSET 0x0000 -#define OMAP2420_PRCM_REVISION OMAP2420_PRM_REGADDR(OCP_MOD, 0x0000) -#define OMAP2_PRCM_SYSCONFIG_OFFSET 0x0010 -#define OMAP2420_PRCM_SYSCONFIG OMAP2420_PRM_REGADDR(OCP_MOD, 0x0010) - -#define OMAP2_PRCM_IRQSTATUS_MPU_OFFSET 0x0018 -#define OMAP2420_PRCM_IRQSTATUS_MPU OMAP2420_PRM_REGADDR(OCP_MOD, 0x0018) -#define OMAP2_PRCM_IRQENABLE_MPU_OFFSET 0x001c -#define OMAP2420_PRCM_IRQENABLE_MPU OMAP2420_PRM_REGADDR(OCP_MOD, 0x001c) - -#define OMAP2_PRCM_VOLTCTRL_OFFSET 0x0050 -#define OMAP2420_PRCM_VOLTCTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0050) -#define OMAP2_PRCM_VOLTST_OFFSET 0x0054 -#define OMAP2420_PRCM_VOLTST OMAP2420_PRM_REGADDR(OCP_MOD, 0x0054) -#define OMAP2_PRCM_CLKSRC_CTRL_OFFSET 0x0060 -#define OMAP2420_PRCM_CLKSRC_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0060) -#define OMAP2_PRCM_CLKOUT_CTRL_OFFSET 0x0070 -#define OMAP2420_PRCM_CLKOUT_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0070) -#define OMAP2_PRCM_CLKEMUL_CTRL_OFFSET 0x0078 -#define OMAP2420_PRCM_CLKEMUL_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0078) -#define OMAP2_PRCM_CLKCFG_CTRL_OFFSET 0x0080 -#define OMAP2420_PRCM_CLKCFG_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0080) -#define OMAP2_PRCM_CLKCFG_STATUS_OFFSET 0x0084 -#define OMAP2420_PRCM_CLKCFG_STATUS OMAP2420_PRM_REGADDR(OCP_MOD, 0x0084) -#define OMAP2_PRCM_VOLTSETUP_OFFSET 0x0090 -#define OMAP2420_PRCM_VOLTSETUP OMAP2420_PRM_REGADDR(OCP_MOD, 0x0090) -#define OMAP2_PRCM_CLKSSETUP_OFFSET 0x0094 -#define OMAP2420_PRCM_CLKSSETUP OMAP2420_PRM_REGADDR(OCP_MOD, 0x0094) -#define OMAP2_PRCM_POLCTRL_OFFSET 0x0098 -#define OMAP2420_PRCM_POLCTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0098) - -#define OMAP2430_PRCM_REVISION OMAP2430_PRM_REGADDR(OCP_MOD, 0x0000) -#define OMAP2430_PRCM_SYSCONFIG OMAP2430_PRM_REGADDR(OCP_MOD, 0x0010) - -#define OMAP2430_PRCM_IRQSTATUS_MPU OMAP2430_PRM_REGADDR(OCP_MOD, 0x0018) -#define OMAP2430_PRCM_IRQENABLE_MPU OMAP2430_PRM_REGADDR(OCP_MOD, 0x001c) - -#define OMAP2430_PRCM_VOLTCTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0050) -#define OMAP2430_PRCM_VOLTST OMAP2430_PRM_REGADDR(OCP_MOD, 0x0054) -#define OMAP2430_PRCM_CLKSRC_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0060) -#define OMAP2430_PRCM_CLKOUT_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0070) -#define OMAP2430_PRCM_CLKEMUL_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0078) -#define OMAP2430_PRCM_CLKCFG_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0080) -#define OMAP2430_PRCM_CLKCFG_STATUS OMAP2430_PRM_REGADDR(OCP_MOD, 0x0084) -#define OMAP2430_PRCM_VOLTSETUP OMAP2430_PRM_REGADDR(OCP_MOD, 0x0090) -#define OMAP2430_PRCM_CLKSSETUP OMAP2430_PRM_REGADDR(OCP_MOD, 0x0094) -#define OMAP2430_PRCM_POLCTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0098) - -#define OMAP3_PRM_REVISION_OFFSET 0x0004 -#define OMAP3430_PRM_REVISION OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0004) -#define OMAP3_PRM_SYSCONFIG_OFFSET 0x0014 -#define OMAP3430_PRM_SYSCONFIG OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0014) - -#define OMAP3_PRM_IRQSTATUS_MPU_OFFSET 0x0018 -#define OMAP3430_PRM_IRQSTATUS_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0018) -#define OMAP3_PRM_IRQENABLE_MPU_OFFSET 0x001c -#define OMAP3430_PRM_IRQENABLE_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x001c) - - -#define OMAP3_PRM_VC_SMPS_SA_OFFSET 0x0020 -#define OMAP3430_PRM_VC_SMPS_SA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0020) -#define OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET 0x0024 -#define OMAP3430_PRM_VC_SMPS_VOL_RA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0024) -#define OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET 0x0028 -#define OMAP3430_PRM_VC_SMPS_CMD_RA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0028) -#define OMAP3_PRM_VC_CMD_VAL_0_OFFSET 0x002c -#define OMAP3430_PRM_VC_CMD_VAL_0 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x002c) -#define OMAP3_PRM_VC_CMD_VAL_1_OFFSET 0x0030 -#define OMAP3430_PRM_VC_CMD_VAL_1 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0030) -#define OMAP3_PRM_VC_CH_CONF_OFFSET 0x0034 -#define OMAP3430_PRM_VC_CH_CONF OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0034) -#define OMAP3_PRM_VC_I2C_CFG_OFFSET 0x0038 -#define OMAP3430_PRM_VC_I2C_CFG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0038) -#define OMAP3_PRM_VC_BYPASS_VAL_OFFSET 0x003c -#define OMAP3430_PRM_VC_BYPASS_VAL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x003c) -#define OMAP3_PRM_RSTCTRL_OFFSET 0x0050 -#define OMAP3430_PRM_RSTCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0050) -#define OMAP3_PRM_RSTTIME_OFFSET 0x0054 -#define OMAP3430_PRM_RSTTIME OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0054) -#define OMAP3_PRM_RSTST_OFFSET 0x0058 -#define OMAP3430_PRM_RSTST OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0058) -#define OMAP3_PRM_VOLTCTRL_OFFSET 0x0060 -#define OMAP3430_PRM_VOLTCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0060) -#define OMAP3_PRM_SRAM_PCHARGE_OFFSET 0x0064 -#define OMAP3430_PRM_SRAM_PCHARGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0064) -#define OMAP3_PRM_CLKSRC_CTRL_OFFSET 0x0070 -#define OMAP3430_PRM_CLKSRC_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0070) -#define OMAP3_PRM_VOLTSETUP1_OFFSET 0x0090 -#define OMAP3430_PRM_VOLTSETUP1 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0090) -#define OMAP3_PRM_VOLTOFFSET_OFFSET 0x0094 -#define OMAP3430_PRM_VOLTOFFSET OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0094) -#define OMAP3_PRM_CLKSETUP_OFFSET 0x0098 -#define OMAP3430_PRM_CLKSETUP OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0098) -#define OMAP3_PRM_POLCTRL_OFFSET 0x009c -#define OMAP3430_PRM_POLCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x009c) -#define OMAP3_PRM_VOLTSETUP2_OFFSET 0x00a0 -#define OMAP3430_PRM_VOLTSETUP2 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00a0) -#define OMAP3_PRM_VP1_CONFIG_OFFSET 0x00b0 -#define OMAP3430_PRM_VP1_CONFIG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b0) -#define OMAP3_PRM_VP1_VSTEPMIN_OFFSET 0x00b4 -#define OMAP3430_PRM_VP1_VSTEPMIN OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b4) -#define OMAP3_PRM_VP1_VSTEPMAX_OFFSET 0x00b8 -#define OMAP3430_PRM_VP1_VSTEPMAX OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b8) -#define OMAP3_PRM_VP1_VLIMITTO_OFFSET 0x00bc -#define OMAP3430_PRM_VP1_VLIMITTO OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00bc) -#define OMAP3_PRM_VP1_VOLTAGE_OFFSET 0x00c0 -#define OMAP3430_PRM_VP1_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c0) -#define OMAP3_PRM_VP1_STATUS_OFFSET 0x00c4 -#define OMAP3430_PRM_VP1_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c4) -#define OMAP3_PRM_VP2_CONFIG_OFFSET 0x00d0 -#define OMAP3430_PRM_VP2_CONFIG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d0) -#define OMAP3_PRM_VP2_VSTEPMIN_OFFSET 0x00d4 -#define OMAP3430_PRM_VP2_VSTEPMIN OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d4) -#define OMAP3_PRM_VP2_VSTEPMAX_OFFSET 0x00d8 -#define OMAP3430_PRM_VP2_VSTEPMAX OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d8) -#define OMAP3_PRM_VP2_VLIMITTO_OFFSET 0x00dc -#define OMAP3430_PRM_VP2_VLIMITTO OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00dc) -#define OMAP3_PRM_VP2_VOLTAGE_OFFSET 0x00e0 -#define OMAP3430_PRM_VP2_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e0) -#define OMAP3_PRM_VP2_STATUS_OFFSET 0x00e4 -#define OMAP3430_PRM_VP2_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e4) - -#define OMAP3_PRM_CLKSEL_OFFSET 0x0040 -#define OMAP3430_PRM_CLKSEL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040) -#define OMAP3_PRM_CLKOUT_CTRL_OFFSET 0x0070 -#define OMAP3430_PRM_CLKOUT_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0070) - -/* - * Module specific PRM registers from PRM_BASE + domain offset - * - * Use prm_{read,write}_mod_reg() with these registers. - * - * With a few exceptions, these are the register names beginning with - * {PM,RM}_* on both architectures. (The exceptions are the IRQSTATUS - * and IRQENABLE bits.) - * - */ - -/* Registers appearing on both 24xx and 34xx */ - -#define OMAP2_RM_RSTCTRL 0x0050 -#define OMAP2_RM_RSTTIME 0x0054 -#define OMAP2_RM_RSTST 0x0058 -#define OMAP2_PM_PWSTCTRL 0x00e0 -#define OMAP2_PM_PWSTST 0x00e4 - -#define PM_WKEN 0x00a0 -#define PM_WKEN1 PM_WKEN -#define PM_WKST 0x00b0 -#define PM_WKST1 PM_WKST -#define PM_WKDEP 0x00c8 -#define PM_EVGENCTRL 0x00d4 -#define PM_EVGENONTIM 0x00d8 -#define PM_EVGENOFFTIM 0x00dc - -/* Omap2 specific registers */ -#define OMAP24XX_PM_WKEN2 0x00a4 -#define OMAP24XX_PM_WKST2 0x00b4 - -#define OMAP24XX_PRCM_IRQSTATUS_DSP 0x00f0 /* IVA mod */ -#define OMAP24XX_PRCM_IRQENABLE_DSP 0x00f4 /* IVA mod */ -#define OMAP24XX_PRCM_IRQSTATUS_IVA 0x00f8 -#define OMAP24XX_PRCM_IRQENABLE_IVA 0x00fc - -/* Omap3 specific registers */ -#define OMAP3430ES2_PM_WKEN3 0x00f0 -#define OMAP3430ES2_PM_WKST3 0x00b8 - -#define OMAP3430_PM_MPUGRPSEL 0x00a4 -#define OMAP3430_PM_MPUGRPSEL1 OMAP3430_PM_MPUGRPSEL -#define OMAP3430ES2_PM_MPUGRPSEL3 0x00f8 - -#define OMAP3430_PM_IVAGRPSEL 0x00a8 -#define OMAP3430_PM_IVAGRPSEL1 OMAP3430_PM_IVAGRPSEL -#define OMAP3430ES2_PM_IVAGRPSEL3 0x00f4 - -#define OMAP3430_PM_PREPWSTST 0x00e8 - -#define OMAP3430_PRM_IRQSTATUS_IVA2 0x00f8 -#define OMAP3430_PRM_IRQENABLE_IVA2 0x00fc - - -#ifndef __ASSEMBLER__ - -/* Power/reset management domain register get/set */ -extern u32 prm_read_mod_reg(s16 module, u16 idx); -extern void prm_write_mod_reg(u32 val, s16 module, u16 idx); -extern u32 prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); - -/* Read-modify-write bits in a PRM register (by domain) */ -static inline u32 prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) -{ - return prm_rmw_mod_reg_bits(bits, bits, module, idx); -} - -static inline u32 prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) -{ - return prm_rmw_mod_reg_bits(bits, 0x0, module, idx); -} - -/* These omap2_ PRM functions apply to both OMAP2 and 3 */ -int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); -int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); -int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift); - -#endif - -/* - * Bits common to specific registers - * - * The 3430 register and bit names are generally used, - * since they tend to make more sense - */ - -/* PM_EVGENONTIM_MPU */ -/* Named PM_EVEGENONTIM_MPU on the 24XX */ -#define OMAP_ONTIMEVAL_SHIFT 0 -#define OMAP_ONTIMEVAL_MASK (0xffffffff << 0) - -/* PM_EVGENOFFTIM_MPU */ -/* Named PM_EVEGENOFFTIM_MPU on the 24XX */ -#define OMAP_OFFTIMEVAL_SHIFT 0 -#define OMAP_OFFTIMEVAL_MASK (0xffffffff << 0) - -/* PRM_CLKSETUP and PRCM_VOLTSETUP */ -/* Named PRCM_CLKSSETUP on the 24XX */ -#define OMAP_SETUP_TIME_SHIFT 0 -#define OMAP_SETUP_TIME_MASK (0xffff << 0) - -/* PRM_CLKSRC_CTRL */ -/* Named PRCM_CLKSRC_CTRL on the 24XX */ -#define OMAP_SYSCLKDIV_SHIFT 6 -#define OMAP_SYSCLKDIV_MASK (0x3 << 6) -#define OMAP_AUTOEXTCLKMODE_SHIFT 3 -#define OMAP_AUTOEXTCLKMODE_MASK (0x3 << 3) -#define OMAP_SYSCLKSEL_SHIFT 0 -#define OMAP_SYSCLKSEL_MASK (0x3 << 0) - -/* PM_EVGENCTRL_MPU */ -#define OMAP_OFFLOADMODE_SHIFT 3 -#define OMAP_OFFLOADMODE_MASK (0x3 << 3) -#define OMAP_ONLOADMODE_SHIFT 1 -#define OMAP_ONLOADMODE_MASK (0x3 << 1) -#define OMAP_ENABLE_MASK (1 << 0) - -/* PRM_RSTTIME */ -/* Named RM_RSTTIME_WKUP on the 24xx */ -#define OMAP_RSTTIME2_SHIFT 8 -#define OMAP_RSTTIME2_MASK (0x1f << 8) -#define OMAP_RSTTIME1_SHIFT 0 -#define OMAP_RSTTIME1_MASK (0xff << 0) - -/* PRM_RSTCTRL */ -/* Named RM_RSTCTRL_WKUP on the 24xx */ -/* 2420 calls RST_DPLL3 'RST_DPLL' */ -#define OMAP_RST_DPLL3_MASK (1 << 2) -#define OMAP_RST_GS_MASK (1 << 1) - - -/* - * Bits common to module-shared registers - * - * Not all registers of a particular type support all of these bits - - * check TRM if you are unsure - */ - /* * 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP * @@ -323,59 +39,6 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift); #define OMAP_POWERSTATEST_SHIFT 0 #define OMAP_POWERSTATEST_MASK (0x3 << 0) -/* - * 24XX: RM_RSTST_MPU and RM_RSTST_DSP - on 24XX, 'COREDOMAINWKUP_RST' is - * called 'COREWKUP_RST' - * - * 3430: RM_RSTST_IVA2, RM_RSTST_MPU, RM_RSTST_GFX, RM_RSTST_DSS, - * RM_RSTST_CAM, RM_RSTST_PER, RM_RSTST_NEON - */ -#define OMAP_COREDOMAINWKUP_RST_MASK (1 << 3) - -/* - * 24XX: RM_RSTST_MPU, RM_RSTST_GFX, RM_RSTST_DSP - * - * 2430: RM_RSTST_MDM - * - * 3430: RM_RSTST_CORE, RM_RSTST_EMU - */ -#define OMAP_DOMAINWKUP_RST_MASK (1 << 2) - -/* - * 24XX: RM_RSTST_MPU, RM_RSTST_WKUP, RM_RSTST_DSP - * On 24XX, 'GLOBALWARM_RST' is called 'GLOBALWMPU_RST'. - * - * 2430: RM_RSTST_MDM - * - * 3430: RM_RSTST_CORE, RM_RSTST_EMU - */ -#define OMAP_GLOBALWARM_RST_MASK (1 << 1) -#define OMAP_GLOBALCOLD_RST_MASK (1 << 0) - -/* - * 24XX: PM_WKDEP_GFX, PM_WKDEP_MPU, PM_WKDEP_CORE, PM_WKDEP_DSP - * 2420 TRM sometimes uses "EN_WAKEUP" instead of "EN_WKUP" - * - * 2430: PM_WKDEP_MDM - * - * 3430: PM_WKDEP_IVA2, PM_WKDEP_GFX, PM_WKDEP_DSS, PM_WKDEP_CAM, - * PM_WKDEP_PER - */ -#define OMAP_EN_WKUP_SHIFT 4 -#define OMAP_EN_WKUP_MASK (1 << 4) - -/* - * 24XX: PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX, - * PM_PWSTCTRL_DSP - * - * 2430: PM_PWSTCTRL_MDM - * - * 3430: PM_PWSTCTRL_IVA2, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX, - * PM_PWSTCTRL_DSS, PM_PWSTCTRL_CAM, PM_PWSTCTRL_PER, - * PM_PWSTCTRL_NEON - */ -#define OMAP_LOGICRETSTATE_MASK (1 << 2) - /* * 24XX: PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX, * PM_PWSTCTRL_DSP, PM_PWSTST_MPU @@ -390,11 +53,4 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift); #define OMAP_POWERSTATE_MASK (0x3 << 0) -/* - * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP - * submodule to exit hardreset - */ -#define MAX_MODULE_HARDRESET_WAIT 10000 - - #endif diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index 421771eee450..064b52a3e202 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c @@ -12,18 +12,65 @@ */ #include -#include #include #include +#include #include #include #include -#include "prm.h" +#include "prm2xxx_3xxx.h" +#include "cm2xxx_3xxx.h" #include "prm-regbits-24xx.h" #include "prm-regbits-34xx.h" +u32 prm_read_mod_reg(s16 module, u16 idx) +{ + return __raw_readl(prm_base + module + idx); +} + +void prm_write_mod_reg(u32 val, s16 module, u16 idx) +{ + __raw_writel(val, prm_base + module + idx); +} + +/* Read-modify-write a register in a PRM module. Caller must lock */ +u32 prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx) +{ + u32 v; + + v = prm_read_mod_reg(module, idx); + v &= ~mask; + v |= bits; + prm_write_mod_reg(v, module, idx); + + return v; +} + +/* Read a PRM register, AND it, and shift the result down to bit 0 */ +u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) +{ + u32 v; + + v = prm_read_mod_reg(domain, idx); + v &= mask; + v >>= __ffs(mask); + + return v; +} + +u32 prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) +{ + return prm_rmw_mod_reg_bits(bits, bits, module, idx); +} + +u32 prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) +{ + return prm_rmw_mod_reg_bits(bits, 0x0, module, idx); +} + + /** * omap2_prm_is_hardreset_asserted - read the HW reset line state of * submodules contained in the hwmod module diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h new file mode 100644 index 000000000000..ab28517c82ce --- /dev/null +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h @@ -0,0 +1,367 @@ +/* + * OMAP2/3 Power/Reset Management (PRM) register definitions + * + * Copyright (C) 2007-2009 Texas Instruments, Inc. + * Copyright (C) 2008-2010 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * The PRM hardware modules on the OMAP2/3 are quite similar to each + * other. The PRM on OMAP4 has a new register layout, and is handled + * in a separate file. + */ +#ifndef __ARCH_ARM_MACH_OMAP2_PRM2XXX_3XXX_H +#define __ARCH_ARM_MACH_OMAP2_PRM2XXX_3XXX_H + +#include "prcm-common.h" +#include "prm.h" + +#define OMAP2420_PRM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) +#define OMAP2430_PRM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg)) +#define OMAP34XX_PRM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) + + +/* + * OMAP2-specific global PRM registers + * Use __raw_{read,write}l() with these registers. + * + * With a few exceptions, these are the register names beginning with + * PRCM_* on 24xx. (The exceptions are the IRQSTATUS and IRQENABLE + * bits.) + * + */ + +#define OMAP2_PRCM_REVISION_OFFSET 0x0000 +#define OMAP2420_PRCM_REVISION OMAP2420_PRM_REGADDR(OCP_MOD, 0x0000) +#define OMAP2_PRCM_SYSCONFIG_OFFSET 0x0010 +#define OMAP2420_PRCM_SYSCONFIG OMAP2420_PRM_REGADDR(OCP_MOD, 0x0010) + +#define OMAP2_PRCM_IRQSTATUS_MPU_OFFSET 0x0018 +#define OMAP2420_PRCM_IRQSTATUS_MPU OMAP2420_PRM_REGADDR(OCP_MOD, 0x0018) +#define OMAP2_PRCM_IRQENABLE_MPU_OFFSET 0x001c +#define OMAP2420_PRCM_IRQENABLE_MPU OMAP2420_PRM_REGADDR(OCP_MOD, 0x001c) + +#define OMAP2_PRCM_VOLTCTRL_OFFSET 0x0050 +#define OMAP2420_PRCM_VOLTCTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0050) +#define OMAP2_PRCM_VOLTST_OFFSET 0x0054 +#define OMAP2420_PRCM_VOLTST OMAP2420_PRM_REGADDR(OCP_MOD, 0x0054) +#define OMAP2_PRCM_CLKSRC_CTRL_OFFSET 0x0060 +#define OMAP2420_PRCM_CLKSRC_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0060) +#define OMAP2_PRCM_CLKOUT_CTRL_OFFSET 0x0070 +#define OMAP2420_PRCM_CLKOUT_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0070) +#define OMAP2_PRCM_CLKEMUL_CTRL_OFFSET 0x0078 +#define OMAP2420_PRCM_CLKEMUL_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0078) +#define OMAP2_PRCM_CLKCFG_CTRL_OFFSET 0x0080 +#define OMAP2420_PRCM_CLKCFG_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0080) +#define OMAP2_PRCM_CLKCFG_STATUS_OFFSET 0x0084 +#define OMAP2420_PRCM_CLKCFG_STATUS OMAP2420_PRM_REGADDR(OCP_MOD, 0x0084) +#define OMAP2_PRCM_VOLTSETUP_OFFSET 0x0090 +#define OMAP2420_PRCM_VOLTSETUP OMAP2420_PRM_REGADDR(OCP_MOD, 0x0090) +#define OMAP2_PRCM_CLKSSETUP_OFFSET 0x0094 +#define OMAP2420_PRCM_CLKSSETUP OMAP2420_PRM_REGADDR(OCP_MOD, 0x0094) +#define OMAP2_PRCM_POLCTRL_OFFSET 0x0098 +#define OMAP2420_PRCM_POLCTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0098) + +#define OMAP2430_PRCM_REVISION OMAP2430_PRM_REGADDR(OCP_MOD, 0x0000) +#define OMAP2430_PRCM_SYSCONFIG OMAP2430_PRM_REGADDR(OCP_MOD, 0x0010) + +#define OMAP2430_PRCM_IRQSTATUS_MPU OMAP2430_PRM_REGADDR(OCP_MOD, 0x0018) +#define OMAP2430_PRCM_IRQENABLE_MPU OMAP2430_PRM_REGADDR(OCP_MOD, 0x001c) + +#define OMAP2430_PRCM_VOLTCTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0050) +#define OMAP2430_PRCM_VOLTST OMAP2430_PRM_REGADDR(OCP_MOD, 0x0054) +#define OMAP2430_PRCM_CLKSRC_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0060) +#define OMAP2430_PRCM_CLKOUT_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0070) +#define OMAP2430_PRCM_CLKEMUL_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0078) +#define OMAP2430_PRCM_CLKCFG_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0080) +#define OMAP2430_PRCM_CLKCFG_STATUS OMAP2430_PRM_REGADDR(OCP_MOD, 0x0084) +#define OMAP2430_PRCM_VOLTSETUP OMAP2430_PRM_REGADDR(OCP_MOD, 0x0090) +#define OMAP2430_PRCM_CLKSSETUP OMAP2430_PRM_REGADDR(OCP_MOD, 0x0094) +#define OMAP2430_PRCM_POLCTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0098) + +/* + * OMAP3-specific global PRM registers + * Use __raw_{read,write}l() with these registers. + * + * With a few exceptions, these are the register names beginning with + * PRM_* on 34xx. (The exceptions are the IRQSTATUS and IRQENABLE + * bits.) + */ + +#define OMAP3_PRM_REVISION_OFFSET 0x0004 +#define OMAP3430_PRM_REVISION OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0004) +#define OMAP3_PRM_SYSCONFIG_OFFSET 0x0014 +#define OMAP3430_PRM_SYSCONFIG OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0014) + +#define OMAP3_PRM_IRQSTATUS_MPU_OFFSET 0x0018 +#define OMAP3430_PRM_IRQSTATUS_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0018) +#define OMAP3_PRM_IRQENABLE_MPU_OFFSET 0x001c +#define OMAP3430_PRM_IRQENABLE_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x001c) + + +#define OMAP3_PRM_VC_SMPS_SA_OFFSET 0x0020 +#define OMAP3430_PRM_VC_SMPS_SA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0020) +#define OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET 0x0024 +#define OMAP3430_PRM_VC_SMPS_VOL_RA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0024) +#define OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET 0x0028 +#define OMAP3430_PRM_VC_SMPS_CMD_RA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0028) +#define OMAP3_PRM_VC_CMD_VAL_0_OFFSET 0x002c +#define OMAP3430_PRM_VC_CMD_VAL_0 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x002c) +#define OMAP3_PRM_VC_CMD_VAL_1_OFFSET 0x0030 +#define OMAP3430_PRM_VC_CMD_VAL_1 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0030) +#define OMAP3_PRM_VC_CH_CONF_OFFSET 0x0034 +#define OMAP3430_PRM_VC_CH_CONF OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0034) +#define OMAP3_PRM_VC_I2C_CFG_OFFSET 0x0038 +#define OMAP3430_PRM_VC_I2C_CFG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0038) +#define OMAP3_PRM_VC_BYPASS_VAL_OFFSET 0x003c +#define OMAP3430_PRM_VC_BYPASS_VAL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x003c) +#define OMAP3_PRM_RSTCTRL_OFFSET 0x0050 +#define OMAP3430_PRM_RSTCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0050) +#define OMAP3_PRM_RSTTIME_OFFSET 0x0054 +#define OMAP3430_PRM_RSTTIME OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0054) +#define OMAP3_PRM_RSTST_OFFSET 0x0058 +#define OMAP3430_PRM_RSTST OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0058) +#define OMAP3_PRM_VOLTCTRL_OFFSET 0x0060 +#define OMAP3430_PRM_VOLTCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0060) +#define OMAP3_PRM_SRAM_PCHARGE_OFFSET 0x0064 +#define OMAP3430_PRM_SRAM_PCHARGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0064) +#define OMAP3_PRM_CLKSRC_CTRL_OFFSET 0x0070 +#define OMAP3430_PRM_CLKSRC_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0070) +#define OMAP3_PRM_VOLTSETUP1_OFFSET 0x0090 +#define OMAP3430_PRM_VOLTSETUP1 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0090) +#define OMAP3_PRM_VOLTOFFSET_OFFSET 0x0094 +#define OMAP3430_PRM_VOLTOFFSET OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0094) +#define OMAP3_PRM_CLKSETUP_OFFSET 0x0098 +#define OMAP3430_PRM_CLKSETUP OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0098) +#define OMAP3_PRM_POLCTRL_OFFSET 0x009c +#define OMAP3430_PRM_POLCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x009c) +#define OMAP3_PRM_VOLTSETUP2_OFFSET 0x00a0 +#define OMAP3430_PRM_VOLTSETUP2 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00a0) +#define OMAP3_PRM_VP1_CONFIG_OFFSET 0x00b0 +#define OMAP3430_PRM_VP1_CONFIG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b0) +#define OMAP3_PRM_VP1_VSTEPMIN_OFFSET 0x00b4 +#define OMAP3430_PRM_VP1_VSTEPMIN OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b4) +#define OMAP3_PRM_VP1_VSTEPMAX_OFFSET 0x00b8 +#define OMAP3430_PRM_VP1_VSTEPMAX OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b8) +#define OMAP3_PRM_VP1_VLIMITTO_OFFSET 0x00bc +#define OMAP3430_PRM_VP1_VLIMITTO OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00bc) +#define OMAP3_PRM_VP1_VOLTAGE_OFFSET 0x00c0 +#define OMAP3430_PRM_VP1_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c0) +#define OMAP3_PRM_VP1_STATUS_OFFSET 0x00c4 +#define OMAP3430_PRM_VP1_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c4) +#define OMAP3_PRM_VP2_CONFIG_OFFSET 0x00d0 +#define OMAP3430_PRM_VP2_CONFIG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d0) +#define OMAP3_PRM_VP2_VSTEPMIN_OFFSET 0x00d4 +#define OMAP3430_PRM_VP2_VSTEPMIN OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d4) +#define OMAP3_PRM_VP2_VSTEPMAX_OFFSET 0x00d8 +#define OMAP3430_PRM_VP2_VSTEPMAX OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d8) +#define OMAP3_PRM_VP2_VLIMITTO_OFFSET 0x00dc +#define OMAP3430_PRM_VP2_VLIMITTO OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00dc) +#define OMAP3_PRM_VP2_VOLTAGE_OFFSET 0x00e0 +#define OMAP3430_PRM_VP2_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e0) +#define OMAP3_PRM_VP2_STATUS_OFFSET 0x00e4 +#define OMAP3430_PRM_VP2_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e4) + +#define OMAP3_PRM_CLKSEL_OFFSET 0x0040 +#define OMAP3430_PRM_CLKSEL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040) +#define OMAP3_PRM_CLKOUT_CTRL_OFFSET 0x0070 +#define OMAP3430_PRM_CLKOUT_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0070) + +/* + * Module specific PRM register offsets from PRM_BASE + domain offset + * + * Use prm_{read,write}_mod_reg() with these registers. + * + * With a few exceptions, these are the register names beginning with + * {PM,RM}_* on both OMAP2/3 SoC families.. (The exceptions are the + * IRQSTATUS and IRQENABLE bits.) + */ + +/* Register offsets appearing on both OMAP2 and OMAP3 */ + +#define OMAP2_RM_RSTCTRL 0x0050 +#define OMAP2_RM_RSTTIME 0x0054 +#define OMAP2_RM_RSTST 0x0058 +#define OMAP2_PM_PWSTCTRL 0x00e0 +#define OMAP2_PM_PWSTST 0x00e4 + +#define PM_WKEN 0x00a0 +#define PM_WKEN1 PM_WKEN +#define PM_WKST 0x00b0 +#define PM_WKST1 PM_WKST +#define PM_WKDEP 0x00c8 +#define PM_EVGENCTRL 0x00d4 +#define PM_EVGENONTIM 0x00d8 +#define PM_EVGENOFFTIM 0x00dc + +/* OMAP2xxx specific register offsets */ +#define OMAP24XX_PM_WKEN2 0x00a4 +#define OMAP24XX_PM_WKST2 0x00b4 + +#define OMAP24XX_PRCM_IRQSTATUS_DSP 0x00f0 /* IVA mod */ +#define OMAP24XX_PRCM_IRQENABLE_DSP 0x00f4 /* IVA mod */ +#define OMAP24XX_PRCM_IRQSTATUS_IVA 0x00f8 +#define OMAP24XX_PRCM_IRQENABLE_IVA 0x00fc + +/* OMAP3 specific register offsets */ +#define OMAP3430ES2_PM_WKEN3 0x00f0 +#define OMAP3430ES2_PM_WKST3 0x00b8 + +#define OMAP3430_PM_MPUGRPSEL 0x00a4 +#define OMAP3430_PM_MPUGRPSEL1 OMAP3430_PM_MPUGRPSEL +#define OMAP3430ES2_PM_MPUGRPSEL3 0x00f8 + +#define OMAP3430_PM_IVAGRPSEL 0x00a8 +#define OMAP3430_PM_IVAGRPSEL1 OMAP3430_PM_IVAGRPSEL +#define OMAP3430ES2_PM_IVAGRPSEL3 0x00f4 + +#define OMAP3430_PM_PREPWSTST 0x00e8 + +#define OMAP3430_PRM_IRQSTATUS_IVA2 0x00f8 +#define OMAP3430_PRM_IRQENABLE_IVA2 0x00fc + + +#ifndef __ASSEMBLER__ + +/* Power/reset management domain register get/set */ +extern u32 prm_read_mod_reg(s16 module, u16 idx); +extern void prm_write_mod_reg(u32 val, s16 module, u16 idx); +extern u32 prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); +extern u32 prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx); +extern u32 prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx); +extern u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask); + +/* These omap2_ PRM functions apply to both OMAP2 and 3 */ +extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); +extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); +extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift); + +#endif + +/* + * Bits common to specific registers + * + * The 3430 register and bit names are generally used, + * since they tend to make more sense + */ + +/* PM_EVGENONTIM_MPU */ +/* Named PM_EVEGENONTIM_MPU on the 24XX */ +#define OMAP_ONTIMEVAL_SHIFT 0 +#define OMAP_ONTIMEVAL_MASK (0xffffffff << 0) + +/* PM_EVGENOFFTIM_MPU */ +/* Named PM_EVEGENOFFTIM_MPU on the 24XX */ +#define OMAP_OFFTIMEVAL_SHIFT 0 +#define OMAP_OFFTIMEVAL_MASK (0xffffffff << 0) + +/* PRM_CLKSETUP and PRCM_VOLTSETUP */ +/* Named PRCM_CLKSSETUP on the 24XX */ +#define OMAP_SETUP_TIME_SHIFT 0 +#define OMAP_SETUP_TIME_MASK (0xffff << 0) + +/* PRM_CLKSRC_CTRL */ +/* Named PRCM_CLKSRC_CTRL on the 24XX */ +#define OMAP_SYSCLKDIV_SHIFT 6 +#define OMAP_SYSCLKDIV_MASK (0x3 << 6) +#define OMAP_AUTOEXTCLKMODE_SHIFT 3 +#define OMAP_AUTOEXTCLKMODE_MASK (0x3 << 3) +#define OMAP_SYSCLKSEL_SHIFT 0 +#define OMAP_SYSCLKSEL_MASK (0x3 << 0) + +/* PM_EVGENCTRL_MPU */ +#define OMAP_OFFLOADMODE_SHIFT 3 +#define OMAP_OFFLOADMODE_MASK (0x3 << 3) +#define OMAP_ONLOADMODE_SHIFT 1 +#define OMAP_ONLOADMODE_MASK (0x3 << 1) +#define OMAP_ENABLE_MASK (1 << 0) + +/* PRM_RSTTIME */ +/* Named RM_RSTTIME_WKUP on the 24xx */ +#define OMAP_RSTTIME2_SHIFT 8 +#define OMAP_RSTTIME2_MASK (0x1f << 8) +#define OMAP_RSTTIME1_SHIFT 0 +#define OMAP_RSTTIME1_MASK (0xff << 0) + +/* PRM_RSTCTRL */ +/* Named RM_RSTCTRL_WKUP on the 24xx */ +/* 2420 calls RST_DPLL3 'RST_DPLL' */ +#define OMAP_RST_DPLL3_MASK (1 << 2) +#define OMAP_RST_GS_MASK (1 << 1) + + +/* + * Bits common to module-shared registers + * + * Not all registers of a particular type support all of these bits - + * check TRM if you are unsure + */ + +/* + * 24XX: RM_RSTST_MPU and RM_RSTST_DSP - on 24XX, 'COREDOMAINWKUP_RST' is + * called 'COREWKUP_RST' + * + * 3430: RM_RSTST_IVA2, RM_RSTST_MPU, RM_RSTST_GFX, RM_RSTST_DSS, + * RM_RSTST_CAM, RM_RSTST_PER, RM_RSTST_NEON + */ +#define OMAP_COREDOMAINWKUP_RST_MASK (1 << 3) + +/* + * 24XX: RM_RSTST_MPU, RM_RSTST_GFX, RM_RSTST_DSP + * + * 2430: RM_RSTST_MDM + * + * 3430: RM_RSTST_CORE, RM_RSTST_EMU + */ +#define OMAP_DOMAINWKUP_RST_MASK (1 << 2) + +/* + * 24XX: RM_RSTST_MPU, RM_RSTST_WKUP, RM_RSTST_DSP + * On 24XX, 'GLOBALWARM_RST' is called 'GLOBALWMPU_RST'. + * + * 2430: RM_RSTST_MDM + * + * 3430: RM_RSTST_CORE, RM_RSTST_EMU + */ +#define OMAP_GLOBALWARM_RST_MASK (1 << 1) +#define OMAP_GLOBALCOLD_RST_MASK (1 << 0) + +/* + * 24XX: PM_WKDEP_GFX, PM_WKDEP_MPU, PM_WKDEP_CORE, PM_WKDEP_DSP + * 2420 TRM sometimes uses "EN_WAKEUP" instead of "EN_WKUP" + * + * 2430: PM_WKDEP_MDM + * + * 3430: PM_WKDEP_IVA2, PM_WKDEP_GFX, PM_WKDEP_DSS, PM_WKDEP_CAM, + * PM_WKDEP_PER + */ +#define OMAP_EN_WKUP_SHIFT 4 +#define OMAP_EN_WKUP_MASK (1 << 4) + +/* + * 24XX: PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX, + * PM_PWSTCTRL_DSP + * + * 2430: PM_PWSTCTRL_MDM + * + * 3430: PM_PWSTCTRL_IVA2, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX, + * PM_PWSTCTRL_DSS, PM_PWSTCTRL_CAM, PM_PWSTCTRL_PER, + * PM_PWSTCTRL_NEON + */ +#define OMAP_LOGICRETSTATE_MASK (1 << 2) + + +/* + * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP + * submodule to exit hardreset + */ +#define MAX_MODULE_HARDRESET_WAIT 10000 + + +#endif diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 0d444a5c939c..3d361497ca70 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -26,6 +26,7 @@ #define __ARCH_ARM_MACH_OMAP2_PRM44XX_H #include "prcm-common.h" +#include "prm.h" #define OMAP4430_PRM_BASE 0x4a306000 diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c index 4c65f5628b39..da6f3a63b5d5 100644 --- a/arch/arm/mach-omap2/sdrc.c +++ b/arch/arm/mach-omap2/sdrc.c @@ -27,8 +27,6 @@ #include #include -#include "prm.h" - #include #include "sdrc.h" diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c index 0f4d27aef44d..64778b6240c1 100644 --- a/arch/arm/mach-omap2/sdrc2xxx.c +++ b/arch/arm/mach-omap2/sdrc2xxx.c @@ -28,7 +28,7 @@ #include #include -#include "prm.h" +#include "prm2xxx_3xxx.h" #include "clock.h" #include #include "sdrc.h" diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 0548bbd43407..26770d80419e 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -40,9 +40,9 @@ #include #include -#include "prm.h" +#include "prm2xxx_3xxx.h" #include "pm.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" #include "prm-regbits-34xx.h" #include "control.h" diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index e3b5cd76c54c..98d8232808b8 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -27,8 +27,8 @@ #include #include -#include "cm.h" -#include "prm.h" +#include "cm2xxx_3xxx.h" +#include "prm2xxx_3xxx.h" #include "sdrc.h" #include "control.h" diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S index 92e6e1a12af8..8e7e6fef09ef 100644 --- a/arch/arm/mach-omap2/sram242x.S +++ b/arch/arm/mach-omap2/sram242x.S @@ -27,8 +27,8 @@ #include #include -#include "prm.h" -#include "cm.h" +#include "prm2xxx_3xxx.h" +#include "cm2xxx_3xxx.h" #include "sdrc.h" .text diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S index ab4973695c71..9ea87f68524f 100644 --- a/arch/arm/mach-omap2/sram243x.S +++ b/arch/arm/mach-omap2/sram243x.S @@ -27,8 +27,8 @@ #include #include -#include "prm.h" -#include "cm.h" +#include "prm2xxx_3xxx.h" +#include "cm2xxx_3xxx.h" #include "sdrc.h" .text diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S index 3637274af5be..b7aba60f8325 100644 --- a/arch/arm/mach-omap2/sram34xx.S +++ b/arch/arm/mach-omap2/sram34xx.S @@ -32,7 +32,7 @@ #include #include "sdrc.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" .text diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h index a9d69a09920d..6b8088ec74af 100644 --- a/arch/arm/plat-omap/include/plat/common.h +++ b/arch/arm/plat-omap/include/plat/common.h @@ -27,6 +27,8 @@ #ifndef __ARCH_ARM_MACH_OMAP_COMMON_H #define __ARCH_ARM_MACH_OMAP_COMMON_H +#include + #include struct sys_timer; diff --git a/arch/arm/plat-omap/include/plat/prcm.h b/arch/arm/plat-omap/include/plat/prcm.h index ab77442e42ab..3769fc6eca29 100644 --- a/arch/arm/plat-omap/include/plat/prcm.h +++ b/arch/arm/plat-omap/include/plat/prcm.h @@ -34,15 +34,8 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest, void omap3_prcm_save_context(void); void omap3_prcm_restore_context(void); -u32 prm_read_mod_reg(s16 module, u16 idx); -void prm_write_mod_reg(u32 val, s16 module, u16 idx); -u32 prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); -u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask); u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg); -u32 cm_read_mod_reg(s16 module, u16 idx); -void cm_write_mod_reg(u32 val, s16 module, u16 idx); -u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); #endif diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index fdecd339d4f8..95449b90074d 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -28,6 +28,8 @@ #include #include +/* XXX These "sideways" includes are a sign that something is wrong */ +#include "../mach-omap2/cm2xxx_3xxx.h" #include "../mach-omap2/cm-regbits-34xx.h" struct omap_mcbsp **mcbsp_ptr; diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 1a686c89d8dd..e26e50487d60 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c @@ -33,9 +33,10 @@ #include "sram.h" #include "fb.h" + +/* XXX These "sideways" includes are a sign that something is wrong */ #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) -# include "../mach-omap2/prm.h" -# include "../mach-omap2/cm.h" +# include "../mach-omap2/prm2xxx_3xxx.h" # include "../mach-omap2/sdrc.h" #endif diff --git a/drivers/staging/tidspbridge/core/_tiomap.h b/drivers/staging/tidspbridge/core/_tiomap.h index 1c1f157e167a..7fac488f7f48 100644 --- a/drivers/staging/tidspbridge/core/_tiomap.h +++ b/drivers/staging/tidspbridge/core/_tiomap.h @@ -21,6 +21,12 @@ #include #include +/* + * XXX These mach-omap2/ includes are wrong and should be removed. No + * driver should read or write to PRM/CM registers directly; they + * should rely on OMAP core code to do this. + */ +#include #include #include #include -- cgit v1.2.3 From 1540f214065982e6cbc6b8da1fe65a15e358f7c5 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 21 Dec 2010 21:05:15 -0700 Subject: OMAP2+: clockdomain: move header file from plat-omap to mach-omap2 The OMAP clockdomain code and data is all OMAP2+-specific. This seems unlikely to change any time soon. Move plat-omap/include/plat/clockdomain.h to mach-omap2/clockdomain.h. The primary point of doing this is to remove the temptation for unrelated upper-layer code to access clockdomain code and data directly. DSPBridge also uses the clockdomain headers for some reason, so, modify it also. The DSPBridge code should not be including the clockdomain headers; these should be removed. Signed-off-by: Paul Walmsley Cc: Kevin Hilman Cc: Omar Ramirez Luna Cc: Felipe Contreras Cc: Greg Kroah-Hartman Tested-by: Rajendra Nayak Tested-by: Santosh Shilimkar --- arch/arm/mach-omap2/clock.c | 2 +- arch/arm/mach-omap2/clockdomain.c | 2 +- arch/arm/mach-omap2/clockdomain.h | 149 ++++++++++++++++++++++ arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c | 2 +- arch/arm/mach-omap2/clockdomains44xx_data.c | 2 +- arch/arm/mach-omap2/cpuidle34xx.c | 2 +- arch/arm/mach-omap2/io.c | 2 +- arch/arm/mach-omap2/omap_hwmod.c | 2 +- arch/arm/mach-omap2/pm-debug.c | 2 +- arch/arm/mach-omap2/pm.c | 2 +- arch/arm/mach-omap2/pm24xx.c | 2 +- arch/arm/mach-omap2/pm34xx.c | 2 +- arch/arm/mach-omap2/powerdomain.c | 2 +- arch/arm/plat-omap/include/plat/clockdomain.h | 151 ----------------------- drivers/staging/tidspbridge/core/_tiomap.h | 7 +- 15 files changed, 167 insertions(+), 164 deletions(-) create mode 100644 arch/arm/mach-omap2/clockdomain.h delete mode 100644 arch/arm/plat-omap/include/plat/clockdomain.h (limited to 'drivers') diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index cda2f1da2e1f..2a2f15213add 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -24,7 +24,7 @@ #include #include -#include +#include "clockdomain.h" #include #include diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index e5605c21ad38..650bf685dd99 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -35,7 +35,7 @@ #include #include -#include +#include "clockdomain.h" #include /* clkdm_list contains all registered struct clockdomains */ diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h new file mode 100644 index 000000000000..372c64669868 --- /dev/null +++ b/arch/arm/mach-omap2/clockdomain.h @@ -0,0 +1,149 @@ +/* + * arch/arm/plat-omap/include/mach/clockdomain.h + * + * OMAP2/3 clockdomain framework functions + * + * Copyright (C) 2008 Texas Instruments, Inc. + * Copyright (C) 2008-2010 Nokia Corporation + * + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_MACH_OMAP2_CLOCKDOMAIN_H +#define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAIN_H + +#include + +#include +#include +#include + +/* Clockdomain capability flags */ +#define CLKDM_CAN_FORCE_SLEEP (1 << 0) +#define CLKDM_CAN_FORCE_WAKEUP (1 << 1) +#define CLKDM_CAN_ENABLE_AUTO (1 << 2) +#define CLKDM_CAN_DISABLE_AUTO (1 << 3) + +#define CLKDM_CAN_HWSUP (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO) +#define CLKDM_CAN_SWSUP (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP) +#define CLKDM_CAN_HWSUP_SWSUP (CLKDM_CAN_SWSUP | CLKDM_CAN_HWSUP) + +/** + * struct clkdm_autodep - clkdm deps to add when entering/exiting hwsup mode + * @clkdm: clockdomain to add wkdep+sleepdep on - set name member only + * @omap_chip: OMAP chip types that this autodep is valid on + * + * A clockdomain that should have wkdeps and sleepdeps added when a + * clockdomain should stay active in hwsup mode; and conversely, + * removed when the clockdomain should be allowed to go inactive in + * hwsup mode. + * + * Autodeps are deprecated and should be removed after + * omap_hwmod-based fine-grained module idle control is added. + */ +struct clkdm_autodep { + union { + const char *name; + struct clockdomain *ptr; + } clkdm; + const struct omap_chip_id omap_chip; +}; + +/** + * struct clkdm_dep - encode dependencies between clockdomains + * @clkdm_name: clockdomain name + * @clkdm: pointer to the struct clockdomain of @clkdm_name + * @omap_chip: OMAP chip types that this dependency is valid on + * @wkdep_usecount: Number of wakeup dependencies causing this clkdm to wake + * @sleepdep_usecount: Number of sleep deps that could prevent clkdm from idle + * + * Statically defined. @clkdm is resolved from @clkdm_name at runtime and + * should not be pre-initialized. + * + * XXX Should also include hardware (fixed) dependencies. + */ +struct clkdm_dep { + const char *clkdm_name; + struct clockdomain *clkdm; + atomic_t wkdep_usecount; + atomic_t sleepdep_usecount; + const struct omap_chip_id omap_chip; +}; + +/** + * struct clockdomain - OMAP clockdomain + * @name: clockdomain name + * @pwrdm: powerdomain containing this clockdomain + * @clktrctrl_reg: CLKSTCTRL reg for the given clock domain + * @clktrctrl_mask: CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg + * @flags: Clockdomain capability flags + * @dep_bit: Bit shift of this clockdomain's PM_WKDEP/CM_SLEEPDEP bit + * @prcm_partition: (OMAP4 only) PRCM partition ID for this clkdm's registers + * @cm_inst: (OMAP4 only) CM instance register offset + * @clkdm_offs: (OMAP4 only) CM clockdomain register offset + * @wkdep_srcs: Clockdomains that can be told to wake this powerdomain up + * @sleepdep_srcs: Clockdomains that can be told to keep this clkdm from inact + * @omap_chip: OMAP chip types that this clockdomain is valid on + * @usecount: Usecount tracking + * @node: list_head to link all clockdomains together + * + * @prcm_partition should be a macro from mach-omap2/prcm44xx.h (OMAP4 only) + * @cm_inst should be a macro ending in _INST from the OMAP4 CM instance + * definitions (OMAP4 only) + * @clkdm_offs should be a macro ending in _CDOFFS from the OMAP4 CM instance + * definitions (OMAP4 only) + */ +struct clockdomain { + const char *name; + union { + const char *name; + struct powerdomain *ptr; + } pwrdm; +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) + const u16 clktrctrl_mask; +#endif + const u8 flags; + const u8 dep_bit; + const u8 prcm_partition; + const s16 cm_inst; + const u16 clkdm_offs; + struct clkdm_dep *wkdep_srcs; + struct clkdm_dep *sleepdep_srcs; + const struct omap_chip_id omap_chip; + atomic_t usecount; + struct list_head node; +}; + +void clkdm_init(struct clockdomain **clkdms, struct clkdm_autodep *autodeps); +struct clockdomain *clkdm_lookup(const char *name); + +int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user), + void *user); +struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm); + +int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2); +int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2); +int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2); +int clkdm_clear_all_wkdeps(struct clockdomain *clkdm); +int clkdm_add_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2); +int clkdm_del_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2); +int clkdm_read_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2); +int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm); + +void omap2_clkdm_allow_idle(struct clockdomain *clkdm); +void omap2_clkdm_deny_idle(struct clockdomain *clkdm); + +int omap2_clkdm_wakeup(struct clockdomain *clkdm); +int omap2_clkdm_sleep(struct clockdomain *clkdm); + +int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk); +int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk); + +extern void __init omap2_clockdomains_init(void); +extern void __init omap44xx_clockdomains_init(void); + +#endif diff --git a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c index 6e9ec49d637f..e4a7133ea3b3 100644 --- a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c +++ b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c @@ -35,7 +35,7 @@ #include #include -#include +#include "clockdomain.h" #include "prm2xxx_3xxx.h" #include "cm2xxx_3xxx.h" #include "cm-regbits-24xx.h" diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c index 2d3d1ef23814..51920fc7fc52 100644 --- a/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c @@ -26,7 +26,7 @@ #include #include -#include +#include "clockdomain.h" #include "cm1_44xx.h" #include "cm2_44xx.h" diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 0fb619c52588..f518270b3e83 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include "clockdomain.h" #include #include "pm.h" diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index ba766576e03e..545182d9faa6 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -41,7 +41,7 @@ #include #include -#include +#include "clockdomain.h" #include #include diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 1312ce2913a5..e1358ba51395 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -139,7 +139,7 @@ #include #include -#include +#include "clockdomain.h" #include #include #include diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 1a4efb5e435a..3f989896a36c 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -30,7 +30,7 @@ #include #include #include -#include +#include "clockdomain.h" #include #include "cm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 6ec2ee12272a..24228e9dd496 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -19,7 +19,7 @@ #include #include -#include +#include "clockdomain.h" static struct omap_device_pm_latency *pm_lats; diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index bf0c36b239f9..f6aef7687b8a 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -51,7 +51,7 @@ #include "control.h" #include -#include +#include "clockdomain.h" #ifdef CONFIG_SUSPEND static suspend_state_t suspend_state = PM_SUSPEND_ON; diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 1ca6ef4c25b3..0fae3d6b76e8 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -31,7 +31,7 @@ #include #include -#include +#include "clockdomain.h" #include #include #include diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index a76ad3f0ca65..7eb7ba49d6bf 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -27,7 +27,7 @@ #include #include -#include +#include "clockdomain.h" #include #include "pm.h" diff --git a/arch/arm/plat-omap/include/plat/clockdomain.h b/arch/arm/plat-omap/include/plat/clockdomain.h deleted file mode 100644 index e91ae92f217c..000000000000 --- a/arch/arm/plat-omap/include/plat/clockdomain.h +++ /dev/null @@ -1,151 +0,0 @@ -/* - * arch/arm/plat-omap/include/mach/clockdomain.h - * - * OMAP2/3 clockdomain framework functions - * - * Copyright (C) 2008 Texas Instruments, Inc. - * Copyright (C) 2008-2010 Nokia Corporation - * - * Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * XXX This should be moved to mach-omap2/ at the earliest opportunity. - */ - -#ifndef __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H -#define __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H - -#include - -#include -#include -#include - -/* Clockdomain capability flags */ -#define CLKDM_CAN_FORCE_SLEEP (1 << 0) -#define CLKDM_CAN_FORCE_WAKEUP (1 << 1) -#define CLKDM_CAN_ENABLE_AUTO (1 << 2) -#define CLKDM_CAN_DISABLE_AUTO (1 << 3) - -#define CLKDM_CAN_HWSUP (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO) -#define CLKDM_CAN_SWSUP (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP) -#define CLKDM_CAN_HWSUP_SWSUP (CLKDM_CAN_SWSUP | CLKDM_CAN_HWSUP) - -/** - * struct clkdm_autodep - clkdm deps to add when entering/exiting hwsup mode - * @clkdm: clockdomain to add wkdep+sleepdep on - set name member only - * @omap_chip: OMAP chip types that this autodep is valid on - * - * A clockdomain that should have wkdeps and sleepdeps added when a - * clockdomain should stay active in hwsup mode; and conversely, - * removed when the clockdomain should be allowed to go inactive in - * hwsup mode. - * - * Autodeps are deprecated and should be removed after - * omap_hwmod-based fine-grained module idle control is added. - */ -struct clkdm_autodep { - union { - const char *name; - struct clockdomain *ptr; - } clkdm; - const struct omap_chip_id omap_chip; -}; - -/** - * struct clkdm_dep - encode dependencies between clockdomains - * @clkdm_name: clockdomain name - * @clkdm: pointer to the struct clockdomain of @clkdm_name - * @omap_chip: OMAP chip types that this dependency is valid on - * @wkdep_usecount: Number of wakeup dependencies causing this clkdm to wake - * @sleepdep_usecount: Number of sleep deps that could prevent clkdm from idle - * - * Statically defined. @clkdm is resolved from @clkdm_name at runtime and - * should not be pre-initialized. - * - * XXX Should also include hardware (fixed) dependencies. - */ -struct clkdm_dep { - const char *clkdm_name; - struct clockdomain *clkdm; - atomic_t wkdep_usecount; - atomic_t sleepdep_usecount; - const struct omap_chip_id omap_chip; -}; - -/** - * struct clockdomain - OMAP clockdomain - * @name: clockdomain name - * @pwrdm: powerdomain containing this clockdomain - * @clktrctrl_reg: CLKSTCTRL reg for the given clock domain - * @clktrctrl_mask: CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg - * @flags: Clockdomain capability flags - * @dep_bit: Bit shift of this clockdomain's PM_WKDEP/CM_SLEEPDEP bit - * @prcm_partition: (OMAP4 only) PRCM partition ID for this clkdm's registers - * @cm_inst: (OMAP4 only) CM instance register offset - * @clkdm_offs: (OMAP4 only) CM clockdomain register offset - * @wkdep_srcs: Clockdomains that can be told to wake this powerdomain up - * @sleepdep_srcs: Clockdomains that can be told to keep this clkdm from inact - * @omap_chip: OMAP chip types that this clockdomain is valid on - * @usecount: Usecount tracking - * @node: list_head to link all clockdomains together - * - * @prcm_partition should be a macro from mach-omap2/prcm44xx.h (OMAP4 only) - * @cm_inst should be a macro ending in _INST from the OMAP4 CM instance - * definitions (OMAP4 only) - * @clkdm_offs should be a macro ending in _CDOFFS from the OMAP4 CM instance - * definitions (OMAP4 only) - */ -struct clockdomain { - const char *name; - union { - const char *name; - struct powerdomain *ptr; - } pwrdm; -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) - const u16 clktrctrl_mask; -#endif - const u8 flags; - const u8 dep_bit; - const u8 prcm_partition; - const s16 cm_inst; - const u16 clkdm_offs; - struct clkdm_dep *wkdep_srcs; - struct clkdm_dep *sleepdep_srcs; - const struct omap_chip_id omap_chip; - atomic_t usecount; - struct list_head node; -}; - -void clkdm_init(struct clockdomain **clkdms, struct clkdm_autodep *autodeps); -struct clockdomain *clkdm_lookup(const char *name); - -int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user), - void *user); -struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm); - -int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2); -int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2); -int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2); -int clkdm_clear_all_wkdeps(struct clockdomain *clkdm); -int clkdm_add_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2); -int clkdm_del_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2); -int clkdm_read_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2); -int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm); - -void omap2_clkdm_allow_idle(struct clockdomain *clkdm); -void omap2_clkdm_deny_idle(struct clockdomain *clkdm); - -int omap2_clkdm_wakeup(struct clockdomain *clkdm); -int omap2_clkdm_sleep(struct clockdomain *clkdm); - -int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk); -int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk); - -extern void __init omap2_clockdomains_init(void); -extern void __init omap44xx_clockdomains_init(void); - -#endif diff --git a/drivers/staging/tidspbridge/core/_tiomap.h b/drivers/staging/tidspbridge/core/_tiomap.h index 7fac488f7f48..a3190e74ff74 100644 --- a/drivers/staging/tidspbridge/core/_tiomap.h +++ b/drivers/staging/tidspbridge/core/_tiomap.h @@ -19,8 +19,13 @@ #ifndef _TIOMAP_ #define _TIOMAP_ +/* + * XXX These powerdomain.h/clockdomain.h includes are wrong and should + * be removed. No driver should call pwrdm_* or clkdm_* functions + * directly; they should rely on OMAP core code to do this. + */ #include -#include +#include /* * XXX These mach-omap2/ includes are wrong and should be removed. No * driver should read or write to PRM/CM registers directly; they -- cgit v1.2.3 From 72e06d087204f3bc9acf281717b90ebf0b9731f7 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 21 Dec 2010 21:05:16 -0700 Subject: OMAP2+: powerdomain: move header file from plat-omap to mach-omap2 The OMAP powerdomain code and data is all OMAP2+-specific. This seems unlikely to change any time soon. Move plat-omap/include/plat/powerdomain.h to mach-omap2/powerdomain.h. The primary point of doing this is to remove the temptation for unrelated upper-layer code to access powerdomain code and data directly. As part of this process, remove the references to powerdomain data from the GPIO "driver" and the OMAP PM no-op layer, both in plat-omap. Change the DSPBridge code to point to the new location for the powerdomain headers. The DSPBridge code should not be including the powerdomain headers; these should be removed. Signed-off-by: Paul Walmsley Cc: Kevin Hilman Cc: Omar Ramirez Luna Cc: Felipe Contreras Cc: Greg Kroah-Hartman --- arch/arm/mach-omap2/clockdomain.c | 2 +- arch/arm/mach-omap2/clockdomain.h | 2 +- arch/arm/mach-omap2/cpuidle34xx.c | 2 +- arch/arm/mach-omap2/io.c | 2 +- arch/arm/mach-omap2/omap_hwmod.c | 2 +- arch/arm/mach-omap2/pm-debug.c | 2 +- arch/arm/mach-omap2/pm.c | 2 +- arch/arm/mach-omap2/pm.h | 2 +- arch/arm/mach-omap2/pm24xx.c | 4 +- arch/arm/mach-omap2/pm34xx.c | 6 +- arch/arm/mach-omap2/pm44xx.c | 2 +- arch/arm/mach-omap2/powerdomain-common.c | 1 - arch/arm/mach-omap2/powerdomain.c | 2 +- arch/arm/mach-omap2/powerdomain.h | 232 +++++++++++++++++++++++ arch/arm/mach-omap2/powerdomain2xxx_3xxx.c | 2 +- arch/arm/mach-omap2/powerdomain44xx.c | 3 +- arch/arm/mach-omap2/powerdomains.h | 30 --- arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c | 4 +- arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h | 2 +- arch/arm/mach-omap2/powerdomains2xxx_data.c | 3 +- arch/arm/mach-omap2/powerdomains3xxx_data.c | 3 +- arch/arm/mach-omap2/powerdomains44xx_data.c | 3 +- arch/arm/plat-omap/gpio.c | 5 +- arch/arm/plat-omap/include/plat/gpio.h | 2 +- arch/arm/plat-omap/include/plat/omap-pm.h | 2 - arch/arm/plat-omap/include/plat/powerdomain.h | 219 --------------------- arch/arm/plat-omap/omap-pm-noop.c | 2 - drivers/staging/tidspbridge/core/_tiomap.h | 2 +- 28 files changed, 259 insertions(+), 286 deletions(-) create mode 100644 arch/arm/mach-omap2/powerdomain.h delete mode 100644 arch/arm/mach-omap2/powerdomains.h delete mode 100644 arch/arm/plat-omap/include/plat/powerdomain.h (limited to 'drivers') diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 650bf685dd99..e20b98636ab4 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -34,7 +34,7 @@ #include "prcm44xx.h" #include -#include +#include "powerdomain.h" #include "clockdomain.h" #include diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 372c64669868..de3faa20b46b 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h @@ -18,7 +18,7 @@ #include -#include +#include "powerdomain.h" #include #include diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index f518270b3e83..f3e043fe5eb8 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -27,7 +27,7 @@ #include #include -#include +#include "powerdomain.h" #include "clockdomain.h" #include diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 545182d9faa6..e66687b0b9de 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -39,7 +39,7 @@ #include "io.h" #include -#include +#include "powerdomain.h" #include "clockdomain.h" #include diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index e1358ba51395..12856eb7b179 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -140,7 +140,7 @@ #include #include #include "clockdomain.h" -#include +#include "powerdomain.h" #include #include #include diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 3f989896a36c..e535082b0c2e 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -29,7 +29,7 @@ #include #include -#include +#include "powerdomain.h" #include "clockdomain.h" #include diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 24228e9dd496..227a211921c3 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -18,7 +18,7 @@ #include #include -#include +#include "powerdomain.h" #include "clockdomain.h" static struct omap_device_pm_latency *pm_lats; diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 8b4f45eba1b5..482df7fc1585 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -11,7 +11,7 @@ #ifndef __ARCH_ARM_MACH_OMAP2_PM_H #define __ARCH_ARM_MACH_OMAP2_PM_H -#include +#include "powerdomain.h" extern void *omap3_secure_ram_storage; extern void omap3_pm_off_mode_enable(int); diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index f6aef7687b8a..2844b84f8d46 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -50,7 +50,7 @@ #include "pm.h" #include "control.h" -#include +#include "powerdomain.h" #include "clockdomain.h" #ifdef CONFIG_SUSPEND @@ -120,7 +120,7 @@ static void omap2_enter_full_retention(void) l = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0) | OMAP24XX_USBSTANDBYCTRL; omap_ctrl_writel(l, OMAP2_CONTROL_DEVCONF0); - omap2_gpio_prepare_for_idle(PWRDM_POWER_RET); + omap2_gpio_prepare_for_idle(0); if (omap2_pm_debug) { omap2_pm_dump(0, 0, 0); diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 0fae3d6b76e8..5efd1fb8c640 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -32,7 +32,7 @@ #include #include "clockdomain.h" -#include +#include "powerdomain.h" #include #include #include @@ -360,6 +360,7 @@ void omap_sram_idle(void) int mpu_next_state = PWRDM_POWER_ON; int per_next_state = PWRDM_POWER_ON; int core_next_state = PWRDM_POWER_ON; + int per_going_off; int core_prev_state, per_prev_state; u32 sdrc_pwr = 0; @@ -411,9 +412,10 @@ void omap_sram_idle(void) /* PER */ if (per_next_state < PWRDM_POWER_ON) { + per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0; omap_uart_prepare_idle(2); omap_uart_prepare_idle(3); - omap2_gpio_prepare_for_idle(per_next_state); + omap2_gpio_prepare_for_idle(per_going_off); if (per_next_state == PWRDM_POWER_OFF) omap3_per_save_context(); } diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index 6aff9961e35d..e9f4862c4de4 100644 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c @@ -16,7 +16,7 @@ #include #include -#include +#include "powerdomain.h" #include struct power_state { diff --git a/arch/arm/mach-omap2/powerdomain-common.c b/arch/arm/mach-omap2/powerdomain-common.c index cb01c7a3689a..171fccd208c7 100644 --- a/arch/arm/mach-omap2/powerdomain-common.c +++ b/arch/arm/mach-omap2/powerdomain-common.c @@ -20,7 +20,6 @@ #include "cm-regbits-44xx.h" #include "prm-regbits-34xx.h" #include "prm-regbits-44xx.h" -#include "powerdomains.h" /* * OMAP3 and OMAP4 specific register bit initialisations diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 7eb7ba49d6bf..06ef60eebebd 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -26,7 +26,7 @@ #include "prm44xx.h" #include -#include +#include "powerdomain.h" #include "clockdomain.h" #include diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h new file mode 100644 index 000000000000..35b5b4800a43 --- /dev/null +++ b/arch/arm/mach-omap2/powerdomain.h @@ -0,0 +1,232 @@ +/* + * OMAP2/3/4 powerdomain control + * + * Copyright (C) 2007-2008, 2010 Texas Instruments, Inc. + * Copyright (C) 2007-2010 Nokia Corporation + * + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * XXX This should be moved to the mach-omap2/ directory at the earliest + * opportunity. + */ + +#ifndef __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H +#define __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H + +#include +#include + +#include + +#include + +/* Powerdomain basic power states */ +#define PWRDM_POWER_OFF 0x0 +#define PWRDM_POWER_RET 0x1 +#define PWRDM_POWER_INACTIVE 0x2 +#define PWRDM_POWER_ON 0x3 + +#define PWRDM_MAX_PWRSTS 4 + +/* Powerdomain allowable state bitfields */ +#define PWRSTS_ON (1 << PWRDM_POWER_ON) +#define PWRSTS_OFF (1 << PWRDM_POWER_OFF) +#define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \ + (1 << PWRDM_POWER_ON)) + +#define PWRSTS_OFF_RET ((1 << PWRDM_POWER_OFF) | \ + (1 << PWRDM_POWER_RET)) + +#define PWRSTS_RET_ON ((1 << PWRDM_POWER_RET) | \ + (1 << PWRDM_POWER_ON)) + +#define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | (1 << PWRDM_POWER_ON)) + + +/* Powerdomain flags */ +#define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */ +#define PWRDM_HAS_MPU_QUIRK (1 << 1) /* MPU pwr domain has MEM bank 0 bits + * in MEM bank 1 position. This is + * true for OMAP3430 + */ +#define PWRDM_HAS_LOWPOWERSTATECHANGE (1 << 2) /* + * support to transition from a + * sleep state to a lower sleep + * state without waking up the + * powerdomain + */ + +/* + * Number of memory banks that are power-controllable. On OMAP4430, the + * maximum is 5. + */ +#define PWRDM_MAX_MEM_BANKS 5 + +/* + * Maximum number of clockdomains that can be associated with a powerdomain. + * CORE powerdomain on OMAP4 is the worst case + */ +#define PWRDM_MAX_CLKDMS 9 + +/* XXX A completely arbitrary number. What is reasonable here? */ +#define PWRDM_TRANSITION_BAILOUT 100000 + +struct clockdomain; +struct powerdomain; + +/** + * struct powerdomain - OMAP powerdomain + * @name: Powerdomain name + * @omap_chip: represents the OMAP chip types containing this pwrdm + * @prcm_offs: the address offset from CM_BASE/PRM_BASE + * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs + * @pwrsts: Possible powerdomain power states + * @pwrsts_logic_ret: Possible logic power states when pwrdm in RETENTION + * @flags: Powerdomain flags + * @banks: Number of software-controllable memory banks in this powerdomain + * @pwrsts_mem_ret: Possible memory bank pwrstates when pwrdm in RETENTION + * @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON + * @pwrdm_clkdms: Clockdomains in this powerdomain + * @node: list_head linking all powerdomains + * @state: + * @state_counter: + * @timer: + * @state_timer: + * + * @prcm_partition possible values are defined in mach-omap2/prcm44xx.h. + */ +struct powerdomain { + const char *name; + const struct omap_chip_id omap_chip; + const s16 prcm_offs; + const u8 pwrsts; + const u8 pwrsts_logic_ret; + const u8 flags; + const u8 banks; + const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS]; + const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS]; + const u8 prcm_partition; + struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS]; + struct list_head node; + int state; + unsigned state_counter[PWRDM_MAX_PWRSTS]; + unsigned ret_logic_off_counter; + unsigned ret_mem_off_counter[PWRDM_MAX_MEM_BANKS]; + +#ifdef CONFIG_PM_DEBUG + s64 timer; + s64 state_timer[PWRDM_MAX_PWRSTS]; +#endif +}; + +/** + * struct pwrdm_ops - Arch specfic function implementations + * @pwrdm_set_next_pwrst: Set the target power state for a pd + * @pwrdm_read_next_pwrst: Read the target power state set for a pd + * @pwrdm_read_pwrst: Read the current power state of a pd + * @pwrdm_read_prev_pwrst: Read the prev power state entered by the pd + * @pwrdm_set_logic_retst: Set the logic state in RET for a pd + * @pwrdm_set_mem_onst: Set the Memory state in ON for a pd + * @pwrdm_set_mem_retst: Set the Memory state in RET for a pd + * @pwrdm_read_logic_pwrst: Read the current logic state of a pd + * @pwrdm_read_prev_logic_pwrst: Read the previous logic state entered by a pd + * @pwrdm_read_logic_retst: Read the logic state in RET for a pd + * @pwrdm_read_mem_pwrst: Read the current memory state of a pd + * @pwrdm_read_prev_mem_pwrst: Read the previous memory state entered by a pd + * @pwrdm_read_mem_retst: Read the memory state in RET for a pd + * @pwrdm_clear_all_prev_pwrst: Clear all previous power states logged for a pd + * @pwrdm_enable_hdwr_sar: Enable Hardware Save-Restore feature for the pd + * @pwrdm_disable_hdwr_sar: Disable Hardware Save-Restore feature for a pd + * @pwrdm_set_lowpwrstchange: Enable pd transitions from a shallow to deep sleep + * @pwrdm_wait_transition: Wait for a pd state transition to complete + */ +struct pwrdm_ops { + int (*pwrdm_set_next_pwrst)(struct powerdomain *pwrdm, u8 pwrst); + int (*pwrdm_read_next_pwrst)(struct powerdomain *pwrdm); + int (*pwrdm_read_pwrst)(struct powerdomain *pwrdm); + int (*pwrdm_read_prev_pwrst)(struct powerdomain *pwrdm); + int (*pwrdm_set_logic_retst)(struct powerdomain *pwrdm, u8 pwrst); + int (*pwrdm_set_mem_onst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst); + int (*pwrdm_set_mem_retst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst); + int (*pwrdm_read_logic_pwrst)(struct powerdomain *pwrdm); + int (*pwrdm_read_prev_logic_pwrst)(struct powerdomain *pwrdm); + int (*pwrdm_read_logic_retst)(struct powerdomain *pwrdm); + int (*pwrdm_read_mem_pwrst)(struct powerdomain *pwrdm, u8 bank); + int (*pwrdm_read_prev_mem_pwrst)(struct powerdomain *pwrdm, u8 bank); + int (*pwrdm_read_mem_retst)(struct powerdomain *pwrdm, u8 bank); + int (*pwrdm_clear_all_prev_pwrst)(struct powerdomain *pwrdm); + int (*pwrdm_enable_hdwr_sar)(struct powerdomain *pwrdm); + int (*pwrdm_disable_hdwr_sar)(struct powerdomain *pwrdm); + int (*pwrdm_set_lowpwrstchange)(struct powerdomain *pwrdm); + int (*pwrdm_wait_transition)(struct powerdomain *pwrdm); +}; + +void pwrdm_fw_init(void); +void pwrdm_init(struct powerdomain **pwrdm_list, struct pwrdm_ops *custom_funcs); + +struct powerdomain *pwrdm_lookup(const char *name); + +int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user), + void *user); +int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user), + void *user); + +int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); +int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); +int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, + int (*fn)(struct powerdomain *pwrdm, + struct clockdomain *clkdm)); + +int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm); + +int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst); +int pwrdm_read_next_pwrst(struct powerdomain *pwrdm); +int pwrdm_read_pwrst(struct powerdomain *pwrdm); +int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm); +int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm); + +int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst); +int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst); +int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst); + +int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm); +int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm); +int pwrdm_read_logic_retst(struct powerdomain *pwrdm); +int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank); +int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank); +int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank); + +int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm); +int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm); +bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm); + +int pwrdm_wait_transition(struct powerdomain *pwrdm); + +int pwrdm_state_switch(struct powerdomain *pwrdm); +int pwrdm_clkdm_state_switch(struct clockdomain *clkdm); +int pwrdm_pre_transition(void); +int pwrdm_post_transition(void); +int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm); + +extern void omap2xxx_powerdomains_init(void); +extern void omap3xxx_powerdomains_init(void); +extern void omap44xx_powerdomains_init(void); + +extern struct pwrdm_ops omap2_pwrdm_operations; +extern struct pwrdm_ops omap3_pwrdm_operations; +extern struct pwrdm_ops omap4_pwrdm_operations; + +/* Common Internal functions used across OMAP rev's */ +extern u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank); +extern u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank); +extern u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank); + +extern struct powerdomain wkup_omap2_pwrdm; +extern struct powerdomain gfx_omap2_pwrdm; + + +#endif diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c index b5e9e4d18b8c..d5233890370c 100644 --- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c +++ b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c @@ -18,8 +18,8 @@ #include +#include "powerdomain.h" #include "prm-regbits-34xx.h" -#include "powerdomains.h" #include "prm.h" #include "prm-regbits-24xx.h" #include "prm-regbits-34xx.h" diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c index 28bf5e3b000c..a7880af4b3d9 100644 --- a/arch/arm/mach-omap2/powerdomain44xx.c +++ b/arch/arm/mach-omap2/powerdomain44xx.c @@ -16,13 +16,12 @@ #include #include -#include +#include "powerdomain.h" #include #include "prm2xxx_3xxx.h" #include "prm44xx.h" #include "prminst44xx.h" #include "prm-regbits-44xx.h" -#include "powerdomains.h" static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) { diff --git a/arch/arm/mach-omap2/powerdomains.h b/arch/arm/mach-omap2/powerdomains.h deleted file mode 100644 index f83adaf889ee..000000000000 --- a/arch/arm/mach-omap2/powerdomains.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * OMAP2+ powerdomain prototypes - * - * Copyright (C) 2010 Texas Instruments, Inc. - * - * Rajendra Nayak - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS_H -#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS_H - -#include - -extern struct pwrdm_ops omap2_pwrdm_operations; -extern struct pwrdm_ops omap3_pwrdm_operations; -extern struct pwrdm_ops omap4_pwrdm_operations; - -/* Common Internal functions used across OMAP rev's */ -extern u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank); -extern u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank); -extern u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank); - -extern struct powerdomain wkup_omap2_pwrdm; -extern struct powerdomain gfx_omap2_pwrdm; - -#endif diff --git a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c index 14c6ef7e01e3..5b4dd971320a 100644 --- a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c @@ -45,13 +45,11 @@ * address offset is different between the C55 and C64 DSPs. */ -#include +#include "powerdomain.h" #include "prcm-common.h" #include "prm.h" -#include "powerdomains.h" - /* OMAP2/3-common powerdomains */ /* diff --git a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h index 45d684a3bf2b..fa311669d53d 100644 --- a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h +++ b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h @@ -14,7 +14,7 @@ #ifndef __ARCH_ARM_MACH_OMAP2_POWERDOMAINS2XXX_3XXX_DATA_H #define __ARCH_ARM_MACH_OMAP2_POWERDOMAINS2XXX_3XXX_DATA_H -#include +#include "powerdomain.h" extern struct powerdomain gfx_omap2_pwrdm; extern struct powerdomain wkup_omap2_pwrdm; diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c index e136895e0a37..9b1a33500577 100644 --- a/arch/arm/mach-omap2/powerdomains2xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c @@ -14,9 +14,8 @@ #include #include -#include +#include "powerdomain.h" #include "powerdomains2xxx_3xxx_data.h" -#include "powerdomains.h" #include "prcm-common.h" #include "prm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c index 1830c63ae676..e1bec562625b 100644 --- a/arch/arm/mach-omap2/powerdomains3xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c @@ -14,9 +14,8 @@ #include #include -#include +#include "powerdomain.h" #include "powerdomains2xxx_3xxx_data.h" -#include "powerdomains.h" #include "prcm-common.h" #include "prm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c index 823f4770f947..5fdf485a022a 100644 --- a/arch/arm/mach-omap2/powerdomains44xx_data.c +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c @@ -22,8 +22,7 @@ #include #include -#include -#include "powerdomains.h" +#include "powerdomain.h" #include "prcm-common.h" #include "prcm44xx.h" diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 8d493b992e70..1f98e0b94847 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -29,7 +29,6 @@ #include #include #include -#include /* * OMAP1510 GPIO registers @@ -1864,7 +1863,7 @@ static struct sys_device omap_gpio_device = { static int workaround_enabled; -void omap2_gpio_prepare_for_idle(int power_state) +void omap2_gpio_prepare_for_idle(int off_mode) { int i, c = 0; int min = 0; @@ -1880,7 +1879,7 @@ void omap2_gpio_prepare_for_idle(int power_state) for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++) clk_disable(bank->dbck); - if (power_state > PWRDM_POWER_OFF) + if (!off_mode) continue; /* If going to OFF, remove triggering for all diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h index 41ff2f8943f0..d6f9fa0f62af 100644 --- a/arch/arm/plat-omap/include/plat/gpio.h +++ b/arch/arm/plat-omap/include/plat/gpio.h @@ -82,7 +82,7 @@ struct omap_gpio_platform_data { /* TODO: Analyze removing gpio_bank_count usage from driver code */ extern int gpio_bank_count; -extern void omap2_gpio_prepare_for_idle(int power_state); +extern void omap2_gpio_prepare_for_idle(int off_mode); extern void omap2_gpio_resume_after_idle(void); extern void omap_set_gpio_debounce(int gpio, int enable); extern void omap_set_gpio_debounce_time(int gpio, int enable); diff --git a/arch/arm/plat-omap/include/plat/omap-pm.h b/arch/arm/plat-omap/include/plat/omap-pm.h index 62c3fe918ab2..47d61107ccda 100644 --- a/arch/arm/plat-omap/include/plat/omap-pm.h +++ b/arch/arm/plat-omap/include/plat/omap-pm.h @@ -19,8 +19,6 @@ #include #include -#include "powerdomain.h" - /* * agent_id values for use with omap_pm_set_min_bus_tput(): * diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h deleted file mode 100644 index a0d3a30de9fd..000000000000 --- a/arch/arm/plat-omap/include/plat/powerdomain.h +++ /dev/null @@ -1,219 +0,0 @@ -/* - * OMAP2/3/4 powerdomain control - * - * Copyright (C) 2007-2008 Texas Instruments, Inc. - * Copyright (C) 2007-2010 Nokia Corporation - * - * Written by Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * XXX This should be moved to the mach-omap2/ directory at the earliest - * opportunity. - */ - -#ifndef ASM_ARM_PLAT_OMAP_INCLUDE_PLAT_POWERDOMAIN -#define ASM_ARM_PLAT_OMAP_INCLUDE_PLAT_POWERDOMAIN - -#include -#include - -#include - -#include - -/* Powerdomain basic power states */ -#define PWRDM_POWER_OFF 0x0 -#define PWRDM_POWER_RET 0x1 -#define PWRDM_POWER_INACTIVE 0x2 -#define PWRDM_POWER_ON 0x3 - -#define PWRDM_MAX_PWRSTS 4 - -/* Powerdomain allowable state bitfields */ -#define PWRSTS_ON (1 << PWRDM_POWER_ON) -#define PWRSTS_OFF (1 << PWRDM_POWER_OFF) -#define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \ - (1 << PWRDM_POWER_ON)) - -#define PWRSTS_OFF_RET ((1 << PWRDM_POWER_OFF) | \ - (1 << PWRDM_POWER_RET)) - -#define PWRSTS_RET_ON ((1 << PWRDM_POWER_RET) | \ - (1 << PWRDM_POWER_ON)) - -#define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | (1 << PWRDM_POWER_ON)) - - -/* Powerdomain flags */ -#define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */ -#define PWRDM_HAS_MPU_QUIRK (1 << 1) /* MPU pwr domain has MEM bank 0 bits - * in MEM bank 1 position. This is - * true for OMAP3430 - */ -#define PWRDM_HAS_LOWPOWERSTATECHANGE (1 << 2) /* - * support to transition from a - * sleep state to a lower sleep - * state without waking up the - * powerdomain - */ - -/* - * Number of memory banks that are power-controllable. On OMAP4430, the - * maximum is 5. - */ -#define PWRDM_MAX_MEM_BANKS 5 - -/* - * Maximum number of clockdomains that can be associated with a powerdomain. - * CORE powerdomain on OMAP4 is the worst case - */ -#define PWRDM_MAX_CLKDMS 9 - -/* XXX A completely arbitrary number. What is reasonable here? */ -#define PWRDM_TRANSITION_BAILOUT 100000 - -struct clockdomain; -struct powerdomain; - -/** - * struct powerdomain - OMAP powerdomain - * @name: Powerdomain name - * @omap_chip: represents the OMAP chip types containing this pwrdm - * @prcm_offs: the address offset from CM_BASE/PRM_BASE - * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs - * @pwrsts: Possible powerdomain power states - * @pwrsts_logic_ret: Possible logic power states when pwrdm in RETENTION - * @flags: Powerdomain flags - * @banks: Number of software-controllable memory banks in this powerdomain - * @pwrsts_mem_ret: Possible memory bank pwrstates when pwrdm in RETENTION - * @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON - * @pwrdm_clkdms: Clockdomains in this powerdomain - * @node: list_head linking all powerdomains - * @state: - * @state_counter: - * @timer: - * @state_timer: - * - * @prcm_partition possible values are defined in mach-omap2/prcm44xx.h. - */ -struct powerdomain { - const char *name; - const struct omap_chip_id omap_chip; - const s16 prcm_offs; - const u8 pwrsts; - const u8 pwrsts_logic_ret; - const u8 flags; - const u8 banks; - const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS]; - const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS]; - const u8 prcm_partition; - struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS]; - struct list_head node; - int state; - unsigned state_counter[PWRDM_MAX_PWRSTS]; - unsigned ret_logic_off_counter; - unsigned ret_mem_off_counter[PWRDM_MAX_MEM_BANKS]; - -#ifdef CONFIG_PM_DEBUG - s64 timer; - s64 state_timer[PWRDM_MAX_PWRSTS]; -#endif -}; - -/** - * struct pwrdm_ops - Arch specfic function implementations - * @pwrdm_set_next_pwrst: Set the target power state for a pd - * @pwrdm_read_next_pwrst: Read the target power state set for a pd - * @pwrdm_read_pwrst: Read the current power state of a pd - * @pwrdm_read_prev_pwrst: Read the prev power state entered by the pd - * @pwrdm_set_logic_retst: Set the logic state in RET for a pd - * @pwrdm_set_mem_onst: Set the Memory state in ON for a pd - * @pwrdm_set_mem_retst: Set the Memory state in RET for a pd - * @pwrdm_read_logic_pwrst: Read the current logic state of a pd - * @pwrdm_read_prev_logic_pwrst: Read the previous logic state entered by a pd - * @pwrdm_read_logic_retst: Read the logic state in RET for a pd - * @pwrdm_read_mem_pwrst: Read the current memory state of a pd - * @pwrdm_read_prev_mem_pwrst: Read the previous memory state entered by a pd - * @pwrdm_read_mem_retst: Read the memory state in RET for a pd - * @pwrdm_clear_all_prev_pwrst: Clear all previous power states logged for a pd - * @pwrdm_enable_hdwr_sar: Enable Hardware Save-Restore feature for the pd - * @pwrdm_disable_hdwr_sar: Disable Hardware Save-Restore feature for a pd - * @pwrdm_set_lowpwrstchange: Enable pd transitions from a shallow to deep sleep - * @pwrdm_wait_transition: Wait for a pd state transition to complete - */ -struct pwrdm_ops { - int (*pwrdm_set_next_pwrst)(struct powerdomain *pwrdm, u8 pwrst); - int (*pwrdm_read_next_pwrst)(struct powerdomain *pwrdm); - int (*pwrdm_read_pwrst)(struct powerdomain *pwrdm); - int (*pwrdm_read_prev_pwrst)(struct powerdomain *pwrdm); - int (*pwrdm_set_logic_retst)(struct powerdomain *pwrdm, u8 pwrst); - int (*pwrdm_set_mem_onst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst); - int (*pwrdm_set_mem_retst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst); - int (*pwrdm_read_logic_pwrst)(struct powerdomain *pwrdm); - int (*pwrdm_read_prev_logic_pwrst)(struct powerdomain *pwrdm); - int (*pwrdm_read_logic_retst)(struct powerdomain *pwrdm); - int (*pwrdm_read_mem_pwrst)(struct powerdomain *pwrdm, u8 bank); - int (*pwrdm_read_prev_mem_pwrst)(struct powerdomain *pwrdm, u8 bank); - int (*pwrdm_read_mem_retst)(struct powerdomain *pwrdm, u8 bank); - int (*pwrdm_clear_all_prev_pwrst)(struct powerdomain *pwrdm); - int (*pwrdm_enable_hdwr_sar)(struct powerdomain *pwrdm); - int (*pwrdm_disable_hdwr_sar)(struct powerdomain *pwrdm); - int (*pwrdm_set_lowpwrstchange)(struct powerdomain *pwrdm); - int (*pwrdm_wait_transition)(struct powerdomain *pwrdm); -}; - -void pwrdm_fw_init(void); -void pwrdm_init(struct powerdomain **pwrdm_list, struct pwrdm_ops *custom_funcs); - -struct powerdomain *pwrdm_lookup(const char *name); - -int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user), - void *user); -int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user), - void *user); - -int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); -int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); -int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, - int (*fn)(struct powerdomain *pwrdm, - struct clockdomain *clkdm)); - -int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm); - -int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst); -int pwrdm_read_next_pwrst(struct powerdomain *pwrdm); -int pwrdm_read_pwrst(struct powerdomain *pwrdm); -int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm); -int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm); - -int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst); -int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst); -int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst); - -int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm); -int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm); -int pwrdm_read_logic_retst(struct powerdomain *pwrdm); -int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank); -int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank); -int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank); - -int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm); -int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm); -bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm); - -int pwrdm_wait_transition(struct powerdomain *pwrdm); - -int pwrdm_state_switch(struct powerdomain *pwrdm); -int pwrdm_clkdm_state_switch(struct clockdomain *clkdm); -int pwrdm_pre_transition(void); -int pwrdm_post_transition(void); -int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm); - -extern void omap2xxx_powerdomains_init(void); -extern void omap3xxx_powerdomains_init(void); -extern void omap44xx_powerdomains_init(void); - -#endif diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/plat-omap/omap-pm-noop.c index ca75abb18068..19cb9f5a9f04 100644 --- a/arch/arm/plat-omap/omap-pm-noop.c +++ b/arch/arm/plat-omap/omap-pm-noop.c @@ -24,8 +24,6 @@ /* Interface documentation is in mach/omap-pm.h */ #include -#include - /* * Device-driver-originated constraints (via board-*.c files) */ diff --git a/drivers/staging/tidspbridge/core/_tiomap.h b/drivers/staging/tidspbridge/core/_tiomap.h index a3190e74ff74..1159a500f49d 100644 --- a/drivers/staging/tidspbridge/core/_tiomap.h +++ b/drivers/staging/tidspbridge/core/_tiomap.h @@ -24,7 +24,7 @@ * be removed. No driver should call pwrdm_* or clkdm_* functions * directly; they should rely on OMAP core code to do this. */ -#include +#include #include /* * XXX These mach-omap2/ includes are wrong and should be removed. No -- cgit v1.2.3 From da1f026b532ce944d74461497dc6d8c16456466e Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Mon, 20 Dec 2010 21:09:22 +0000 Subject: Keyboard: omap-keypad: use matrix_keypad.h Most keypad drivers make use of the defined macros, structures and inline functions. Convert omap-keypad driver to use those as well, as suggested by a compile time warning, hardcoded into the OMAP . Created against linux-2.6.37-rc5. Tested on Amstrad Delta. Compile tested with omap1_defconfig and omap2plus_defconfig shrinked to board-h4. Signed-off-by: Janusz Krzysztofik Reviewed-by: Aaro Koskinen Acked-by: Dmitry Torokhov Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/board-ams-delta.c | 128 ++++++++++++++++--------------- arch/arm/mach-omap1/board-fsample.c | 67 ++++++++-------- arch/arm/mach-omap1/board-h2.c | 75 +++++++++--------- arch/arm/mach-omap1/board-h3.c | 75 +++++++++--------- arch/arm/mach-omap1/board-htcherald.c | 98 +++++++++++------------ arch/arm/mach-omap1/board-innovator.c | 21 ++--- arch/arm/mach-omap1/board-nokia770.c | 29 +++---- arch/arm/mach-omap1/board-osk.c | 21 ++--- arch/arm/mach-omap1/board-palmte.c | 28 ++++--- arch/arm/mach-omap1/board-palmtt.c | 28 ++++--- arch/arm/mach-omap1/board-palmz71.c | 30 ++++---- arch/arm/mach-omap1/board-perseus2.c | 69 +++++++++-------- arch/arm/mach-omap1/board-sx1.c | 57 +++++++------- arch/arm/mach-omap2/board-h4.c | 63 +++++++-------- arch/arm/plat-omap/include/plat/keypad.h | 35 +++++---- drivers/input/keyboard/omap-keypad.c | 41 +++++----- include/linux/input/matrix_keypad.h | 2 +- 17 files changed, 457 insertions(+), 410 deletions(-) (limited to 'drivers') diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index e1439506eba9..bd0495a9ac3b 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -43,84 +43,82 @@ static u8 ams_delta_latch1_reg; static u16 ams_delta_latch2_reg; -static int ams_delta_keymap[] = { +static const unsigned int ams_delta_keymap[] = { KEY(0, 0, KEY_F1), /* Advert */ - KEY(3, 0, KEY_COFFEE), /* Games */ - KEY(2, 0, KEY_QUESTION), /* Directory */ - KEY(3, 2, KEY_CONNECT), /* Internet */ - KEY(2, 1, KEY_SHOP), /* Services */ + KEY(0, 3, KEY_COFFEE), /* Games */ + KEY(0, 2, KEY_QUESTION), /* Directory */ + KEY(2, 3, KEY_CONNECT), /* Internet */ + KEY(1, 2, KEY_SHOP), /* Services */ KEY(1, 1, KEY_PHONE), /* VoiceMail */ - KEY(1, 0, KEY_DELETE), /* Delete */ + KEY(0, 1, KEY_DELETE), /* Delete */ KEY(2, 2, KEY_PLAY), /* Play */ - KEY(0, 1, KEY_PAGEUP), /* Up */ - KEY(3, 1, KEY_PAGEDOWN), /* Down */ - KEY(0, 2, KEY_EMAIL), /* ReadEmail */ - KEY(1, 2, KEY_STOP), /* Stop */ + KEY(1, 0, KEY_PAGEUP), /* Up */ + KEY(1, 3, KEY_PAGEDOWN), /* Down */ + KEY(2, 0, KEY_EMAIL), /* ReadEmail */ + KEY(2, 1, KEY_STOP), /* Stop */ /* Numeric keypad portion */ - KEY(7, 0, KEY_KP1), - KEY(6, 0, KEY_KP2), - KEY(5, 0, KEY_KP3), - KEY(7, 1, KEY_KP4), - KEY(6, 1, KEY_KP5), - KEY(5, 1, KEY_KP6), - KEY(7, 2, KEY_KP7), - KEY(6, 2, KEY_KP8), - KEY(5, 2, KEY_KP9), - KEY(6, 3, KEY_KP0), - KEY(7, 3, KEY_KPASTERISK), - KEY(5, 3, KEY_KPDOT), /* # key */ - KEY(2, 7, KEY_NUMLOCK), /* Mute */ - KEY(1, 7, KEY_KPMINUS), /* Recall */ - KEY(1, 6, KEY_KPPLUS), /* Redial */ - KEY(6, 7, KEY_KPSLASH), /* Handsfree */ - KEY(0, 6, KEY_ENTER), /* Video */ - - KEY(4, 7, KEY_CAMERA), /* Photo */ - - KEY(4, 0, KEY_F2), /* Home */ - KEY(4, 1, KEY_F3), /* Office */ - KEY(4, 2, KEY_F4), /* Mobile */ + KEY(0, 7, KEY_KP1), + KEY(0, 6, KEY_KP2), + KEY(0, 5, KEY_KP3), + KEY(1, 7, KEY_KP4), + KEY(1, 6, KEY_KP5), + KEY(1, 5, KEY_KP6), + KEY(2, 7, KEY_KP7), + KEY(2, 6, KEY_KP8), + KEY(2, 5, KEY_KP9), + KEY(3, 6, KEY_KP0), + KEY(3, 7, KEY_KPASTERISK), + KEY(3, 5, KEY_KPDOT), /* # key */ + KEY(7, 2, KEY_NUMLOCK), /* Mute */ + KEY(7, 1, KEY_KPMINUS), /* Recall */ + KEY(6, 1, KEY_KPPLUS), /* Redial */ + KEY(7, 6, KEY_KPSLASH), /* Handsfree */ + KEY(6, 0, KEY_ENTER), /* Video */ + + KEY(7, 4, KEY_CAMERA), /* Photo */ + + KEY(0, 4, KEY_F2), /* Home */ + KEY(1, 4, KEY_F3), /* Office */ + KEY(2, 4, KEY_F4), /* Mobile */ KEY(7, 7, KEY_F5), /* SMS */ - KEY(5, 7, KEY_F6), /* Email */ + KEY(7, 5, KEY_F6), /* Email */ /* QWERTY portion of keypad */ - KEY(4, 3, KEY_Q), + KEY(3, 4, KEY_Q), KEY(3, 3, KEY_W), - KEY(2, 3, KEY_E), - KEY(1, 3, KEY_R), - KEY(0, 3, KEY_T), - KEY(7, 4, KEY_Y), - KEY(6, 4, KEY_U), - KEY(5, 4, KEY_I), + KEY(3, 2, KEY_E), + KEY(3, 1, KEY_R), + KEY(3, 0, KEY_T), + KEY(4, 7, KEY_Y), + KEY(4, 6, KEY_U), + KEY(4, 5, KEY_I), KEY(4, 4, KEY_O), - KEY(3, 4, KEY_P), + KEY(4, 3, KEY_P), - KEY(2, 4, KEY_A), - KEY(1, 4, KEY_S), - KEY(0, 4, KEY_D), - KEY(7, 5, KEY_F), - KEY(6, 5, KEY_G), + KEY(4, 2, KEY_A), + KEY(4, 1, KEY_S), + KEY(4, 0, KEY_D), + KEY(5, 7, KEY_F), + KEY(5, 6, KEY_G), KEY(5, 5, KEY_H), - KEY(4, 5, KEY_J), - KEY(3, 5, KEY_K), - KEY(2, 5, KEY_L), + KEY(5, 4, KEY_J), + KEY(5, 3, KEY_K), + KEY(5, 2, KEY_L), - KEY(1, 5, KEY_Z), - KEY(0, 5, KEY_X), - KEY(7, 6, KEY_C), + KEY(5, 1, KEY_Z), + KEY(5, 0, KEY_X), + KEY(6, 7, KEY_C), KEY(6, 6, KEY_V), - KEY(5, 6, KEY_B), - KEY(4, 6, KEY_N), - KEY(3, 6, KEY_M), - KEY(2, 6, KEY_SPACE), + KEY(6, 5, KEY_B), + KEY(6, 4, KEY_N), + KEY(6, 3, KEY_M), + KEY(6, 2, KEY_SPACE), - KEY(0, 7, KEY_LEFTSHIFT), /* Vol up */ - KEY(3, 7, KEY_LEFTCTRL), /* Vol down */ - - 0 + KEY(7, 0, KEY_LEFTSHIFT), /* Vol up */ + KEY(7, 3, KEY_LEFTCTRL), /* Vol down */ }; void ams_delta_latch1_write(u8 mask, u8 value) @@ -189,11 +187,15 @@ static struct resource ams_delta_kp_resources[] = { }, }; +static const struct matrix_keymap_data ams_delta_keymap_data = { + .keymap = ams_delta_keymap, + .keymap_size = ARRAY_SIZE(ams_delta_keymap), +}; + static struct omap_kp_platform_data ams_delta_kp_data = { .rows = 8, .cols = 8, - .keymap = ams_delta_keymap, - .keymapsize = ARRAY_SIZE(ams_delta_keymap), + .keymap_data = &ams_delta_keymap_data, .delay = 9, }; diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index 0c3f396328bd..0efb9dbae44c 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -69,36 +69,35 @@ #define fsample_cpld_clear(bit) \ fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR) -static int fsample_keymap[] = { - KEY(0,0,KEY_UP), - KEY(0,1,KEY_RIGHT), - KEY(0,2,KEY_LEFT), - KEY(0,3,KEY_DOWN), - KEY(0,4,KEY_ENTER), - KEY(1,0,KEY_F10), - KEY(1,1,KEY_SEND), - KEY(1,2,KEY_END), - KEY(1,3,KEY_VOLUMEDOWN), - KEY(1,4,KEY_VOLUMEUP), - KEY(1,5,KEY_RECORD), - KEY(2,0,KEY_F9), - KEY(2,1,KEY_3), - KEY(2,2,KEY_6), - KEY(2,3,KEY_9), - KEY(2,4,KEY_KPDOT), - KEY(3,0,KEY_BACK), - KEY(3,1,KEY_2), - KEY(3,2,KEY_5), - KEY(3,3,KEY_8), - KEY(3,4,KEY_0), - KEY(3,5,KEY_KPSLASH), - KEY(4,0,KEY_HOME), - KEY(4,1,KEY_1), - KEY(4,2,KEY_4), - KEY(4,3,KEY_7), - KEY(4,4,KEY_KPASTERISK), - KEY(4,5,KEY_POWER), - 0 +static const unsigned int fsample_keymap[] = { + KEY(0, 0, KEY_UP), + KEY(1, 0, KEY_RIGHT), + KEY(2, 0, KEY_LEFT), + KEY(3, 0, KEY_DOWN), + KEY(4, 0, KEY_ENTER), + KEY(0, 1, KEY_F10), + KEY(1, 1, KEY_SEND), + KEY(2, 1, KEY_END), + KEY(3, 1, KEY_VOLUMEDOWN), + KEY(4, 1, KEY_VOLUMEUP), + KEY(5, 1, KEY_RECORD), + KEY(0, 2, KEY_F9), + KEY(1, 2, KEY_3), + KEY(2, 2, KEY_6), + KEY(3, 2, KEY_9), + KEY(4, 2, KEY_KPDOT), + KEY(0, 3, KEY_BACK), + KEY(1, 3, KEY_2), + KEY(2, 3, KEY_5), + KEY(3, 3, KEY_8), + KEY(4, 3, KEY_0), + KEY(5, 3, KEY_KPSLASH), + KEY(0, 4, KEY_HOME), + KEY(1, 4, KEY_1), + KEY(2, 4, KEY_4), + KEY(3, 4, KEY_7), + KEY(4, 4, KEY_KPASTERISK), + KEY(5, 4, KEY_POWER), }; static struct smc91x_platdata smc91x_info = { @@ -253,11 +252,15 @@ static struct resource kp_resources[] = { }, }; +static const struct matrix_keymap_data fsample_keymap_data = { + .keymap = fsample_keymap, + .keymap_size = ARRAY_SIZE(fsample_keymap), +}; + static struct omap_kp_platform_data kp_data = { .rows = 8, .cols = 8, - .keymap = fsample_keymap, - .keymapsize = ARRAY_SIZE(fsample_keymap), + .keymap_data = &fsample_keymap_data, .delay = 4, }; diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 082a73ca5564..28b84aa9bdba 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -52,43 +52,42 @@ /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ #define OMAP1610_ETHR_START 0x04000300 -static int h2_keymap[] = { +static const unsigned int h2_keymap[] = { KEY(0, 0, KEY_LEFT), - KEY(0, 1, KEY_RIGHT), - KEY(0, 2, KEY_3), - KEY(0, 3, KEY_F10), - KEY(0, 4, KEY_F5), - KEY(0, 5, KEY_9), - KEY(1, 0, KEY_DOWN), + KEY(1, 0, KEY_RIGHT), + KEY(2, 0, KEY_3), + KEY(3, 0, KEY_F10), + KEY(4, 0, KEY_F5), + KEY(5, 0, KEY_9), + KEY(0, 1, KEY_DOWN), KEY(1, 1, KEY_UP), - KEY(1, 2, KEY_2), - KEY(1, 3, KEY_F9), - KEY(1, 4, KEY_F7), - KEY(1, 5, KEY_0), - KEY(2, 0, KEY_ENTER), - KEY(2, 1, KEY_6), + KEY(2, 1, KEY_2), + KEY(3, 1, KEY_F9), + KEY(4, 1, KEY_F7), + KEY(5, 1, KEY_0), + KEY(0, 2, KEY_ENTER), + KEY(1, 2, KEY_6), KEY(2, 2, KEY_1), - KEY(2, 3, KEY_F2), - KEY(2, 4, KEY_F6), - KEY(2, 5, KEY_HOME), - KEY(3, 0, KEY_8), - KEY(3, 1, KEY_5), - KEY(3, 2, KEY_F12), + KEY(3, 2, KEY_F2), + KEY(4, 2, KEY_F6), + KEY(5, 2, KEY_HOME), + KEY(0, 3, KEY_8), + KEY(1, 3, KEY_5), + KEY(2, 3, KEY_F12), KEY(3, 3, KEY_F3), - KEY(3, 4, KEY_F8), - KEY(3, 5, KEY_END), - KEY(4, 0, KEY_7), - KEY(4, 1, KEY_4), - KEY(4, 2, KEY_F11), - KEY(4, 3, KEY_F1), + KEY(4, 3, KEY_F8), + KEY(5, 3, KEY_END), + KEY(0, 4, KEY_7), + KEY(1, 4, KEY_4), + KEY(2, 4, KEY_F11), + KEY(3, 4, KEY_F1), KEY(4, 4, KEY_F4), - KEY(4, 5, KEY_ESC), - KEY(5, 0, KEY_F13), - KEY(5, 1, KEY_F14), - KEY(5, 2, KEY_F15), - KEY(5, 3, KEY_F16), - KEY(5, 4, KEY_SLEEP), - 0 + KEY(5, 4, KEY_ESC), + KEY(0, 5, KEY_F13), + KEY(1, 5, KEY_F14), + KEY(2, 5, KEY_F15), + KEY(3, 5, KEY_F16), + KEY(4, 5, KEY_SLEEP), }; static struct mtd_partition h2_nor_partitions[] = { @@ -270,14 +269,18 @@ static struct resource h2_kp_resources[] = { }, }; +static const struct matrix_keymap_data h2_keymap_data = { + .keymap = h2_keymap, + .keymap_size = ARRAY_SIZE(h2_keymap), +}; + static struct omap_kp_platform_data h2_kp_data = { .rows = 8, .cols = 8, - .keymap = h2_keymap, - .keymapsize = ARRAY_SIZE(h2_keymap), - .rep = 1, + .keymap_data = &h2_keymap_data, + .rep = true, .delay = 9, - .dbounce = 1, + .dbounce = true, }; static struct platform_device h2_kp_device = { diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index d2cff5022fe5..dbc8b8d882ba 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -56,43 +56,42 @@ #define H3_TS_GPIO 48 -static int h3_keymap[] = { +static const unsigned int h3_keymap[] = { KEY(0, 0, KEY_LEFT), - KEY(0, 1, KEY_RIGHT), - KEY(0, 2, KEY_3), - KEY(0, 3, KEY_F10), - KEY(0, 4, KEY_F5), - KEY(0, 5, KEY_9), - KEY(1, 0, KEY_DOWN), + KEY(1, 0, KEY_RIGHT), + KEY(2, 0, KEY_3), + KEY(3, 0, KEY_F10), + KEY(4, 0, KEY_F5), + KEY(5, 0, KEY_9), + KEY(0, 1, KEY_DOWN), KEY(1, 1, KEY_UP), - KEY(1, 2, KEY_2), - KEY(1, 3, KEY_F9), - KEY(1, 4, KEY_F7), - KEY(1, 5, KEY_0), - KEY(2, 0, KEY_ENTER), - KEY(2, 1, KEY_6), + KEY(2, 1, KEY_2), + KEY(3, 1, KEY_F9), + KEY(4, 1, KEY_F7), + KEY(5, 1, KEY_0), + KEY(0, 2, KEY_ENTER), + KEY(1, 2, KEY_6), KEY(2, 2, KEY_1), - KEY(2, 3, KEY_F2), - KEY(2, 4, KEY_F6), - KEY(2, 5, KEY_HOME), - KEY(3, 0, KEY_8), - KEY(3, 1, KEY_5), - KEY(3, 2, KEY_F12), + KEY(3, 2, KEY_F2), + KEY(4, 2, KEY_F6), + KEY(5, 2, KEY_HOME), + KEY(0, 3, KEY_8), + KEY(1, 3, KEY_5), + KEY(2, 3, KEY_F12), KEY(3, 3, KEY_F3), - KEY(3, 4, KEY_F8), - KEY(3, 5, KEY_END), - KEY(4, 0, KEY_7), - KEY(4, 1, KEY_4), - KEY(4, 2, KEY_F11), - KEY(4, 3, KEY_F1), + KEY(4, 3, KEY_F8), + KEY(5, 3, KEY_END), + KEY(0, 4, KEY_7), + KEY(1, 4, KEY_4), + KEY(2, 4, KEY_F11), + KEY(3, 4, KEY_F1), KEY(4, 4, KEY_F4), - KEY(4, 5, KEY_ESC), - KEY(5, 0, KEY_F13), - KEY(5, 1, KEY_F14), - KEY(5, 2, KEY_F15), - KEY(5, 3, KEY_F16), - KEY(5, 4, KEY_SLEEP), - 0 + KEY(5, 4, KEY_ESC), + KEY(0, 5, KEY_F13), + KEY(1, 5, KEY_F14), + KEY(2, 5, KEY_F15), + KEY(3, 5, KEY_F16), + KEY(4, 5, KEY_SLEEP), }; @@ -305,14 +304,18 @@ static struct resource h3_kp_resources[] = { }, }; +static const struct matrix_keymap_data h3_keymap_data = { + .keymap = h3_keymap, + .keymap_size = ARRAY_SIZE(h3_keymap), +}; + static struct omap_kp_platform_data h3_kp_data = { .rows = 8, .cols = 8, - .keymap = h3_keymap, - .keymapsize = ARRAY_SIZE(h3_keymap), - .rep = 1, + .keymap_data = &h3_keymap_data, + .rep = true, .delay = 9, - .dbounce = 1, + .dbounce = true, }; static struct platform_device h3_kp_device = { diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index 742c6d107268..f2c5c585bc83 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c @@ -180,64 +180,68 @@ /* Keyboard definition */ -static int htc_herald_keymap[] = { +static const unsigned int htc_herald_keymap[] = { KEY(0, 0, KEY_RECORD), /* Mail button */ - KEY(0, 1, KEY_CAMERA), /* Camera */ - KEY(0, 2, KEY_PHONE), /* Send key */ - KEY(0, 3, KEY_VOLUMEUP), /* Volume up */ - KEY(0, 4, KEY_F2), /* Right bar (landscape) */ - KEY(0, 5, KEY_MAIL), /* Win key (portrait) */ - KEY(0, 6, KEY_DIRECTORY), /* Right bar (protrait) */ - KEY(1, 0, KEY_LEFTCTRL), /* Windows key */ + KEY(1, 0, KEY_CAMERA), /* Camera */ + KEY(2, 0, KEY_PHONE), /* Send key */ + KEY(3, 0, KEY_VOLUMEUP), /* Volume up */ + KEY(4, 0, KEY_F2), /* Right bar (landscape) */ + KEY(5, 0, KEY_MAIL), /* Win key (portrait) */ + KEY(6, 0, KEY_DIRECTORY), /* Right bar (protrait) */ + KEY(0, 1, KEY_LEFTCTRL), /* Windows key */ KEY(1, 1, KEY_COMMA), - KEY(1, 2, KEY_M), - KEY(1, 3, KEY_K), - KEY(1, 4, KEY_SLASH), /* OK key */ - KEY(1, 5, KEY_I), - KEY(1, 6, KEY_U), - KEY(2, 0, KEY_LEFTALT), - KEY(2, 1, KEY_TAB), + KEY(2, 1, KEY_M), + KEY(3, 1, KEY_K), + KEY(4, 1, KEY_SLASH), /* OK key */ + KEY(5, 1, KEY_I), + KEY(6, 1, KEY_U), + KEY(0, 2, KEY_LEFTALT), + KEY(1, 2, KEY_TAB), KEY(2, 2, KEY_N), - KEY(2, 3, KEY_J), - KEY(2, 4, KEY_ENTER), - KEY(2, 5, KEY_H), - KEY(2, 6, KEY_Y), - KEY(3, 0, KEY_SPACE), - KEY(3, 1, KEY_L), - KEY(3, 2, KEY_B), + KEY(3, 2, KEY_J), + KEY(4, 2, KEY_ENTER), + KEY(5, 2, KEY_H), + KEY(6, 2, KEY_Y), + KEY(0, 3, KEY_SPACE), + KEY(1, 3, KEY_L), + KEY(2, 3, KEY_B), KEY(3, 3, KEY_V), - KEY(3, 4, KEY_BACKSPACE), - KEY(3, 5, KEY_G), - KEY(3, 6, KEY_T), - KEY(4, 0, KEY_CAPSLOCK), /* Shift */ - KEY(4, 1, KEY_C), - KEY(4, 2, KEY_F), - KEY(4, 3, KEY_R), + KEY(4, 3, KEY_BACKSPACE), + KEY(5, 3, KEY_G), + KEY(6, 3, KEY_T), + KEY(0, 4, KEY_CAPSLOCK), /* Shift */ + KEY(1, 4, KEY_C), + KEY(2, 4, KEY_F), + KEY(3, 4, KEY_R), KEY(4, 4, KEY_O), - KEY(4, 5, KEY_E), - KEY(4, 6, KEY_D), - KEY(5, 0, KEY_X), - KEY(5, 1, KEY_Z), - KEY(5, 2, KEY_S), - KEY(5, 3, KEY_W), - KEY(5, 4, KEY_P), + KEY(5, 4, KEY_E), + KEY(6, 4, KEY_D), + KEY(0, 5, KEY_X), + KEY(1, 5, KEY_Z), + KEY(2, 5, KEY_S), + KEY(3, 5, KEY_W), + KEY(4, 5, KEY_P), KEY(5, 5, KEY_Q), - KEY(5, 6, KEY_A), - KEY(6, 0, KEY_CONNECT), /* Voice button */ - KEY(6, 2, KEY_CANCEL), /* End key */ - KEY(6, 3, KEY_VOLUMEDOWN), /* Volume down */ - KEY(6, 4, KEY_F1), /* Left bar (landscape) */ - KEY(6, 5, KEY_WWW), /* OK button (portrait) */ + KEY(6, 5, KEY_A), + KEY(0, 6, KEY_CONNECT), /* Voice button */ + KEY(2, 6, KEY_CANCEL), /* End key */ + KEY(3, 6, KEY_VOLUMEDOWN), /* Volume down */ + KEY(4, 6, KEY_F1), /* Left bar (landscape) */ + KEY(5, 6, KEY_WWW), /* OK button (portrait) */ KEY(6, 6, KEY_CALENDAR), /* Left bar (portrait) */ - 0 }; -struct omap_kp_platform_data htcherald_kp_data = { +static const struct matrix_keymap_data htc_herald_keymap_data = { + .keymap = htc_herald_keymap, + .keymap_size = ARRAY_SIZE(htc_herald_keymap), +}; + +static struct omap_kp_platform_data htcherald_kp_data = { .rows = 7, .cols = 7, .delay = 20, - .rep = 1, - .keymap = htc_herald_keymap, + .rep = true, + .keymap_data = &htc_herald_keymap_data, }; static struct resource kp_resources[] = { @@ -278,7 +282,7 @@ static struct gpio_keys_button herald_gpio_keys_table[] = { static struct gpio_keys_platform_data herald_gpio_keys_data = { .buttons = herald_gpio_keys_table, .nbuttons = ARRAY_SIZE(herald_gpio_keys_table), - .rep = 1, + .rep = true, }; static struct platform_device herald_gpiokeys_device = { diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 8d59b078fc2c..a36e6742bf9b 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -44,17 +44,16 @@ /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ #define INNOVATOR1610_ETHR_START 0x04000300 -static int innovator_keymap[] = { +static const unsigned int innovator_keymap[] = { KEY(0, 0, KEY_F1), - KEY(0, 3, KEY_DOWN), + KEY(3, 0, KEY_DOWN), KEY(1, 1, KEY_F2), - KEY(1, 2, KEY_RIGHT), - KEY(2, 0, KEY_F3), - KEY(2, 1, KEY_F4), + KEY(2, 1, KEY_RIGHT), + KEY(0, 2, KEY_F3), + KEY(1, 2, KEY_F4), KEY(2, 2, KEY_UP), - KEY(3, 2, KEY_ENTER), + KEY(2, 3, KEY_ENTER), KEY(3, 3, KEY_LEFT), - 0 }; static struct mtd_partition innovator_partitions[] = { @@ -126,11 +125,15 @@ static struct resource innovator_kp_resources[] = { }, }; +static const struct matrix_keymap_data innovator_keymap_data = { + .keymap = innovator_keymap, + .keymap_size = ARRAY_SIZE(innovator_keymap), +}; + static struct omap_kp_platform_data innovator_kp_data = { .rows = 8, .cols = 8, - .keymap = innovator_keymap, - .keymapsize = ARRAY_SIZE(innovator_keymap), + .keymap_data = &innovator_keymap_data, .delay = 4, }; diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 605495bbc583..d21f09dc78f4 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -54,19 +54,18 @@ static void __init omap_nokia770_init_irq(void) omap_init_irq(); } -static int nokia770_keymap[] = { - KEY(0, 1, GROUP_0 | KEY_UP), - KEY(0, 2, GROUP_1 | KEY_F5), - KEY(1, 0, GROUP_0 | KEY_LEFT), +static const unsigned int nokia770_keymap[] = { + KEY(1, 0, GROUP_0 | KEY_UP), + KEY(2, 0, GROUP_1 | KEY_F5), + KEY(0, 1, GROUP_0 | KEY_LEFT), KEY(1, 1, GROUP_0 | KEY_ENTER), - KEY(1, 2, GROUP_0 | KEY_RIGHT), - KEY(2, 0, GROUP_1 | KEY_ESC), - KEY(2, 1, GROUP_0 | KEY_DOWN), + KEY(2, 1, GROUP_0 | KEY_RIGHT), + KEY(0, 2, GROUP_1 | KEY_ESC), + KEY(1, 2, GROUP_0 | KEY_DOWN), KEY(2, 2, GROUP_1 | KEY_F4), - KEY(3, 0, GROUP_2 | KEY_F7), - KEY(3, 1, GROUP_2 | KEY_F8), - KEY(3, 2, GROUP_2 | KEY_F6), - 0 + KEY(0, 3, GROUP_2 | KEY_F7), + KEY(1, 3, GROUP_2 | KEY_F8), + KEY(2, 3, GROUP_2 | KEY_F6), }; static struct resource nokia770_kp_resources[] = { @@ -77,11 +76,15 @@ static struct resource nokia770_kp_resources[] = { }, }; +static const struct matrix_keymap_data nokia770_keymap_data = { + .keymap = nokia770_keymap, + .keymap_size = ARRAY_SIZE(nokia770_keymap), +}; + static struct omap_kp_platform_data nokia770_kp_data = { .rows = 8, .cols = 8, - .keymap = nokia770_keymap, - .keymapsize = ARRAY_SIZE(nokia770_keymap), + .keymap_data = &nokia770_keymap_data, .delay = 4, }; diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index d44e7172efc2..7c5e2112c776 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -338,25 +338,28 @@ static struct i2c_board_info __initdata mistral_i2c_board_info[] = { */ }; -static const int osk_keymap[] = { +static const unsigned int osk_keymap[] = { /* KEY(col, row, code) */ KEY(0, 0, KEY_F1), /* SW4 */ - KEY(0, 3, KEY_UP), /* (sw2/up) */ + KEY(3, 0, KEY_UP), /* (sw2/up) */ KEY(1, 1, KEY_LEFTCTRL), /* SW5 */ - KEY(1, 2, KEY_LEFT), /* (sw2/left) */ - KEY(2, 0, KEY_SPACE), /* SW3 */ - KEY(2, 1, KEY_ESC), /* SW6 */ + KEY(2, 1, KEY_LEFT), /* (sw2/left) */ + KEY(0, 2, KEY_SPACE), /* SW3 */ + KEY(1, 2, KEY_ESC), /* SW6 */ KEY(2, 2, KEY_DOWN), /* (sw2/down) */ - KEY(3, 2, KEY_ENTER), /* (sw2/select) */ + KEY(2, 3, KEY_ENTER), /* (sw2/select) */ KEY(3, 3, KEY_RIGHT), /* (sw2/right) */ - 0 +}; + +static const struct matrix_keymap_data osk_keymap_data = { + .keymap = osk_keymap, + .keymap_size = ARRAY_SIZE(osk_keymap), }; static struct omap_kp_platform_data osk_kp_data = { .rows = 8, .cols = 8, - .keymap = (int *) osk_keymap, - .keymapsize = ARRAY_SIZE(osk_keymap), + .keymap_data = &osk_keymap_data, .delay = 9, }; diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 994dc6f50729..fb51ce6123d8 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -65,25 +65,29 @@ static void __init omap_palmte_init_irq(void) omap_init_irq(); } -static const int palmte_keymap[] = { +static const unsigned int palmte_keymap[] = { KEY(0, 0, KEY_F1), /* Calendar */ - KEY(0, 1, KEY_F2), /* Contacts */ - KEY(0, 2, KEY_F3), /* Tasks List */ - KEY(0, 3, KEY_F4), /* Note Pad */ - KEY(0, 4, KEY_POWER), - KEY(1, 0, KEY_LEFT), + KEY(1, 0, KEY_F2), /* Contacts */ + KEY(2, 0, KEY_F3), /* Tasks List */ + KEY(3, 0, KEY_F4), /* Note Pad */ + KEY(4, 0, KEY_POWER), + KEY(0, 1, KEY_LEFT), KEY(1, 1, KEY_DOWN), - KEY(1, 2, KEY_UP), - KEY(1, 3, KEY_RIGHT), - KEY(1, 4, KEY_ENTER), - 0, + KEY(2, 1, KEY_UP), + KEY(3, 1, KEY_RIGHT), + KEY(4, 1, KEY_ENTER), +}; + +static const struct matrix_keymap_data palmte_keymap_data = { + .keymap = palmte_keymap, + .keymap_size = ARRAY_SIZE(palmte_keymap), }; static struct omap_kp_platform_data palmte_kp_data = { .rows = 8, .cols = 8, - .keymap = (int *) palmte_keymap, - .rep = 1, + .keymap_data = &palmte_keymap_data, + .rep = true, .delay = 12, }; diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index ed1400a67f75..f04f2d36e7d3 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -51,19 +51,18 @@ #define PALMTT_MMC_WP_GPIO 8 #define PALMTT_HDQ_GPIO 11 -static int palmtt_keymap[] = { +static const unsigned int palmtt_keymap[] = { KEY(0, 0, KEY_ESC), - KEY(0, 1, KEY_SPACE), - KEY(0, 2, KEY_LEFTCTRL), - KEY(0, 3, KEY_TAB), - KEY(0, 4, KEY_ENTER), - KEY(1, 0, KEY_LEFT), + KEY(1, 0, KEY_SPACE), + KEY(2, 0, KEY_LEFTCTRL), + KEY(3, 0, KEY_TAB), + KEY(4, 0, KEY_ENTER), + KEY(0, 1, KEY_LEFT), KEY(1, 1, KEY_DOWN), - KEY(1, 2, KEY_UP), - KEY(1, 3, KEY_RIGHT), - KEY(2, 0, KEY_SLEEP), - KEY(2, 4, KEY_Y), - 0 + KEY(2, 1, KEY_UP), + KEY(3, 1, KEY_RIGHT), + KEY(0, 2, KEY_SLEEP), + KEY(4, 2, KEY_Y), }; static struct mtd_partition palmtt_partitions[] = { @@ -136,10 +135,15 @@ static struct resource palmtt_kp_resources[] = { }, }; +static const struct matrix_keymap_data palmtt_keymap_data = { + .keymap = palmtt_keymap, + .keymap_size = ARRAY_SIZE(palmtt_keymap), +}; + static struct omap_kp_platform_data palmtt_kp_data = { .rows = 6, .cols = 3, - .keymap = palmtt_keymap, + .keymap_data = &palmtt_keymap_data, }; static struct platform_device palmtt_kp_device = { diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 2afac598baee..d7bbbe721a75 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -64,26 +64,30 @@ omap_palmz71_init_irq(void) omap_init_irq(); } -static int palmz71_keymap[] = { +static const unsigned int palmz71_keymap[] = { KEY(0, 0, KEY_F1), - KEY(0, 1, KEY_F2), - KEY(0, 2, KEY_F3), - KEY(0, 3, KEY_F4), - KEY(0, 4, KEY_POWER), - KEY(1, 0, KEY_LEFT), + KEY(1, 0, KEY_F2), + KEY(2, 0, KEY_F3), + KEY(3, 0, KEY_F4), + KEY(4, 0, KEY_POWER), + KEY(0, 1, KEY_LEFT), KEY(1, 1, KEY_DOWN), - KEY(1, 2, KEY_UP), - KEY(1, 3, KEY_RIGHT), - KEY(1, 4, KEY_ENTER), - KEY(2, 0, KEY_CAMERA), - 0, + KEY(2, 1, KEY_UP), + KEY(3, 1, KEY_RIGHT), + KEY(4, 1, KEY_ENTER), + KEY(0, 2, KEY_CAMERA), +}; + +static const struct matrix_keymap_data palmz71_keymap_data = { + .keymap = palmz71_keymap, + .keymap_size = ARRAY_SIZE(palmz71_keymap), }; static struct omap_kp_platform_data palmz71_kp_data = { .rows = 8, .cols = 8, - .keymap = palmz71_keymap, - .rep = 1, + .keymap_data = &palmz71_keymap_data, + .rep = true, .delay = 80, }; diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 69fda218fb45..3c8ee8489458 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -36,36 +36,35 @@ #include #include -static int p2_keymap[] = { - KEY(0,0,KEY_UP), - KEY(0,1,KEY_RIGHT), - KEY(0,2,KEY_LEFT), - KEY(0,3,KEY_DOWN), - KEY(0,4,KEY_ENTER), - KEY(1,0,KEY_F10), - KEY(1,1,KEY_SEND), - KEY(1,2,KEY_END), - KEY(1,3,KEY_VOLUMEDOWN), - KEY(1,4,KEY_VOLUMEUP), - KEY(1,5,KEY_RECORD), - KEY(2,0,KEY_F9), - KEY(2,1,KEY_3), - KEY(2,2,KEY_6), - KEY(2,3,KEY_9), - KEY(2,4,KEY_KPDOT), - KEY(3,0,KEY_BACK), - KEY(3,1,KEY_2), - KEY(3,2,KEY_5), - KEY(3,3,KEY_8), - KEY(3,4,KEY_0), - KEY(3,5,KEY_KPSLASH), - KEY(4,0,KEY_HOME), - KEY(4,1,KEY_1), - KEY(4,2,KEY_4), - KEY(4,3,KEY_7), - KEY(4,4,KEY_KPASTERISK), - KEY(4,5,KEY_POWER), - 0 +static const unsigned int p2_keymap[] = { + KEY(0, 0, KEY_UP), + KEY(1, 0, KEY_RIGHT), + KEY(2, 0, KEY_LEFT), + KEY(3, 0, KEY_DOWN), + KEY(4, 0, KEY_ENTER), + KEY(0, 1, KEY_F10), + KEY(1, 1, KEY_SEND), + KEY(2, 1, KEY_END), + KEY(3, 1, KEY_VOLUMEDOWN), + KEY(4, 1, KEY_VOLUMEUP), + KEY(5, 1, KEY_RECORD), + KEY(0, 2, KEY_F9), + KEY(1, 2, KEY_3), + KEY(2, 2, KEY_6), + KEY(3, 2, KEY_9), + KEY(4, 2, KEY_KPDOT), + KEY(0, 3, KEY_BACK), + KEY(1, 3, KEY_2), + KEY(2, 3, KEY_5), + KEY(3, 3, KEY_8), + KEY(4, 3, KEY_0), + KEY(5, 3, KEY_KPSLASH), + KEY(0, 4, KEY_HOME), + KEY(1, 4, KEY_1), + KEY(2, 4, KEY_4), + KEY(3, 4, KEY_7), + KEY(4, 4, KEY_KPASTERISK), + KEY(5, 4, KEY_POWER), }; static struct smc91x_platdata smc91x_info = { @@ -211,13 +210,17 @@ static struct resource kp_resources[] = { }, }; +static const struct matrix_keymap_data p2_keymap_data = { + .keymap = p2_keymap, + .keymap_size = ARRAY_SIZE(p2_keymap), +}; + static struct omap_kp_platform_data kp_data = { .rows = 8, .cols = 8, - .keymap = p2_keymap, - .keymapsize = ARRAY_SIZE(p2_keymap), + .keymap_data = &p2_keymap_data, .delay = 4, - .dbounce = 1, + .dbounce = true, }; static struct platform_device kp_device = { diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 463862c67819..d41fe2d0616a 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -164,36 +164,35 @@ EXPORT_SYMBOL(sx1_setusbpower); /*----------- Keypad -------------------------*/ -static int sx1_keymap[] = { - KEY(5, 3, GROUP_0 | 117), /* camera Qt::Key_F17 */ - KEY(0, 4, GROUP_0 | 114), /* voice memo Qt::Key_F14 */ - KEY(1, 4, GROUP_2 | 114), /* voice memo */ - KEY(2, 4, GROUP_3 | 114), /* voice memo */ +static const unsigned int sx1_keymap[] = { + KEY(3, 5, GROUP_0 | 117), /* camera Qt::Key_F17 */ + KEY(4, 0, GROUP_0 | 114), /* voice memo Qt::Key_F14 */ + KEY(4, 1, GROUP_2 | 114), /* voice memo */ + KEY(4, 2, GROUP_3 | 114), /* voice memo */ KEY(0, 0, GROUP_1 | KEY_F12), /* red button Qt::Key_Hangup */ - KEY(4, 3, GROUP_1 | KEY_LEFT), - KEY(2, 3, GROUP_1 | KEY_DOWN), - KEY(1, 3, GROUP_1 | KEY_RIGHT), - KEY(0, 3, GROUP_1 | KEY_UP), + KEY(3, 4, GROUP_1 | KEY_LEFT), + KEY(3, 2, GROUP_1 | KEY_DOWN), + KEY(3, 1, GROUP_1 | KEY_RIGHT), + KEY(3, 0, GROUP_1 | KEY_UP), KEY(3, 3, GROUP_1 | KEY_POWER), /* joystick press or Qt::Key_Select */ - KEY(5, 0, GROUP_1 | KEY_1), - KEY(4, 0, GROUP_1 | KEY_2), - KEY(3, 0, GROUP_1 | KEY_3), - KEY(3, 4, GROUP_1 | KEY_4), + KEY(0, 5, GROUP_1 | KEY_1), + KEY(0, 4, GROUP_1 | KEY_2), + KEY(0, 3, GROUP_1 | KEY_3), + KEY(4, 3, GROUP_1 | KEY_4), KEY(4, 4, GROUP_1 | KEY_5), - KEY(5, 4, GROUP_1 | KEY_KPASTERISK),/* "*" */ - KEY(4, 1, GROUP_1 | KEY_6), - KEY(5, 1, GROUP_1 | KEY_7), - KEY(3, 1, GROUP_1 | KEY_8), - KEY(3, 2, GROUP_1 | KEY_9), - KEY(5, 2, GROUP_1 | KEY_0), - KEY(4, 2, GROUP_1 | 113), /* # F13 Toggle input method Qt::Key_F13 */ - KEY(0, 1, GROUP_1 | KEY_F11), /* green button Qt::Key_Call */ - KEY(1, 2, GROUP_1 | KEY_YEN), /* left soft Qt::Key_Context1 */ + KEY(4, 5, GROUP_1 | KEY_KPASTERISK),/* "*" */ + KEY(1, 4, GROUP_1 | KEY_6), + KEY(1, 5, GROUP_1 | KEY_7), + KEY(1, 3, GROUP_1 | KEY_8), + KEY(2, 3, GROUP_1 | KEY_9), + KEY(2, 5, GROUP_1 | KEY_0), + KEY(2, 4, GROUP_1 | 113), /* # F13 Toggle input method Qt::Key_F13 */ + KEY(1, 0, GROUP_1 | KEY_F11), /* green button Qt::Key_Call */ + KEY(2, 1, GROUP_1 | KEY_YEN), /* left soft Qt::Key_Context1 */ KEY(2, 2, GROUP_1 | KEY_F8), /* right soft Qt::Key_Back */ - KEY(2, 1, GROUP_1 | KEY_LEFTSHIFT), /* shift */ + KEY(1, 2, GROUP_1 | KEY_LEFTSHIFT), /* shift */ KEY(1, 1, GROUP_1 | KEY_BACKSPACE), /* C (clear) */ - KEY(0, 2, GROUP_1 | KEY_F7), /* menu Qt::Key_Menu */ - 0 + KEY(2, 0, GROUP_1 | KEY_F7), /* menu Qt::Key_Menu */ }; static struct resource sx1_kp_resources[] = { @@ -204,11 +203,15 @@ static struct resource sx1_kp_resources[] = { }, }; +static const struct matrix_keymap_data sx1_keymap_data = { + .keymap = sx1_keymap, + .keymap_size = ARRAY_SIZE(sx1_keymap), +}; + static struct omap_kp_platform_data sx1_kp_data = { .rows = 6, .cols = 6, - .keymap = sx1_keymap, - .keymapsize = ARRAY_SIZE(sx1_keymap), + .keymap_data = &sx1_keymap_data, .delay = 80, }; diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 0a2d73cf036f..b386a403c379 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -51,38 +51,37 @@ static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 }; static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 }; -static int h4_keymap[] = { +static const unsigned int h4_keymap[] = { KEY(0, 0, KEY_LEFT), - KEY(0, 1, KEY_RIGHT), - KEY(0, 2, KEY_A), - KEY(0, 3, KEY_B), - KEY(0, 4, KEY_C), - KEY(1, 0, KEY_DOWN), + KEY(1, 0, KEY_RIGHT), + KEY(2, 0, KEY_A), + KEY(3, 0, KEY_B), + KEY(4, 0, KEY_C), + KEY(0, 1, KEY_DOWN), KEY(1, 1, KEY_UP), - KEY(1, 2, KEY_E), - KEY(1, 3, KEY_F), - KEY(1, 4, KEY_G), - KEY(2, 0, KEY_ENTER), - KEY(2, 1, KEY_I), + KEY(2, 1, KEY_E), + KEY(3, 1, KEY_F), + KEY(4, 1, KEY_G), + KEY(0, 2, KEY_ENTER), + KEY(1, 2, KEY_I), KEY(2, 2, KEY_J), - KEY(2, 3, KEY_K), - KEY(2, 4, KEY_3), - KEY(3, 0, KEY_M), - KEY(3, 1, KEY_N), - KEY(3, 2, KEY_O), + KEY(3, 2, KEY_K), + KEY(4, 2, KEY_3), + KEY(0, 3, KEY_M), + KEY(1, 3, KEY_N), + KEY(2, 3, KEY_O), KEY(3, 3, KEY_P), - KEY(3, 4, KEY_Q), - KEY(4, 0, KEY_R), - KEY(4, 1, KEY_4), - KEY(4, 2, KEY_T), - KEY(4, 3, KEY_U), + KEY(4, 3, KEY_Q), + KEY(0, 4, KEY_R), + KEY(1, 4, KEY_4), + KEY(2, 4, KEY_T), + KEY(3, 4, KEY_U), KEY(4, 4, KEY_ENTER), - KEY(5, 0, KEY_V), - KEY(5, 1, KEY_W), - KEY(5, 2, KEY_L), - KEY(5, 3, KEY_S), - KEY(5, 4, KEY_ENTER), - 0 + KEY(0, 5, KEY_V), + KEY(1, 5, KEY_W), + KEY(2, 5, KEY_L), + KEY(3, 5, KEY_S), + KEY(4, 5, KEY_ENTER), }; static struct mtd_partition h4_partitions[] = { @@ -136,12 +135,16 @@ static struct platform_device h4_flash_device = { .resource = &h4_flash_resource, }; +static const struct matrix_keymap_data h4_keymap_data = { + .keymap = h4_keymap, + .keymap_size = ARRAY_SIZE(h4_keymap), +}; + static struct omap_kp_platform_data h4_kp_data = { .rows = 6, .cols = 7, - .keymap = h4_keymap, - .keymapsize = ARRAY_SIZE(h4_keymap), - .rep = 1, + .keymap_data = &h4_keymap_data, + .rep = true, .row_gpios = row_gpios, .col_gpios = col_gpios, }; diff --git a/arch/arm/plat-omap/include/plat/keypad.h b/arch/arm/plat-omap/include/plat/keypad.h index 3ae52ccc793c..793ce9d53294 100644 --- a/arch/arm/plat-omap/include/plat/keypad.h +++ b/arch/arm/plat-omap/include/plat/keypad.h @@ -10,16 +10,18 @@ #ifndef ASMARM_ARCH_KEYPAD_H #define ASMARM_ARCH_KEYPAD_H -#warning: Please update the board to use matrix_keypad.h instead +#ifndef CONFIG_ARCH_OMAP1 +#warning Please update the board to use matrix-keypad driver +#endif +#include struct omap_kp_platform_data { int rows; int cols; - int *keymap; - unsigned int keymapsize; - unsigned int rep:1; + const struct matrix_keymap_data *keymap_data; + bool rep; unsigned long delay; - unsigned int dbounce:1; + bool dbounce; /* specific to OMAP242x*/ unsigned int *row_gpios; unsigned int *col_gpios; @@ -28,18 +30,21 @@ struct omap_kp_platform_data { /* Group (0..3) -- when multiple keys are pressed, only the * keys pressed in the same group are considered as pressed. This is * in order to workaround certain crappy HW designs that produce ghost - * keypresses. */ -#define GROUP_0 (0 << 16) -#define GROUP_1 (1 << 16) -#define GROUP_2 (2 << 16) -#define GROUP_3 (3 << 16) + * keypresses. Two free bits, not used by neither row/col nor keynum, + * must be available for use as group bits. The below GROUP_SHIFT + * macro definition is based on some prior knowledge of the + * matrix_keypad defined KEY() macro internals. + */ +#define GROUP_SHIFT 14 +#define GROUP_0 (0 << GROUP_SHIFT) +#define GROUP_1 (1 << GROUP_SHIFT) +#define GROUP_2 (2 << GROUP_SHIFT) +#define GROUP_3 (3 << GROUP_SHIFT) #define GROUP_MASK GROUP_3 +#if KEY_MAX & GROUP_MASK +#error Group bits in conflict with keynum bits +#endif -#define KEY_PERSISTENT 0x00800000 -#define KEYNUM_MASK 0x00EFFFFF -#define KEY(col, row, val) (((col) << 28) | ((row) << 24) | (val)) -#define PERSISTENT_KEY(col, row) (((col) << 28) | ((row) << 24) | \ - KEY_PERSISTENT) #endif diff --git a/drivers/input/keyboard/omap-keypad.c b/drivers/input/keyboard/omap-keypad.c index a72e61ddca91..0e2a19cb43d8 100644 --- a/drivers/input/keyboard/omap-keypad.c +++ b/drivers/input/keyboard/omap-keypad.c @@ -65,7 +65,6 @@ struct omap_kp { static DECLARE_TASKLET_DISABLED(kp_tasklet, omap_kp_tasklet, 0); -static int *keymap; static unsigned int *row_gpios; static unsigned int *col_gpios; @@ -162,20 +161,11 @@ static void omap_kp_scan_keypad(struct omap_kp *omap_kp, unsigned char *state) } } -static inline int omap_kp_find_key(int col, int row) -{ - int i, key; - - key = KEY(col, row, 0); - for (i = 0; keymap[i] != 0; i++) - if ((keymap[i] & 0xff000000) == key) - return keymap[i] & 0x00ffffff; - return -1; -} - static void omap_kp_tasklet(unsigned long data) { struct omap_kp *omap_kp_data = (struct omap_kp *) data; + unsigned short *keycodes = omap_kp_data->input->keycode; + unsigned int row_shift = get_count_order(omap_kp_data->cols); unsigned char new_state[8], changed, key_down = 0; int col, row; int spurious = 0; @@ -199,7 +189,7 @@ static void omap_kp_tasklet(unsigned long data) row, (new_state[col] & (1 << row)) ? "pressed" : "released"); #else - key = omap_kp_find_key(col, row); + key = keycodes[MATRIX_SCAN_CODE(row, col, row_shift)]; if (key < 0) { printk(KERN_WARNING "omap-keypad: Spurious key event %d-%d\n", @@ -298,13 +288,18 @@ static int __devinit omap_kp_probe(struct platform_device *pdev) struct input_dev *input_dev; struct omap_kp_platform_data *pdata = pdev->dev.platform_data; int i, col_idx, row_idx, irq_idx, ret; + unsigned int row_shift, keycodemax; - if (!pdata->rows || !pdata->cols || !pdata->keymap) { - printk(KERN_ERR "No rows, cols or keymap from pdata\n"); + if (!pdata->rows || !pdata->cols || !pdata->keymap_data) { + printk(KERN_ERR "No rows, cols or keymap_data from pdata\n"); return -EINVAL; } - omap_kp = kzalloc(sizeof(struct omap_kp), GFP_KERNEL); + row_shift = get_count_order(pdata->cols); + keycodemax = pdata->rows << row_shift; + + omap_kp = kzalloc(sizeof(struct omap_kp) + + keycodemax * sizeof(unsigned short), GFP_KERNEL); input_dev = input_allocate_device(); if (!omap_kp || !input_dev) { kfree(omap_kp); @@ -320,7 +315,9 @@ static int __devinit omap_kp_probe(struct platform_device *pdev) if (!cpu_is_omap24xx()) omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); - keymap = pdata->keymap; + input_dev->keycode = &omap_kp[1]; + input_dev->keycodesize = sizeof(unsigned short); + input_dev->keycodemax = keycodemax; if (pdata->rep) __set_bit(EV_REP, input_dev->evbit); @@ -374,8 +371,8 @@ static int __devinit omap_kp_probe(struct platform_device *pdev) /* setup input device */ __set_bit(EV_KEY, input_dev->evbit); - for (i = 0; keymap[i] != 0; i++) - __set_bit(keymap[i] & KEY_MAX, input_dev->keybit); + matrix_keypad_build_keymap(pdata->keymap_data, row_shift, + input_dev->keycode, input_dev->keybit); input_dev->name = "omap-keypad"; input_dev->phys = "omap-keypad/input0"; input_dev->dev.parent = &pdev->dev; @@ -416,7 +413,7 @@ static int __devinit omap_kp_probe(struct platform_device *pdev) return 0; err5: for (i = irq_idx - 1; i >=0; i--) - free_irq(row_gpios[i], 0); + free_irq(row_gpios[i], NULL); err4: input_unregister_device(omap_kp->input); input_dev = NULL; @@ -447,11 +444,11 @@ static int __devexit omap_kp_remove(struct platform_device *pdev) gpio_free(col_gpios[i]); for (i = 0; i < omap_kp->rows; i++) { gpio_free(row_gpios[i]); - free_irq(gpio_to_irq(row_gpios[i]), 0); + free_irq(gpio_to_irq(row_gpios[i]), NULL); } } else { omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); - free_irq(omap_kp->irq, 0); + free_irq(omap_kp->irq, NULL); } del_timer_sync(&omap_kp->timer); diff --git a/include/linux/input/matrix_keypad.h b/include/linux/input/matrix_keypad.h index 80352ad6581a..697474691749 100644 --- a/include/linux/input/matrix_keypad.h +++ b/include/linux/input/matrix_keypad.h @@ -9,7 +9,7 @@ #define KEY(row, col, val) ((((row) & (MATRIX_MAX_ROWS - 1)) << 24) |\ (((col) & (MATRIX_MAX_COLS - 1)) << 16) |\ - (val & 0xffff)) + ((val) & 0xffff)) #define KEY_ROW(k) (((k) >> 24) & 0xff) #define KEY_COL(k) (((k) >> 16) & 0xff) -- cgit v1.2.3