From 469641caf1762f5458a67436b27d4aa3668e583d Mon Sep 17 00:00:00 2001 From: Paul Bolle Date: Fri, 14 Feb 2014 07:35:12 +0900 Subject: ARM: S3C24XX: Fix typo CONFIG_CPUS_3C2443 Signed-off-by: Paul Bolle Reviewed-by: Sachin Kamat Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c index 4adaa4b43ffe..1d77d709ec22 100644 --- a/arch/arm/mach-s3c24xx/common.c +++ b/arch/arm/mach-s3c24xx/common.c @@ -484,7 +484,7 @@ struct platform_device s3c2440_device_dma = { }; #endif -#if defined(CONFIG_CPUS_3C2443) || defined(CONFIG_CPU_S3C2416) +#if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416) static struct resource s3c2443_dma_resource[] = { [0] = DEFINE_RES_MEM(S3C24XX_PA_DMA, S3C24XX_SZ_DMA), [1] = DEFINE_RES_IRQ(IRQ_S3C2443_DMA0), -- cgit v1.2.3 From bfeda827278f09f4db35877e5f1ca9c149ca2890 Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Fri, 14 Feb 2014 07:43:54 +0900 Subject: ARM: dts: Keep G3D regulator always on for exynos5250-arndale Apparently, if G3D regulator is powered off, the SoC cannot enter low power modes and just hangs. This patch fixes this by keeping the regulator always on when the system is running, as suggested by Exynos 4 User's Manual in case of Exynos4210/4x12 SoCs (Exynos5250 UM does not have such note, but observed behavior seems to confirm that it is true for this SoC as well). This fixes an issue preventing Arndale board from entering sleep mode observed since commit 346f372f7b72a0 clk: exynos5250: Add CLK_IGNORE_UNUSED flag for pmu clock that landed in kernel 3.10, which has fixed the clock driver to make the SoC actually try to enter the sleep mode. Signed-off-by: Tomasz Figa Acked-by: Kyungmin Park Cc: [v3.10+] Tested-by: Tushar Behera Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250-arndale.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index b42e658876e5..457112d659ea 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -287,6 +287,7 @@ regulator-name = "vdd_g3d"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; + regulator-always-on; regulator-boot-on; op_mode = <1>; }; -- cgit v1.2.3 From eeee27531c8c40ff4226eec2f8bea21e868ed4b6 Mon Sep 17 00:00:00 2001 From: Tushar Behera Date: Sun, 16 Feb 2014 02:02:33 +0900 Subject: ARM: exynos_defconfig: Update EHCI config entry Commit 29824c167bea ("USB: host: Rename ehci-s5p to ehci-exynos") renamed the config entry of EHCI host driver. Similar change needs to be done in exynos_defconfig as well. Signed-off-by: Tushar Behera Reviewed-by: Jingoo Han Signed-off-by: Kukjin Kim --- arch/arm/configs/exynos_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig index dbe1f1c47bb0..4ce7b70ea901 100644 --- a/arch/arm/configs/exynos_defconfig +++ b/arch/arm/configs/exynos_defconfig @@ -94,7 +94,7 @@ CONFIG_FONT_7x14=y CONFIG_LOGO=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_S5P=y +CONFIG_USB_EHCI_EXYNOS=y CONFIG_USB_STORAGE=y CONFIG_USB_DWC3=y CONFIG_USB_PHY=y -- cgit v1.2.3 From baf64abc468c7583592f67197ae23fa31414b4db Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Sun, 16 Feb 2014 02:05:44 +0900 Subject: ARM: S3C64XX: mach-crag6410-module.c is not modular Despite the name mach-crag6410-module.c, the code is built for MACH_WLF_CRAGG_6410 -- which is bool, and hence this code is either present or absent. It will never be modular, so using module_init as an alias for __initcall can be somewhat misleading. Fix this up now, so that we can relocate module_init from init.h into module.h in the future. If we don't do this, we'd have to add module.h to obviously non-modular code, and that would be a worse thing. Note that direct use of __initcall is discouraged, vs. one of the priority categorized subgroups. As __initcall gets mapped onto device_initcall, our use of device_initcall directly in this change means that the runtime impact is zero -- it will remain at level 6 in initcall ordering. Cc: Ben Dooks Cc: Russell King Cc: patches@opensource.wolfsonmicro.com Signed-off-by: Paul Gortmaker Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/mach-crag6410-module.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c index 7ccfef227c77..9c00d83f7151 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c @@ -401,4 +401,4 @@ static int __init wlf_gf_module_register(void) { return i2c_add_driver(&wlf_gf_module_driver); } -module_init(wlf_gf_module_register); +device_initcall(wlf_gf_module_register); -- cgit v1.2.3 From 37be287c3a799a6f2aecbbaa468c937561df2329 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Sat, 15 Feb 2014 12:05:30 +0400 Subject: ARM: clps711x: autcpu12: Fix incorrect NAND CLE GPIO Signed-off-by: Alexander Shiyan Signed-off-by: Arnd Bergmann --- arch/arm/mach-clps711x/board-autcpu12.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-clps711x/board-autcpu12.c b/arch/arm/mach-clps711x/board-autcpu12.c index f8d71a89644a..5f831133178f 100644 --- a/arch/arm/mach-clps711x/board-autcpu12.c +++ b/arch/arm/mach-clps711x/board-autcpu12.c @@ -73,7 +73,7 @@ #define AUTCPU12_SMC_NCE (AUTCPU12_MMGPIO_BASE + 0) /* Bit 0 */ #define AUTCPU12_SMC_RDY CLPS711X_GPIO(1, 2) #define AUTCPU12_SMC_ALE CLPS711X_GPIO(1, 3) -#define AUTCPU12_SMC_CLE CLPS711X_GPIO(1, 3) +#define AUTCPU12_SMC_CLE CLPS711X_GPIO(1, 4) /* LCD contrast digital potentiometer */ #define AUTCPU12_DPOT_CS CLPS711X_GPIO(4, 0) -- cgit v1.2.3 From 698b48532539484b012fb7c4176b959d32a17d00 Mon Sep 17 00:00:00 2001 From: Stefan Sørensen Date: Thu, 6 Mar 2014 16:27:15 +0100 Subject: ARM: OMAP2+: INTC: Acknowledge stuck active interrupts MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When an interrupt has become active on the INTC it will stay active until it is acked, even if masked or de-asserted. The INTC_PENDING_IRQn registers are however updated and since these are used by omap_intc_handle_irq to determine which interrupt to handle, it will never see the active interrupt. This will result in a storm of useless interrupts that is only stopped when another higher priority interrupt is asserted. Fix by sending the INTC an acknowledge if we find no interrupts to handle. Cc: stable@vger.kernel.org Signed-off-by: Stefan Sørensen Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index e022a869bff2..6037a9a01ed5 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -222,6 +222,7 @@ void __init ti81xx_init_irq(void) static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs) { u32 irqnr; + int handled_irq = 0; do { irqnr = readl_relaxed(base_addr + 0x98); @@ -249,8 +250,15 @@ out: if (irqnr) { irqnr = irq_find_mapping(domain, irqnr); handle_IRQ(irqnr, regs); + handled_irq = 1; } } while (irqnr); + + /* If an irq is masked or deasserted while active, we will + * keep ending up here with no irq handled. So remove it from + * the INTC with an ack.*/ + if (!handled_irq) + omap_ack_irq(NULL); } asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs) -- cgit v1.2.3 From 07484ca33ef83900f5cfbde075c1a19e5a237aa1 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Wed, 12 Mar 2014 16:43:20 -0500 Subject: ARM: OMAP4: Fix definition of IS_PM44XX_ERRATUM Just like IS_PM34XX_ERRATUM, IS_PM44XX_ERRATUM is valid only if CONFIG_PM is enabled, else, disabling CONFIG_PM results in build failure complaining about the following: arch/arm/mach-omap2/built-in.o: In function `omap4_boot_secondary': :(.text+0x8a70): undefined reference to `pm44xx_errata' Fixes: c962184 (ARM: OMAP4: PM: add errata support) Reported-by: Tony Lindgren Signed-off-by: Nishanth Menon Acked-by: Santosh Shilimkar Acked-by: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/pm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 7bdd22afce69..d4d0fce325c7 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -103,7 +103,7 @@ static inline void enable_omap3630_toggle_l2_on_restore(void) { } #define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD (1 << 0) -#if defined(CONFIG_ARCH_OMAP4) +#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4) extern u16 pm44xx_errata; #define IS_PM44XX_ERRATUM(id) (pm44xx_errata & (id)) #else -- cgit v1.2.3 From 7b8b6af169a069454936053631d151a50af7b69a Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Wed, 26 Feb 2014 11:38:09 +0100 Subject: ARM: dts: omap4/5: Use l3_ick for the gpmc node The GPMC clock is derived from l3_ick. The simplest solution is to reference directly l3_ick to provide the GPMC fck in order to get correct timings. The real management of the clock is left to hwmod. Cc: stable@vger.kernel.org # v3.14+ Signed-off-by: Florian Vaussard Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap4.dtsi | 2 ++ arch/arm/boot/dts/omap5.dtsi | 2 ++ 2 files changed, 4 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index d3f8a6e8ca20..69409f7e05dc 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -275,6 +275,8 @@ gpmc,num-waitpins = <4>; ti,hwmods = "gpmc"; ti,no-idle-on-init; + clocks = <&l3_div_ck>; + clock-names = "fck"; }; uart1: serial@4806a000 { diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index a72813a9663e..7a16647c76f4 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -302,6 +302,8 @@ gpmc,num-cs = <8>; gpmc,num-waitpins = <4>; ti,hwmods = "gpmc"; + clocks = <&l3_iclk_div>; + clock-names = "fck"; }; i2c1: i2c@48070000 { -- cgit v1.2.3 From 8abcdd680d543fb582371e146e62ba9f2af8a816 Mon Sep 17 00:00:00 2001 From: Mugunthan V N Date: Thu, 6 Mar 2014 18:01:34 +0530 Subject: ARM: dts: am33xx: correcting dt node unit address for usb DT node's unit address should be its own register offset address to make it a unique across the system. This patch corrects the incorrect USB entries with correct register offset for unit address. Cc: stable@vger.kernel.org # v3.12+ Acked-by: Sebastian Andrzej Siewior Acked-by: Felipe Balbi Signed-off-by: Mugunthan V N Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am33xx.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 6d95d3df33c7..79087ccf64bc 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -448,7 +448,7 @@ ti,hwmods = "usb_otg_hs"; status = "disabled"; - usb_ctrl_mod: control@44e10000 { + usb_ctrl_mod: control@44e10620 { compatible = "ti,am335x-usb-ctrl-module"; reg = <0x44e10620 0x10 0x44e10648 0x4>; @@ -551,7 +551,7 @@ "tx14", "tx15"; }; - cppi41dma: dma-controller@07402000 { + cppi41dma: dma-controller@47402000 { compatible = "ti,am3359-cppi41"; reg = <0x47400000 0x1000 0x47402000 0x1000 -- cgit v1.2.3 From 77319669af37a1cfc844b801e83343b37e3c7e13 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Mon, 23 Dec 2013 16:48:48 -0600 Subject: ARM: OMAP4: hwmod data: correct the idlemodes for spinlock The spinlock module's SYSCONFIG register does not support smart wakeup, so remove this flag from the idle modes in the spinlock hwmod definition. Signed-off-by: Suman Anna Acked-by: Benoit Cousson Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 3318cae96e7d..1219280bb976 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -2541,8 +2541,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_spinlock_sysc = { .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), .sysc_fields = &omap_hwmod_sysc_type1, }; -- cgit v1.2.3 From 75efba81513133fdd2f9c1ac9213bf86cc622f62 Mon Sep 17 00:00:00 2001 From: Krzysztof Hałasa Date: Tue, 4 Mar 2014 11:50:35 +0100 Subject: CNS3xxx: Fix a WARN() related to IRQ allocation. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit WARNING: at drivers/irqchip/irq-gic.c:952 gic_init_bases+0xe4/0x2b8() Cannot allocate irq_descs @ IRQ16, assuming pre-allocated Backtrace: gic_init_bases from cns3xxx_init_irq+0x24/0x34 cns3xxx_init_irq from init_IRQ+0x24/0x2c init_IRQ from start_kernel+0x1a8/0x338 start_kernel from 0x2000806c The problem is that 64 CNS3xxx CPU interrupts, starting at 32, are allocated by the ARM platform-independent code (as requested by machine_desc->nr_irqs = 96), and then the GIC code tries to allocate them again. Tested on Gateworks Laguna board, masqueraded as CNS3420VB. Signed-off-by: Krzysztof Hałasa Signed-off-by: Arnd Bergmann --- arch/arm/mach-cns3xxx/cns3420vb.c | 1 - arch/arm/mach-cns3xxx/core.c | 1 - 2 files changed, 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c index ce096d678aa4..d863d8729edc 100644 --- a/arch/arm/mach-cns3xxx/cns3420vb.c +++ b/arch/arm/mach-cns3xxx/cns3420vb.c @@ -246,7 +246,6 @@ static void __init cns3420_map_io(void) MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board") .atag_offset = 0x100, - .nr_irqs = NR_IRQS_CNS3XXX, .map_io = cns3420_map_io, .init_irq = cns3xxx_init_irq, .init_time = cns3xxx_timer_init, diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index e38b279f402c..0aaeb8c19c9c 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c @@ -368,7 +368,6 @@ static const char *cns3xxx_dt_compat[] __initdata = { DT_MACHINE_START(CNS3XXX_DT, "Cavium Networks CNS3xxx") .dt_compat = cns3xxx_dt_compat, - .nr_irqs = NR_IRQS_CNS3XXX, .map_io = cns3xxx_map_io, .init_irq = cns3xxx_init_irq, .init_time = cns3xxx_timer_init, -- cgit v1.2.3 From 64cf9d07ef1f5ed6abc6ed8a2420eb2849f7f444 Mon Sep 17 00:00:00 2001 From: Krzysztof Hałasa Date: Tue, 4 Mar 2014 08:37:10 +0100 Subject: CNS3xxx: Fix PCIe early iotable_init(). This patch fixes the following BUG: > kernel BUG at mm/vmalloc.c:1132! > PC is at vm_area_add_early+0x20/0x84 > LR is at add_static_vm_early+0xc/0x60 > > The problem is cns3xxx_pcie_init() (device_initcall) calls the "early" > iotable_init(). Instead of merely calling the PCIe iotable_init() from machine_desc->map_io(), this patch adds the required mappings to the main CNS3xxx mapping table. This means we don't convert .pfn back to virtual addresses in pcie.c. The size of the address space consumed for PCIe control is reduced from 96 MiB (6 * 16 MiB) to about 32 MiB (this doesn't include MMIO address space required by PCI devices): - Size of the PCIe "host" mapping is reduced from 16 MiB to 4 KiB. It's a PCI configuration address space for the local (on-chip) PCIe bridge. - Size of the "CFG0" mapping is reduced from 16 MiB to 64 KiB. It's for Type 0 Configuration accesses, i.e., accesses to the single device (with possible "functions") on the other end of the PCIe link. We really only need a 4 KiB page at 0x8000 (see the offset calculation in cns3xxx_pci_cfg_base()). There is still a potential problem with PCI bus numbers > 0xF, are they supported? - The code in cns3xxx_pci_cfg_base() and cns3xxx_pcie_hw_init() should be clearer now. - The maximum address space allocated for PCI MMIO is now correctly shown in /proc/iomem as 176 MiB (per each of the two PCI "domains" - previously only 16 MiB were reserved). This patch has been tested on Gateworks Laguna board, masqueraded as CNS3420VB. Signed-off-by: Krzysztof Ha?asa Signed-off-by: Arnd Bergmann --- arch/arm/mach-cns3xxx/core.c | 32 +++++++++++++ arch/arm/mach-cns3xxx/pcie.c | 105 +++++++++++++------------------------------ 2 files changed, 64 insertions(+), 73 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index 0aaeb8c19c9c..79d37adcb1f7 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c @@ -47,6 +47,38 @@ static struct map_desc cns3xxx_io_desc[] __initdata = { .pfn = __phys_to_pfn(CNS3XXX_PM_BASE), .length = SZ_4K, .type = MT_DEVICE, +#ifdef CONFIG_PCI + }, { + .virtual = CNS3XXX_PCIE0_HOST_BASE_VIRT, + .pfn = __phys_to_pfn(CNS3XXX_PCIE0_HOST_BASE), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = CNS3XXX_PCIE0_CFG0_BASE_VIRT, + .pfn = __phys_to_pfn(CNS3XXX_PCIE0_CFG0_BASE), + .length = SZ_64K, /* really 4 KiB at offset 32 KiB */ + .type = MT_DEVICE, + }, { + .virtual = CNS3XXX_PCIE0_CFG1_BASE_VIRT, + .pfn = __phys_to_pfn(CNS3XXX_PCIE0_CFG1_BASE), + .length = SZ_16M, + .type = MT_DEVICE, + }, { + .virtual = CNS3XXX_PCIE1_HOST_BASE_VIRT, + .pfn = __phys_to_pfn(CNS3XXX_PCIE1_HOST_BASE), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = CNS3XXX_PCIE1_CFG0_BASE_VIRT, + .pfn = __phys_to_pfn(CNS3XXX_PCIE1_CFG0_BASE), + .length = SZ_64K, /* really 4 KiB at offset 32 KiB */ + .type = MT_DEVICE, + }, { + .virtual = CNS3XXX_PCIE1_CFG1_BASE_VIRT, + .pfn = __phys_to_pfn(CNS3XXX_PCIE1_CFG1_BASE), + .length = SZ_16M, + .type = MT_DEVICE, +#endif }, }; diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c index c7b204bff386..413134c54452 100644 --- a/arch/arm/mach-cns3xxx/pcie.c +++ b/arch/arm/mach-cns3xxx/pcie.c @@ -23,15 +23,10 @@ #include "cns3xxx.h" #include "core.h" -enum cns3xxx_access_type { - CNS3XXX_HOST_TYPE = 0, - CNS3XXX_CFG0_TYPE, - CNS3XXX_CFG1_TYPE, - CNS3XXX_NUM_ACCESS_TYPES, -}; - struct cns3xxx_pcie { - struct map_desc cfg_bases[CNS3XXX_NUM_ACCESS_TYPES]; + void __iomem *host_regs; /* PCI config registers for host bridge */ + void __iomem *cfg0_regs; /* PCI Type 0 config registers */ + void __iomem *cfg1_regs; /* PCI Type 1 config registers */ unsigned int irqs[2]; struct resource res_io; struct resource res_mem; @@ -66,7 +61,6 @@ static void __iomem *cns3xxx_pci_cfg_base(struct pci_bus *bus, int busno = bus->number; int slot = PCI_SLOT(devfn); int offset; - enum cns3xxx_access_type type; void __iomem *base; /* If there is no link, just show the CNS PCI bridge. */ @@ -78,17 +72,21 @@ static void __iomem *cns3xxx_pci_cfg_base(struct pci_bus *bus, * we still want to access it. For this to work, we must place * the first device on the same bus as the CNS PCI bridge. */ - if (busno == 0) { - if (slot > 1) - return NULL; - type = slot; - } else { - type = CNS3XXX_CFG1_TYPE; - } + if (busno == 0) { /* directly connected PCIe bus */ + switch (slot) { + case 0: /* host bridge device, function 0 only */ + base = cnspci->host_regs; + break; + case 1: /* directly connected device */ + base = cnspci->cfg0_regs; + break; + default: + return NULL; /* no such device */ + } + } else /* remote PCI bus */ + base = cnspci->cfg1_regs; - base = (void __iomem *)cnspci->cfg_bases[type].virtual; offset = ((busno & 0xf) << 20) | (devfn << 12) | (where & 0xffc); - return base + offset; } @@ -180,36 +178,19 @@ static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) static struct cns3xxx_pcie cns3xxx_pcie[] = { [0] = { - .cfg_bases = { - [CNS3XXX_HOST_TYPE] = { - .virtual = CNS3XXX_PCIE0_HOST_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_PCIE0_HOST_BASE), - .length = SZ_16M, - .type = MT_DEVICE, - }, - [CNS3XXX_CFG0_TYPE] = { - .virtual = CNS3XXX_PCIE0_CFG0_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_PCIE0_CFG0_BASE), - .length = SZ_16M, - .type = MT_DEVICE, - }, - [CNS3XXX_CFG1_TYPE] = { - .virtual = CNS3XXX_PCIE0_CFG1_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_PCIE0_CFG1_BASE), - .length = SZ_16M, - .type = MT_DEVICE, - }, - }, + .host_regs = (void __iomem *)CNS3XXX_PCIE0_HOST_BASE_VIRT, + .cfg0_regs = (void __iomem *)CNS3XXX_PCIE0_CFG0_BASE_VIRT, + .cfg1_regs = (void __iomem *)CNS3XXX_PCIE0_CFG1_BASE_VIRT, .res_io = { .name = "PCIe0 I/O space", .start = CNS3XXX_PCIE0_IO_BASE, - .end = CNS3XXX_PCIE0_IO_BASE + SZ_16M - 1, + .end = CNS3XXX_PCIE0_CFG0_BASE - 1, /* 16 MiB */ .flags = IORESOURCE_IO, }, .res_mem = { .name = "PCIe0 non-prefetchable", .start = CNS3XXX_PCIE0_MEM_BASE, - .end = CNS3XXX_PCIE0_MEM_BASE + SZ_16M - 1, + .end = CNS3XXX_PCIE0_HOST_BASE - 1, /* 176 MiB */ .flags = IORESOURCE_MEM, }, .irqs = { IRQ_CNS3XXX_PCIE0_RC, IRQ_CNS3XXX_PCIE0_DEVICE, }, @@ -222,36 +203,19 @@ static struct cns3xxx_pcie cns3xxx_pcie[] = { }, }, [1] = { - .cfg_bases = { - [CNS3XXX_HOST_TYPE] = { - .virtual = CNS3XXX_PCIE1_HOST_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_PCIE1_HOST_BASE), - .length = SZ_16M, - .type = MT_DEVICE, - }, - [CNS3XXX_CFG0_TYPE] = { - .virtual = CNS3XXX_PCIE1_CFG0_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_PCIE1_CFG0_BASE), - .length = SZ_16M, - .type = MT_DEVICE, - }, - [CNS3XXX_CFG1_TYPE] = { - .virtual = CNS3XXX_PCIE1_CFG1_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_PCIE1_CFG1_BASE), - .length = SZ_16M, - .type = MT_DEVICE, - }, - }, + .host_regs = (void __iomem *)CNS3XXX_PCIE1_HOST_BASE_VIRT, + .cfg0_regs = (void __iomem *)CNS3XXX_PCIE1_CFG0_BASE_VIRT, + .cfg1_regs = (void __iomem *)CNS3XXX_PCIE1_CFG1_BASE_VIRT, .res_io = { .name = "PCIe1 I/O space", .start = CNS3XXX_PCIE1_IO_BASE, - .end = CNS3XXX_PCIE1_IO_BASE + SZ_16M - 1, + .end = CNS3XXX_PCIE1_CFG0_BASE - 1, /* 16 MiB */ .flags = IORESOURCE_IO, }, .res_mem = { .name = "PCIe1 non-prefetchable", .start = CNS3XXX_PCIE1_MEM_BASE, - .end = CNS3XXX_PCIE1_MEM_BASE + SZ_16M - 1, + .end = CNS3XXX_PCIE1_HOST_BASE - 1, /* 176 MiB */ .flags = IORESOURCE_MEM, }, .irqs = { IRQ_CNS3XXX_PCIE1_RC, IRQ_CNS3XXX_PCIE1_DEVICE, }, @@ -307,18 +271,15 @@ static void __init cns3xxx_pcie_hw_init(struct cns3xxx_pcie *cnspci) .ops = &cns3xxx_pcie_ops, .sysdata = &sd, }; - u32 io_base = cnspci->res_io.start >> 16; - u32 mem_base = cnspci->res_mem.start >> 16; - u32 host_base = cnspci->cfg_bases[CNS3XXX_HOST_TYPE].pfn; - u32 cfg0_base = cnspci->cfg_bases[CNS3XXX_CFG0_TYPE].pfn; + u16 mem_base = cnspci->res_mem.start >> 16; + u16 mem_limit = cnspci->res_mem.end >> 16; + u16 io_base = cnspci->res_io.start >> 16; + u16 io_limit = cnspci->res_io.end >> 16; u32 devfn = 0; u8 tmp8; u16 pos; u16 dc; - host_base = (__pfn_to_phys(host_base) - 1) >> 16; - cfg0_base = (__pfn_to_phys(cfg0_base) - 1) >> 16; - pci_bus_write_config_byte(&bus, devfn, PCI_PRIMARY_BUS, 0); pci_bus_write_config_byte(&bus, devfn, PCI_SECONDARY_BUS, 1); pci_bus_write_config_byte(&bus, devfn, PCI_SUBORDINATE_BUS, 1); @@ -328,9 +289,9 @@ static void __init cns3xxx_pcie_hw_init(struct cns3xxx_pcie *cnspci) pci_bus_read_config_byte(&bus, devfn, PCI_SUBORDINATE_BUS, &tmp8); pci_bus_write_config_word(&bus, devfn, PCI_MEMORY_BASE, mem_base); - pci_bus_write_config_word(&bus, devfn, PCI_MEMORY_LIMIT, host_base); + pci_bus_write_config_word(&bus, devfn, PCI_MEMORY_LIMIT, mem_limit); pci_bus_write_config_word(&bus, devfn, PCI_IO_BASE_UPPER16, io_base); - pci_bus_write_config_word(&bus, devfn, PCI_IO_LIMIT_UPPER16, cfg0_base); + pci_bus_write_config_word(&bus, devfn, PCI_IO_LIMIT_UPPER16, io_limit); if (!cnspci->linked) return; @@ -368,8 +329,6 @@ static int __init cns3xxx_pcie_init(void) "imprecise external abort"); for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) { - iotable_init(cns3xxx_pcie[i].cfg_bases, - ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases)); cns3xxx_pwr_clk_en(0x1 << PM_CLK_GATE_REG_OFFSET_PCIE(i)); cns3xxx_pwr_soft_rst(0x1 << PM_SOFT_RST_REG_OFFST_PCIE(i)); cns3xxx_pcie_check_link(&cns3xxx_pcie[i]); -- cgit v1.2.3 From bfdad565ae0a61ac943974b8ae61ec0ed55ceb04 Mon Sep 17 00:00:00 2001 From: Simon Kågström Date: Mon, 17 Mar 2014 14:42:35 +0100 Subject: ARM: ixp4xx: Make dma_set_coherent_mask common, correct implementation Non-PCI devices can use the entire 32-bit range, PCI dittos are limited to the first 64MiB. Also actually setup coherent_dma_mask. The patch has been verified on a board with 128MiB memory, one ipx4xx_eth device and a e100 PCI device. Signed-off-by: Simon Kagstrom Signed-off-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/common-pci.c | 9 --------- arch/arm/mach-ixp4xx/common.c | 12 ++++++++++++ 2 files changed, 12 insertions(+), 9 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 200970d56f6d..055d81694a17 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c @@ -481,14 +481,5 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys) return 1; } -int dma_set_coherent_mask(struct device *dev, u64 mask) -{ - if (mask >= SZ_64M - 1) - return 0; - - return -EIO; -} - EXPORT_SYMBOL(ixp4xx_pci_read); EXPORT_SYMBOL(ixp4xx_pci_write); -EXPORT_SYMBOL(dma_set_coherent_mask); diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 6d68aed6548a..df82a2b4a546 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include @@ -578,6 +579,17 @@ void ixp4xx_restart(enum reboot_mode mode, const char *cmd) } } +int dma_set_coherent_mask(struct device *dev, u64 mask) +{ + if (dev_is_pci(dev) && mask >= SZ_64M) + return -EIO; + + dev->coherent_dma_mask = mask; + + return 0; +} +EXPORT_SYMBOL(dma_set_coherent_mask); + #ifdef CONFIG_IXP4XX_INDIRECT_PCI /* * In the case of using indirect PCI, we simply return the actual PCI -- cgit v1.2.3 From 3524080826c289df0efd5159282f6c4aeacf0c11 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 12 Mar 2014 15:29:22 +0100 Subject: ARM: mmp: allow platform devices with modular USB The USB host drivers need platform data to be defined on pxa168 and pxa910, but the conditionals used in the devices.c file only work if the drivers are built-in. This patch fixes the definition by changing the #ifdef to #if IS_ENABLED(), which works both for built-in and modular Kconfig symbols. I found one specific problem using 'randconfig' builds, but for consistency, this patch uses IS_ENABLED() for all Kconfig symbols in these three files. Signed-off-by: Arnd Bergmann Acked-by: Haojian Zhuang --- arch/arm/mach-mmp/aspenite.c | 4 ++-- arch/arm/mach-mmp/devices.c | 14 +++++++------- arch/arm/mach-mmp/ttc_dkb.c | 18 +++++++++--------- 3 files changed, 18 insertions(+), 18 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c index 0c002099c3a3..7e0248582efd 100644 --- a/arch/arm/mach-mmp/aspenite.c +++ b/arch/arm/mach-mmp/aspenite.c @@ -231,7 +231,7 @@ static struct pxa27x_keypad_platform_data aspenite_keypad_info __initdata = { .debounce_interval = 30, }; -#if defined(CONFIG_USB_EHCI_MV) +#if IS_ENABLED(CONFIG_USB_EHCI_MV) static struct mv_usb_platform_data pxa168_sph_pdata = { .mode = MV_USB_MODE_HOST, .phy_init = pxa_usb_phy_init, @@ -258,7 +258,7 @@ static void __init common_init(void) /* off-chip devices */ platform_device_register(&smc91x_device); -#if defined(CONFIG_USB_EHCI_MV) +#if IS_ENABLED(CONFIG_USB_EHCI_MV) pxa168_add_usb_host(&pxa168_sph_pdata); #endif } diff --git a/arch/arm/mach-mmp/devices.c b/arch/arm/mach-mmp/devices.c index dd2d8b103cc8..2bcb766af05d 100644 --- a/arch/arm/mach-mmp/devices.c +++ b/arch/arm/mach-mmp/devices.c @@ -72,7 +72,7 @@ int __init pxa_register_device(struct pxa_device_desc *desc, return platform_device_add(pdev); } -#if defined(CONFIG_USB) || defined(CONFIG_USB_GADGET) +#if IS_ENABLED(CONFIG_USB) || IS_ENABLED(CONFIG_USB_GADGET) /***************************************************************************** * The registers read/write routines @@ -112,9 +112,9 @@ static void u2o_write(void __iomem *base, unsigned int offset, readl_relaxed(base + offset); } -#if defined(CONFIG_USB_MV_UDC) || defined(CONFIG_USB_EHCI_MV) +#if IS_ENABLED(CONFIG_USB_MV_UDC) || IS_ENABLED(CONFIG_USB_EHCI_MV) -#if defined(CONFIG_CPU_PXA910) || defined(CONFIG_CPU_PXA168) +#if IS_ENABLED(CONFIG_CPU_PXA910) || IS_ENABLED(CONFIG_CPU_PXA168) static DEFINE_MUTEX(phy_lock); static int phy_init_cnt; @@ -238,10 +238,10 @@ void pxa_usb_phy_deinit(void __iomem *phy_reg) #endif #endif -#ifdef CONFIG_USB_SUPPORT +#if IS_ENABLED(CONFIG_USB_SUPPORT) static u64 usb_dma_mask = ~(u32)0; -#ifdef CONFIG_USB_MV_UDC +#if IS_ENABLED(CONFIG_USB_MV_UDC) struct resource pxa168_u2o_resources[] = { /* regbase */ [0] = { @@ -276,7 +276,7 @@ struct platform_device pxa168_device_u2o = { }; #endif /* CONFIG_USB_MV_UDC */ -#ifdef CONFIG_USB_EHCI_MV_U2O +#if IS_ENABLED(CONFIG_USB_EHCI_MV_U2O) struct resource pxa168_u2oehci_resources[] = { /* regbase */ [0] = { @@ -312,7 +312,7 @@ struct platform_device pxa168_device_u2oehci = { }; #endif -#if defined(CONFIG_USB_MV_OTG) +#if IS_ENABLED(CONFIG_USB_MV_OTG) struct resource pxa168_u2ootg_resources[] = { /* regbase */ [0] = { diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c index cfadd974f5ce..ac4af81de3ea 100644 --- a/arch/arm/mach-mmp/ttc_dkb.c +++ b/arch/arm/mach-mmp/ttc_dkb.c @@ -164,8 +164,8 @@ static struct i2c_board_info ttc_dkb_i2c_info[] = { }, }; -#ifdef CONFIG_USB_SUPPORT -#if defined(CONFIG_USB_MV_UDC) || defined(CONFIG_USB_EHCI_MV_U2O) +#if IS_ENABLED(CONFIG_USB_SUPPORT) +#if IS_ENABLED(CONFIG_USB_MV_UDC) || IS_ENABLED(CONFIG_USB_EHCI_MV_U2O) static struct mv_usb_platform_data ttc_usb_pdata = { .vbus = NULL, @@ -178,14 +178,14 @@ static struct mv_usb_platform_data ttc_usb_pdata = { #endif #endif -#ifdef CONFIG_MTD_NAND_PXA3xx +#if IS_ENABLED(CONFIG_MTD_NAND_PXA3xx) static struct pxa3xx_nand_platform_data dkb_nand_info = { .enable_arbiter = 1, .num_cs = 1, }; #endif -#ifdef CONFIG_MMP_DISP +#if IS_ENABLED(CONFIG_MMP_DISP) /* path config */ #define CFG_IOPADMODE(iopad) (iopad) /* 0x0 ~ 0xd */ #define SCLK_SOURCE_SELECT(x) (x << 30) /* 0x0 ~ 0x3 */ @@ -275,7 +275,7 @@ static void __init ttc_dkb_init(void) /* on-chip devices */ pxa910_add_uart(1); -#ifdef CONFIG_MTD_NAND_PXA3xx +#if IS_ENABLED(CONFIG_MTD_NAND_PXA3xx) pxa910_add_nand(&dkb_nand_info); #endif @@ -285,22 +285,22 @@ static void __init ttc_dkb_init(void) sizeof(struct pxa_gpio_platform_data)); platform_add_devices(ARRAY_AND_SIZE(ttc_dkb_devices)); -#ifdef CONFIG_USB_MV_UDC +#if IS_ENABLED(CONFIG_USB_MV_UDC) pxa168_device_u2o.dev.platform_data = &ttc_usb_pdata; platform_device_register(&pxa168_device_u2o); #endif -#ifdef CONFIG_USB_EHCI_MV_U2O +#if IS_ENABLED(CONFIG_USB_EHCI_MV_U2O) pxa168_device_u2oehci.dev.platform_data = &ttc_usb_pdata; platform_device_register(&pxa168_device_u2oehci); #endif -#ifdef CONFIG_USB_MV_OTG +#if IS_ENABLED(CONFIG_USB_MV_OTG) pxa168_device_u2ootg.dev.platform_data = &ttc_usb_pdata; platform_device_register(&pxa168_device_u2ootg); #endif -#ifdef CONFIG_MMP_DISP +#if IS_ENABLED(CONFIG_MMP_DISP) add_disp(); #endif } -- cgit v1.2.3 From fe138c236bf7e146a9bbf3c465258a5d6beaf9fc Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 15:18:31 +0100 Subject: ARM: at91: split out at91x40 into a top-level option at91x40 is different from all the other at91 machines, and it is impossible to build a kernel that works on both this SoC and any of the others, even though it is possible to build a noMMU kernel for any at91 machine. By turning at91x40 into a separate top-level option, we explicitly forbid enabling invalid configurations that include mutually exclusive machines. Signed-off-by: Arnd Bergmann Acked-by: Nicolas Ferre Cc: Andrew Victor Cc: Jean-Christophe Plagniol-Villard --- arch/arm/mach-at91/Kconfig | 22 ++++++++++++++++++---- arch/arm/mach-at91/Kconfig.non_dt | 8 +------- 2 files changed, 19 insertions(+), 11 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 4f0e800e7e71..c1981a66d1f1 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -64,11 +64,22 @@ choice prompt "Core type" +config ARCH_AT91X40 + bool "ARM7 AT91X40" + depends on !MMU + select CPU_ARM7TDMI + select ARCH_USES_GETTIMEOFFSET + select MULTI_IRQ_HANDLER + select SPARSE_IRQ + + help + Select this if you are using one of Atmel's AT91X40 SoC. + config SOC_SAM_V4_V5 - bool "ARM7/ARM9" + bool "ARM9 AT91SAM9/AT91RM9200" help - Select this if you are using one of Atmel's AT91SAM9, AT91RM9200 - or AT91X40 SoC. + Select this if you are using one of Atmel's AT91SAM9 or + AT91RM9200 SoC. config SOC_SAM_V7 bool "Cortex A5" @@ -179,9 +190,12 @@ config SOC_AT91SAM9N12 Select this if you are using Atmel's AT91SAM9N12 SoC. # ---------------------------------------------------------- +endif # SOC_SAM_V4_V5 + +if SOC_SAM_V4_V5 || ARCH_AT91X40 source arch/arm/mach-at91/Kconfig.non_dt -endif # SOC_SAM_V4_V5 +endif comment "Generic Board Type" diff --git a/arch/arm/mach-at91/Kconfig.non_dt b/arch/arm/mach-at91/Kconfig.non_dt index 1f73e9b527da..44ace320d2e1 100644 --- a/arch/arm/mach-at91/Kconfig.non_dt +++ b/arch/arm/mach-at91/Kconfig.non_dt @@ -5,6 +5,7 @@ config HAVE_AT91_DATAFLASH_CARD choice prompt "Atmel AT91 Processor Devices for non DT boards" + depends on !ARCH_AT91X40 config ARCH_AT91_NONE bool "None" @@ -39,13 +40,6 @@ config ARCH_AT91SAM9G45 select SOC_AT91SAM9G45 select AT91_USE_OLD_CLK -config ARCH_AT91X40 - bool "AT91x40" - depends on !MMU - select ARCH_USES_GETTIMEOFFSET - select MULTI_IRQ_HANDLER - select SPARSE_IRQ - endchoice config ARCH_AT91SAM9G20 -- cgit v1.2.3 From dfe367632656d3abd954edf2921e1a2af2d48e44 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 17:44:55 +0100 Subject: ARM: at91: don't provide dt init code for at91x40 at91x40 has no support for device tree, but Kconfig allows us to enable CONFIG_OF anyway, causing a link error in the at91 reset controller initialization. The easiest fix is to adapt the existing #ifdef to omit the broken code on at91x40 where it is never called anyway. Signed-off-by: Arnd Bergmann Acked-by: Nicolas Ferre Cc: Andrew Victor Cc: Jean-Christophe Plagniol-Villard --- arch/arm/mach-at91/setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index f7ca97b7291e..f7a07a58ebb6 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -351,7 +351,7 @@ void __init at91_ioremap_matrix(u32 base_addr) panic("Impossible to ioremap at91_matrix_base\n"); } -#if defined(CONFIG_OF) +#if defined(CONFIG_OF) && !defined(CONFIG_ARCH_AT91X40) static struct of_device_id rstc_ids[] = { { .compatible = "atmel,at91sam9260-rstc", .data = at91sam9_alt_restart }, { .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart }, -- cgit v1.2.3 From c85fc989f92a1590477e22bf582712f9ab35f48e Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 17:42:15 +0100 Subject: ARM: at91: export sam9_smc interfaces The pata_at91 driver uses interfaces defined in the sam9_smc platform code. Since the pata driver can be a loadable module, we have to export those symbols in order to link cleanly. Signed-off-by: Arnd Bergmann Acked-by: Nicolas Ferre Cc: Andrew Victor Cc: Jean-Christophe Plagniol-Villard --- arch/arm/mach-at91/sam9_smc.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c index b26156bf15db..826315af6d11 100644 --- a/arch/arm/mach-at91/sam9_smc.c +++ b/arch/arm/mach-at91/sam9_smc.c @@ -36,6 +36,7 @@ void sam9_smc_write_mode(int id, int cs, { sam9_smc_cs_write_mode(AT91_SMC_CS(id, cs), config); } +EXPORT_SYMBOL_GPL(sam9_smc_write_mode); static void sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_config *config) @@ -69,6 +70,7 @@ void sam9_smc_configure(int id, int cs, { sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config); } +EXPORT_SYMBOL_GPL(sam9_smc_configure); static void sam9_smc_cs_read_mode(void __iomem *base, struct sam9_smc_config *config) @@ -84,6 +86,7 @@ void sam9_smc_read_mode(int id, int cs, { sam9_smc_cs_read_mode(AT91_SMC_CS(id, cs), config); } +EXPORT_SYMBOL_GPL(sam9_smc_read_mode); static void sam9_smc_cs_read(void __iomem *base, struct sam9_smc_config *config) -- cgit v1.2.3 From 871336a93794d9144a94c51a85489cb890462f64 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 17:47:23 +0100 Subject: ARM: at91: fix broken "if () else" statement If CONFIG_PATA_AT91 is disabled, the code in at91_add_device_cf is turned into invalid C statements due to the lack of an expression before the 'else' clause. This moves the first half of the condition inside of the #ifdef, which seems to be what the author intended. Signed-off-by: Arnd Bergmann Acked-by: Nicolas Ferre Cc: Andrew Victor Cc: Jean-Christophe Plagniol-Villard --- arch/arm/mach-at91/at91sam9260_devices.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index eda8d1679d40..8a4c6656b608 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c @@ -1255,12 +1255,8 @@ void __init at91_add_device_cf(struct at91_cf_data *data) at91_set_A_periph(AT91_PIN_PC10, 0); /* CFRNW */ at91_set_A_periph(AT91_PIN_PC15, 1); /* NWAIT */ - if (data->flags & AT91_CF_TRUE_IDE) -#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) + if (IS_ENABLED(CONFIG_PATA_AT91) && (data->flags & AT91_CF_TRUE_IDE) pdev->name = "pata_at91"; -#else -#warning "board requires AT91_CF_TRUE_IDE: enable pata_at91" -#endif else pdev->name = "at91_cf"; -- cgit v1.2.3 From a1628604fd03850c41163b802d8b7f8d6a110e4c Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 15:23:40 +0100 Subject: ARM: at91: sama5 always uses DT It makes no sense for sama5 support to be enabled if we don't also enable USE_OF. Making this automatic in Kconfig avoids a possible randconfig conflict between the old and new clock support code. Signed-off-by: Arnd Bergmann Acked-by: Nicolas Ferre Acked-by: Jean-Christophe Plagniol-Villard --- arch/arm/mach-at91/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index c1981a66d1f1..9968f208b7df 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -57,6 +57,7 @@ config SOC_SAMA5 select GENERIC_CLOCKEVENTS select MULTI_IRQ_HANDLER select SPARSE_IRQ + select USE_OF menu "Atmel AT91 System-on-Chip" -- cgit v1.2.3 From 4bbef1da789cbd89f57734975e6a211a42b382f5 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 17:50:35 +0100 Subject: ARM: davinci: make dm644x-evm phy fixup conditional We cannot call phy_register_fixup_for_uid() if CONFIG_PHYLIB is not built into the kernel, and we should not enforce that to be built into vmlinux either, because one might want to disable the entire network stack. This change uses a compile-time condition on CONFIG_PHYLIB to remove the call in the cases where it cannot work. Signed-off-by: Arnd Bergmann Acked-by: Sekhar Nori Cc: Kevin Hilman Cc: davinci-linux-open-source@linux.davincidsp.com --- arch/arm/mach-davinci/board-dm644x-evm.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index 987605b78556..3de4dc9a1698 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c @@ -799,11 +799,12 @@ static __init void davinci_evm_init(void) /* irlml6401 switches over 1A, in under 8 msec */ davinci_setup_usb(1000, 8); - soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID; - /* Register the fixup for PHY on DaVinci */ - phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK, - davinci_phy_fixup); - + if (IS_BUILTIN(CONFIG_PHYLIB)) { + soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID; + /* Register the fixup for PHY on DaVinci */ + phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK, + davinci_phy_fixup); + } } MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM") -- cgit v1.2.3 From 06f07c9ec741c6ffffe53a30862fa889d8799a59 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Tue, 18 Feb 2014 12:23:19 +0100 Subject: ARM: davinci: fix Kconfig for DA850_EVM The DAVINCI_DA850_EVM board uses an unusual method to enable the GPIO_PCA953X and KEYBOARD_GPIO_POLLED symbols, which leads to the dependencies on these symbols being ignored. As GPIO_PCA953X actually requires I2C, that can lead to build failures when I2C is disabled. This patch removes the duplicate symbol definitions and instead enables them from the davinci_all_defconfig file. A different question whether we actually want to automatically enable them at all or rather put them into defconfig, but that should be a separate patch. Signed-off-by: Arnd Bergmann Acked-by: Sekhar Nori Cc: Kevin Hilman Cc: davinci-linux-open-source@linux.davincidsp.com --- arch/arm/configs/davinci_all_defconfig | 2 ++ arch/arm/mach-davinci/Kconfig | 5 ----- 2 files changed, 2 insertions(+), 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig index ab2f7378352c..932b932c8856 100644 --- a/arch/arm/configs/davinci_all_defconfig +++ b/arch/arm/configs/davinci_all_defconfig @@ -198,3 +198,5 @@ CONFIG_DEBUG_ERRORS=y # CONFIG_CRYPTO_ANSI_CPRNG is not set # CONFIG_CRYPTO_HW is not set CONFIG_CRC_T10DIF=m +CONFIG_GPIO_PCA953X=y +CONFIG_KEYBOARD_GPIO_POLLED=y diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index a075b3e0c5c7..626d2b82d0f3 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -214,11 +214,6 @@ config DA850_WL12XX Say Y if you want to use a wl1271 expansion card connected to the AM18x EVM. -config GPIO_PCA953X - default MACH_DAVINCI_DA850_EVM - -config KEYBOARD_GPIO_POLLED - default MACH_DAVINCI_DA850_EVM config MACH_TNETV107X bool "TI TNETV107X Reference Platform" -- cgit v1.2.3 From 1df13d9d0fec1bb86445731fbb8552ebadf8936c Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 14:25:07 +0100 Subject: ARM: efm32: select AUTO_ZRELADDR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The efm32 platform does not provide a zreladdr-y line its Makefile.boot, so we always have to use CONFIG_AUTO_ZRELADDR in order to successfully build and link a zImage. Signed-off-by: Arnd Bergmann Cc: Uwe Kleine-König --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e25419817791..f18f8b848517 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -420,6 +420,7 @@ config ARCH_EFM32 bool "Energy Micro efm32" depends on !MMU select ARCH_REQUIRE_GPIOLIB + select AUTO_ZRELADDR select ARM_NVIC # CLKSRC_MMIO is wrong here, but needed until a proper fix is merged, # i.e. CLKSRC_EFM32 selecting CLKSRC_MMIO -- cgit v1.2.3 From 67e108c530c77cf6b939907536f2ceda3b196dd6 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 17:52:39 +0100 Subject: ARM: ep93xx: export ep93xx_chip_revision ep93xx_chip_revision is used by the pata_ep93xx driver, which can be a loadable module. Exporting the symbol avoids a link error in this case. Signed-off-by: Arnd Bergmann Acked-by: Hartley Sweeten Cc: Ryan Mallon --- arch/arm/mach-ep93xx/core.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 157ba88433c9..fd021ba539fe 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -242,6 +242,7 @@ unsigned int ep93xx_chip_revision(void) v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT; return v; } +EXPORT_SYMBOL_GPL(ep93xx_chip_revision); /************************************************************************* * EP93xx GPIO -- cgit v1.2.3 From 1d858f3177eee9dcf7e0a4a933d5269db7875098 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 15 Mar 2014 11:47:14 +0100 Subject: ARM: hisi: fix building without CONFIG_HOTPLUG_CPU The hisi SMP code always uses the hi3xxx_set_cpu() function defined in the hotplug.c file, so we cannot build without this when CONFIG_SMP is enabled. This patch slightly restructures the code so we always build the parts of hotplug.c that we need but just leave out the CPU disable logic if CONFIG_HOTPLUG_CPU is turned off. Signed-off-by: Arnd Bergmann Acked-by: Haojian Zhuang --- arch/arm/mach-hisi/Makefile | 3 +-- arch/arm/mach-hisi/hotplug.c | 2 ++ 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-hisi/Makefile b/arch/arm/mach-hisi/Makefile index 6870058d0a48..2ae1b59267c2 100644 --- a/arch/arm/mach-hisi/Makefile +++ b/arch/arm/mach-hisi/Makefile @@ -3,5 +3,4 @@ # obj-y += hisilicon.o -obj-$(CONFIG_SMP) += platsmp.o -obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o +obj-$(CONFIG_SMP) += platsmp.o hotplug.o diff --git a/arch/arm/mach-hisi/hotplug.c b/arch/arm/mach-hisi/hotplug.c index b909854eee7f..abd441b0c604 100644 --- a/arch/arm/mach-hisi/hotplug.c +++ b/arch/arm/mach-hisi/hotplug.c @@ -178,6 +178,7 @@ static inline void cpu_enter_lowpower(void) : "cc"); } +#ifdef CONFIG_HOTPLUG_CPU void hi3xxx_cpu_die(unsigned int cpu) { cpu_enter_lowpower(); @@ -198,3 +199,4 @@ int hi3xxx_cpu_kill(unsigned int cpu) hi3xxx_set_cpu(cpu, false); return 1; } +#endif -- cgit v1.2.3 From e9c610a49bf7b0f9e2bf231e762b2e82dcbdc63a Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 15 Mar 2014 11:52:49 +0100 Subject: ARM: ixp4xx/omixp: always include linux/leds.h The omixp board code unconditionally defines a gpio-led device, but for some reason includes the header file for this only if CONFIG_LEDS_CLASS is enabled, causing a build error otherwise. Removing the #ifdef fixes the build error with no downsides whatsoever. Signed-off-by: Arnd Bergmann Cc: Imre Kaloz Cc: Krzysztof Halasa --- arch/arm/mach-ixp4xx/omixp-setup.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-ixp4xx/omixp-setup.c b/arch/arm/mach-ixp4xx/omixp-setup.c index 75ef03dc9964..2d494b454376 100644 --- a/arch/arm/mach-ixp4xx/omixp-setup.c +++ b/arch/arm/mach-ixp4xx/omixp-setup.c @@ -17,9 +17,7 @@ #include #include #include -#ifdef CONFIG_LEDS_CLASS #include -#endif #include #include -- cgit v1.2.3 From 926aabde6318db321eb982ded8f5f63cd52fee74 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sun, 16 Mar 2014 20:23:18 +0100 Subject: ARM: ixp4xx: avoid use of PCIBIOS_MIN_MEM in io.h When using CONFIG_IXP4XX_INDIRECT_PCI, we run into a recursive header file dependency between mach/io.h and asm/pci.h, resulting in a build failure: mach-ixp4xx/include/mach/io.h: In function 'is_pci_memory': mach-ixp4xx/include/mach/io.h:53:18: error: 'PCIBIOS_MIN_MEM' undeclared (first use in this function) return (addr >= PCIBIOS_MIN_MEM) && (addr <= 0x4FFFFFFF); ^ mach-ixp4xx/include/mach/io.h:53:18: note: each undeclared identifier is reported only once for each function it appears in We can work around this by referencing the pcibios_min_mem variable directly through an extern declaration, rather than using the macro. Signed-off-by: Arnd Bergmann Cc: Imre Kaloz Cc: Krzysztof Halasa --- arch/arm/mach-ixp4xx/include/mach/io.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h index 5cf30d1b78d2..559c69a47731 100644 --- a/arch/arm/mach-ixp4xx/include/mach/io.h +++ b/arch/arm/mach-ixp4xx/include/mach/io.h @@ -48,9 +48,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); * fallback to the default. */ +extern unsigned long pcibios_min_mem; static inline int is_pci_memory(u32 addr) { - return (addr >= PCIBIOS_MIN_MEM) && (addr <= 0x4FFFFFFF); + return (addr >= pcibios_min_mem) && (addr <= 0x4FFFFFFF); } #define writeb(v, p) __indirect_writeb(v, p) -- cgit v1.2.3 From 48ba81f6fdb7580a5c474da1b14a338e1358e6ab Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Mon, 3 Feb 2014 17:40:14 +0100 Subject: ARM: ixp4xx: fix gpio rework Commit 098e30f6558f8 "ARM: ixp4xx: stop broadcasting the custom GPIO API" changed the internal gpio code of ixp4xx to be accessible only from common.c, but unfortunately that broke the Goramo MultiLink code, which uses this API. This tries to restore the previous state without exposing the API globally again. A better solution might be needed. Signed-off-by: Arnd Bergmann Cc: Linus Walleij Cc: Krzysztof Halasa Cc: Imre Kaloz --- arch/arm/mach-ixp4xx/common.c | 6 +++--- arch/arm/mach-ixp4xx/goramo_mlr.c | 7 +++++++ 2 files changed, 10 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 6d68aed6548a..c751f2f35668 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -99,7 +99,7 @@ void __init ixp4xx_map_io(void) #define IXP4XX_GPIO_CLK_0 14 #define IXP4XX_GPIO_CLK_1 15 -static void gpio_line_config(u8 line, u32 direction) +void gpio_line_config(u8 line, u32 direction) { if (direction == IXP4XX_GPIO_IN) *IXP4XX_GPIO_GPOER |= (1 << line); @@ -107,12 +107,12 @@ static void gpio_line_config(u8 line, u32 direction) *IXP4XX_GPIO_GPOER &= ~(1 << line); } -static void gpio_line_get(u8 line, int *value) +void gpio_line_get(u8 line, int *value) { *value = (*IXP4XX_GPIO_GPINR >> line) & 0x1; } -static void gpio_line_set(u8 line, int value) +void gpio_line_set(u8 line, int value) { if (value == IXP4XX_GPIO_HIGH) *IXP4XX_GPIO_GPOUTR |= (1 << line); diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c index e54ff491c105..5a635c657ea2 100644 --- a/arch/arm/mach-ixp4xx/goramo_mlr.c +++ b/arch/arm/mach-ixp4xx/goramo_mlr.c @@ -17,6 +17,13 @@ #include #include +#define IXP4XX_GPIO_OUT 0x1 +#define IXP4XX_GPIO_IN 0x2 + +void gpio_line_config(u8 line, u32 direction); +void gpio_line_get(u8 line, int *value); +void gpio_line_set(u8 line, int value); + #define SLOT_ETHA 0x0B /* IDSEL = AD21 */ #define SLOT_ETHB 0x0C /* IDSEL = AD20 */ #define SLOT_MPCI 0x0D /* IDSEL = AD19 */ -- cgit v1.2.3 From de94abfa0f6e9b1b58863e85929e727b118df2f1 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 15 Mar 2014 11:34:55 +0100 Subject: ARM: ks8695/og: make PCI setup conditional The 'og' machine tries to always initialized the PCI code, but that may be disabled in Kconfig, leading to a build error. This patch changes the code to use the same Kconfig symbol to decide about calling the ks8695_init_pci function at build time that we use to decide about building the ks8695 PCI support. Signed-off-by: Arnd Bergmann Acked-by: Greg Ungerer --- arch/arm/mach-ks8695/board-og.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-ks8695/board-og.c b/arch/arm/mach-ks8695/board-og.c index 002bc619bb68..f2658168eeff 100644 --- a/arch/arm/mach-ks8695/board-og.c +++ b/arch/arm/mach-ks8695/board-og.c @@ -44,7 +44,8 @@ static void __init og_register_pci(void) if (machine_is_im4004()) ks8695_gpio_interrupt(KS8695_GPIO_1, IRQ_TYPE_LEVEL_LOW); - ks8695_init_pci(&og_pci); + if (IS_ENABLED(CONFIG_PCI)) + ks8695_init_pci(&og_pci); } /* -- cgit v1.2.3 From 22833d55741d5e4941ffe455ea4f9d7564ca246c Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Mon, 17 Feb 2014 20:21:55 +0100 Subject: ARM: lpc32xx: export lpc32xx_return_iram_size This symbol is used by the lpc_eth driver, which may be a loadable module. Signed-off-by: Arnd Bergmann Acked-by: Roland Stigge --- arch/arm/mach-lpc32xx/common.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c index d7aa54c25c59..de03620d7fa7 100644 --- a/arch/arm/mach-lpc32xx/common.c +++ b/arch/arm/mach-lpc32xx/common.c @@ -99,6 +99,7 @@ u32 lpc32xx_return_iram_size(void) return iram_size; } +EXPORT_SYMBOL_GPL(lpc32xx_return_iram_size); /* * Computes PLL rate from PLL register and input clock -- cgit v1.2.3 From 404ed596de6fa3a43416c823fb8ab2ba0e7a1772 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 19 Mar 2014 18:29:36 +0100 Subject: ARM: msm: add missing include of linux/module.h After the restructuring of the module.h and init.h headers, we now need to include this explicitly here. Signed-off-by: Arnd Bergmann Acked-by: David Brown Cc: Daniel Walker Cc: Bryan Huntsman --- arch/arm/mach-msm/dma.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c index f8f6adfa07c6..ba62f02f444d 100644 --- a/arch/arm/mach-msm/dma.c +++ b/arch/arm/mach-msm/dma.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include -- cgit v1.2.3 From d967b0100f8d99480487bce8ead1e0c3affdc511 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sun, 16 Mar 2014 20:57:29 +0100 Subject: ARM: msm: avoid calling debug_ll_addr on !MMU MSM7X00A has an open-coded version of debug_ll_io_init so it can use MT_DEVICE_NONSHARED as required by the platform. However, this fails to build on no-MMU kernels because the debug_ll_addr function is not available. Since the iotable_init function doesn't actually do anyting in this configuration, we can simply get away by enclosing the broken function call in an #ifdef, which seems to be the least ugly workaround. Signed-off-by: Arnd Bergmann Acked-by: David Brown Cc: Daniel Walker Cc: Bryan Huntsman --- arch/arm/mach-msm/io.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c index adc8971c7266..34e09474636d 100644 --- a/arch/arm/mach-msm/io.c +++ b/arch/arm/mach-msm/io.c @@ -78,8 +78,10 @@ void __init msm_map_common_io(void) asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0)); #if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \ defined(CONFIG_DEBUG_MSM_UART3) +#ifdef CONFIG_MMU debug_ll_addr(&msm_io_desc[size - 1].pfn, &msm_io_desc[size - 1].virtual); +#endif msm_io_desc[size - 1].pfn = __phys_to_pfn(msm_io_desc[size - 1].pfn); #endif iotable_init(msm_io_desc, size); -- cgit v1.2.3 From b25a7912eb66f6abe97686fa4ada9ba838df0358 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 15 Mar 2014 11:39:30 +0100 Subject: ARM: msm: export legacy DMA interfaces The msm_sdcc MMC driver and the msm_serial_hs uart driver both use the pre-dmaengine interfaces provided by the MSM platform. Since these drivers can be loadable modules, we should export the functions used in the drivers. Signed-off-by: Arnd Bergmann Acked-by: David Brown Cc: Daniel Walker Cc: Bryan Huntsman --- arch/arm/mach-msm/dma.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c index ba62f02f444d..fb9762464718 100644 --- a/arch/arm/mach-msm/dma.c +++ b/arch/arm/mach-msm/dma.c @@ -78,6 +78,7 @@ void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful) { writel((graceful << 31), DMOV_FLUSH0(id)); } +EXPORT_SYMBOL_GPL(msm_dmov_stop_cmd); void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd) { @@ -116,6 +117,7 @@ void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd) } spin_unlock_irqrestore(&msm_dmov_lock, irq_flags); } +EXPORT_SYMBOL_GPL(msm_dmov_enqueue_cmd); struct msm_dmov_exec_cmdptr_cmd { struct msm_dmov_cmd dmov_cmd; -- cgit v1.2.3 From 84bef11710d14990f8c1213058c17d85b2ec432b Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Sun, 16 Mar 2014 17:57:55 +0100 Subject: ARM: omap1: fix build when !CONFIG_OMAP_32K_TIMER If CONFIG_OMAP_32K_TIMER isn't enabled, we will try to use enable_dyn_sleep which wasn't defined anywhere. In order to fix the problem, we always define enable_dyn_sleep as 0 when !CONFIG_OMAP_32K_TIMER. Signed-off-by: Felipe Balbi Acked-by: Tony Lindgren Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/pm.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 40a1ae319610..dbee729e3b6d 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c @@ -71,7 +71,11 @@ static unsigned int mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_SIZE]; static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE]; static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE]; -#ifdef CONFIG_OMAP_32K_TIMER +#ifndef CONFIG_OMAP_32K_TIMER + +static unsigned short enable_dyn_sleep = 0; + +#else static unsigned short enable_dyn_sleep = 1; -- cgit v1.2.3 From 0b31c53b13343a86bf579aaa7658e8d3ba95b946 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 21 Mar 2014 13:33:03 +0100 Subject: ARM: omap1: don't rely on tps65010 The code for h2 and osk implicitly assumes that the tps65010 driver is built-in, in order to perform the initial regulator setup. This is fine for most real uses, but it does get into the way of build testing with 'make randconfig', since we don't want platforms to implicitly select device drivers and subsystems such as I2C. This patch by contrast changes the board files to not call into the tps65010 driver when that is not built-in, allowing us to build all configurations including some that will not work properly on this hardware. Signed-off-by: Arnd Bergmann Acked-by: Tony Lindgren --- arch/arm/mach-omap1/board-h2.c | 3 +++ arch/arm/mach-omap1/board-osk.c | 3 +++ 2 files changed, 6 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index fd90cafc2e36..65d2acb31498 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -318,6 +318,9 @@ static void __init h2_init_smc91x(void) static int tps_setup(struct i2c_client *client, void *context) { + if (!IS_BUILTIN(CONFIG_TPS65010)) + return -ENOSYS; + tps65010_config_vregs1(TPS_LDO2_ENABLE | TPS_VLDO2_3_0V | TPS_LDO1_ENABLE | TPS_VLDO1_3_0V); diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index d68909b095f1..3a0262156e93 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -191,6 +191,9 @@ static struct platform_device osk5912_tps_leds = { static int osk_tps_setup(struct i2c_client *client, void *context) { + if (!IS_BUILTIN(CONFIG_TPS65010)) + return -ENOSYS; + /* Set GPIO 1 HIGH to disable VBUS power supply; * OHCI driver powers it up/down as needed. */ -- cgit v1.2.3 From 9e1280419eebb48001c9fb078f00f15fa5abe4a6 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Mon, 24 Feb 2014 21:54:49 +0100 Subject: ARM: mvebu: add missing header The definition for SIGBUS may not be visible without including linux/signal.h, as I found during randconfig testing. Adding an explicit include is certainly the right thing to do. Signed-off-by: Arnd Bergmann Acked-by: Jason Cooper Acked-by: Gregory Clement Cc: Andrew Lunn Cc: Sebastian Hesselbarth --- arch/arm/mach-mvebu/armada-370-xp.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c index f6c9d1d85c14..5b793ebb0a24 100644 --- a/arch/arm/mach-mvebu/armada-370-xp.c +++ b/arch/arm/mach-mvebu/armada-370-xp.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include -- cgit v1.2.3 From 32ff4971eca29a90719c88f949d14bf71ce8b655 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 15:31:44 +0100 Subject: ARM: orion5x: make dns323 independent of PHY support The D-Link DNS-323 machine tries to unconditionally select CONFIG_PHYLIB, but that has other dependencies that might not necessarily be enabled, causing random build errors. To work around this, this patch removes the 'select' statement and instead uses a compile-time check to skip the phy_register_fixup_for_uid() call if PHYLIB is not available in the kernel. Signed-off-by: Arnd Bergmann Acked-by: Jason Cooper Cc: Andrew Lunn Cc: Gregory Clement Cc: Sebastian Hesselbarth --- arch/arm/mach-orion5x/Kconfig | 1 - arch/arm/mach-orion5x/dns323-setup.c | 2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig index 2cb2f06c20f5..14f2cae4109c 100644 --- a/arch/arm/mach-orion5x/Kconfig +++ b/arch/arm/mach-orion5x/Kconfig @@ -33,7 +33,6 @@ config MACH_KUROBOX_PRO config MACH_DNS323 bool "D-Link DNS-323" select I2C_BOARDINFO - select PHYLIB help Say 'Y' here if you want your kernel to support the D-Link DNS-323 platform. diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index 70974732cbf0..56edeab17b68 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c @@ -642,6 +642,8 @@ static void __init dns323_init(void) platform_device_register_simple("dns323c-fan", 0, NULL, 0); /* Register fixup for the PHY LEDs */ + if (!IS_BUILTIN(CONFIG_PHYLIB)) + break; phy_register_fixup_for_uid(MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK, dns323c_phy_fixup); -- cgit v1.2.3 From a0ad0fdb88e2693ae0a5144d728b807c9c1176d3 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 16:49:53 +0100 Subject: ARM: pxa: don't "select" SMC91X on MACH_XCEP We normally don't hard-enable Kconfig options just because a board contains a specific piece of hardware. In this case, selecting SMC91X causes a build error, if we don't also enable basic network device driver support. Since the platform has no direct dependency on this driver at link time, we can just remove the 'select' statement. Signed-off-by: Arnd Bergmann Cc: Eric Miao Cc: Russell King Cc: Haojian Zhuang Cc: Daniel Mack --- arch/arm/mach-pxa/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 96100dbf5a2e..5ed977c57de2 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -164,7 +164,6 @@ config MACH_XCEP select MTD_CFI_INTELEXT select MTD_PHYSMAP select PXA25x - select SMC91X help PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash. Tuned for usage in Libera instruments for particle accelerators. -- cgit v1.2.3 From e914f19f03f05e7b1f1e3925cd2545ec57a627a1 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 16:45:00 +0100 Subject: ARM: pxa: enable pxafb unconditionally for some boards The SAAR and TAVOREVB machines try to call functions from the PXAFB frame buffer driver from their platform code, which only works if that driver is built-in. This patch ensures that both the generic frame buffer code and the specific pxafb driver are always enabled when we build a kernel for one of the two boards. Signed-off-by: Arnd Bergmann Cc: Eric Miao Cc: Russell King Cc: Haojian Zhuang Cc: Daniel Mack --- arch/arm/mach-pxa/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 5ed977c57de2..2895cd9d4ba5 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -53,12 +53,16 @@ config MACH_TAVOREVB select CPU_PXA930 select CPU_PXA935 select PXA3xx + select FB + select FB_PXA config MACH_SAAR bool "PXA930 Handheld Platform (aka SAAR)" select CPU_PXA930 select CPU_PXA935 select PXA3xx + select FB + select FB_PXA comment "Third Party Dev Platforms (sorted by vendor name)" -- cgit v1.2.3 From 847e34969d9e51d7f931fc37867adc140c03a61a Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sun, 16 Mar 2014 20:36:28 +0100 Subject: ARM: pxa: fix colibri build The colibri_ohci_init function performs a register access through the io_p2v() macro, which requires the IOMEM macro to be defined. By explicitly including the asm/io.h header file that contains this macro, we avoid the build error: arch/arm/mach-pxa/colibri-evalboard.c: In function 'colibri_ohci_init': arch/arm/mach-pxa/colibri-evalboard.c:68:2: error: implicit declaration of function 'IOMEM' [-Werror=implicit-function-declaration] UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE; Signed-off-by: Arnd Bergmann Cc: Eric Miao Cc: Russell King Cc: Haojian Zhuang Cc: Daniel Mack --- arch/arm/mach-pxa/colibri-evalboard.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/colibri-evalboard.c b/arch/arm/mach-pxa/colibri-evalboard.c index 8404b24240ea..638b0bb88426 100644 --- a/arch/arm/mach-pxa/colibri-evalboard.c +++ b/arch/arm/mach-pxa/colibri-evalboard.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include -- cgit v1.2.3 From 419606ec4d42a37a8b688bb55fee99434ad6954c Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 15 Mar 2014 19:55:17 +0100 Subject: ARM: pxa: remove broken balloon3_gpio_vbus reference balloon3_udc_init() tries to register a balloon3_gpio_vbus device, but this has never been defined in the mainline kernel. To avoid the obvious build failure when this function is enabled, remove the bogus reference here. Signed-off-by: Arnd Bergmann Cc: Eric Miao Cc: Russell King Cc: Haojian Zhuang Cc: Daniel Mack --- arch/arm/mach-pxa/balloon3.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index 2f71b3fbd319..43596e0ed051 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c @@ -331,7 +331,6 @@ static struct pxa2xx_udc_mach_info balloon3_udc_info __initdata = { static void __init balloon3_udc_init(void) { pxa_set_udc_info(&balloon3_udc_info); - platform_device_register(&balloon3_gpio_vbus); } #else static inline void balloon3_udc_init(void) {} -- cgit v1.2.3 From c7dc7d49fa8cddcc1907f94c658989583728099f Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 16:47:35 +0100 Subject: ARM: pxa: select I2C_GPIO only if I2C is on The Arcom/Eurotech VIPER SBC enables the I2C_GPIO driver, but that has a dependency on I2C, and causes build failures if I2C is disabled. To keep existing configurations running while fixing the randconfig problems, this changes the logic to only enable I2C_GPIO if I2C is already enabled. Signed-off-by: Arnd Bergmann Acked-by: Haojian Zhuang Cc: Eric Miao Cc: Russell King Cc: Daniel Mack --- arch/arm/mach-pxa/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 2895cd9d4ba5..6963dee61e19 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -73,8 +73,7 @@ config ARCH_PXA_IDP config ARCH_VIPER bool "Arcom/Eurotech VIPER SBC" select ARCOM_PCMCIA - select HAVE_PWM - select I2C_GPIO + select I2C_GPIO if I2C=y select ISA select PXA25x select PXA_HAVE_ISA_IRQS -- cgit v1.2.3 From edd4c7208b94efebe579171bfc2253362fc8193a Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 16:54:26 +0100 Subject: ARM: pxa: trizeps4 and trizeps4wl use the same file The trizeps4 and trizeps4wl platforms are both implemented using the same board file. Since the trizeps4wl code is a superset of trizeps4, it makes no sense to enable just the latter, but with the current Kconfig logic, it causes the board file not to be built at all. Selecting MACH_TRIZEPS4 from MACH_TRIZEPS4WL ensures that we are actually building the board file. Found during randconfig testing. Signed-off-by: Arnd Bergmann Cc: Eric Miao Cc: Russell King Cc: Haojian Zhuang Cc: Daniel Mack --- arch/arm/mach-pxa/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 6963dee61e19..a280cc42636b 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -183,6 +183,7 @@ config MACH_TRIZEPS4 config MACH_TRIZEPS4WL bool "Keith und Koep Trizeps4-WL DIMM-Module" depends on TRIZEPS_PXA + select MACH_TRIZEPS4 select PXA27x select TRIZEPS_PCMCIA -- cgit v1.2.3 From fa04e209aeb251bebfe6a7a5966a3d5bbd5c13b5 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 26 Feb 2014 17:39:12 +0100 Subject: ARM: rpc: autoselect CPU_SA110 ARCH_RPC no longer supports other CPUs aside from StrongARM110, so we can make the option implicitly selected by the platform and no longer give the option of building a kernel without CPU support. Signed-off-by: Arnd Bergmann Cc: Russell King --- arch/arm/Kconfig | 1 + arch/arm/mm/Kconfig | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f18f8b848517..2d93211c6879 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -698,6 +698,7 @@ config ARCH_RPC select ARCH_MAY_HAVE_PC_FDC select ARCH_SPARSEMEM_ENABLE select ARCH_USES_GETTIMEOFFSET + select CPU_SA110 select FIQ select HAVE_IDE select HAVE_PATA_PLATFORM diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 1f8fed94c2a4..9e832295ecaa 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -264,7 +264,7 @@ config CPU_ARM1026 # SA110 config CPU_SA110 - bool "Support StrongARM(R) SA-110 processor" if ARCH_RPC + bool select CPU_32v3 if ARCH_RPC select CPU_32v4 if !ARCH_RPC select CPU_ABRT_EV4 -- cgit v1.2.3 From ad9faf4c4cb375550d0b1acad604f7b8755563d7 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Mon, 17 Feb 2014 20:25:45 +0100 Subject: ARM: footbridge: don't build floppy code for addin mode The ARCH_EBSA285_ADDIN platform does not provide the ISA_DMA API, which is required by the floppy driver. Let's ensure that the floppy code can only be built when ISA_DMA is also enabled, by moving the select statement into ARCH_EBSA285_HOST. Signed-off-by: Arnd Bergmann Cc: Russell King --- arch/arm/mach-footbridge/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-footbridge/Kconfig b/arch/arm/mach-footbridge/Kconfig index fba55fb9f47d..07152d00fc50 100644 --- a/arch/arm/mach-footbridge/Kconfig +++ b/arch/arm/mach-footbridge/Kconfig @@ -52,6 +52,7 @@ config ARCH_EBSA285_HOST select FOOTBRIDGE_HOST select ISA select ISA_DMA + select ARCH_MAY_HAVE_PC_FDC select PCI help Say Y here if you intend to run this kernel on the EBSA285 card @@ -94,6 +95,5 @@ config FOOTBRIDGE_ADDIN # EBSA285 board in either host or addin mode config ARCH_EBSA285 bool - select ARCH_MAY_HAVE_PC_FDC endif -- cgit v1.2.3 From 570977a1fc5d4c1ade5107c03336b0845aed7005 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 15 Mar 2014 11:27:28 +0100 Subject: ARM: footbridge: fix build with PCI disabled The dc21285.c source file cannot be built when CONFIG_PCI is disabled, because it calls a number of PCI core interfaces. This changes the Makefile so we don't include this file in the build if CONFIG_PCI is disabled. No other code references anything defined inside of this file in this case. Signed-off-by: Arnd Bergmann Cc: Russell King --- arch/arm/mach-footbridge/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-footbridge/Makefile b/arch/arm/mach-footbridge/Makefile index 0b64dd430d61..c3faa3bc84dd 100644 --- a/arch/arm/mach-footbridge/Makefile +++ b/arch/arm/mach-footbridge/Makefile @@ -4,11 +4,12 @@ # Object file lists. -obj-y := common.o dc21285.o dma.o isa-irq.o +obj-y := common.o dma.o isa-irq.o obj-m := obj-n := obj- := +pci-y += dc21285.o pci-$(CONFIG_ARCH_CATS) += cats-pci.o pci-$(CONFIG_ARCH_EBSA285_HOST) += ebsa285-pci.o pci-$(CONFIG_ARCH_NETWINDER) += netwinder-pci.o -- cgit v1.2.3 From 617d1464ab1a572d3a1e46c7cea5d7247ed45d8a Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 15 Mar 2014 11:30:18 +0100 Subject: ARM: footbridge: make screen_info setup conditional The global screen_info structure is used to communicate data about the console from platform code to the console driver, but is only defined on ARM if either the VGA or dummy consoles are in use. This changes the footbridge code so we don't try to access this structure in case it is not defined, which prevents a possible randconfig build error. Signed-off-by: Arnd Bergmann Cc: Russell King --- arch/arm/mach-footbridge/cats-hw.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c index 9669cc0b6318..da0415094856 100644 --- a/arch/arm/mach-footbridge/cats-hw.c +++ b/arch/arm/mach-footbridge/cats-hw.c @@ -78,9 +78,11 @@ __initcall(cats_hw_init); static void __init fixup_cats(struct tag *tags, char **cmdline, struct meminfo *mi) { +#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE) screen_info.orig_video_lines = 25; screen_info.orig_video_points = 16; screen_info.orig_y = 24; +#endif } MACHINE_START(CATS, "Chalice-CATS") -- cgit v1.2.3 From dd94d3558947756b102b1487911acd925224a38c Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sun, 16 Mar 2014 21:00:25 +0100 Subject: ARM: realview: fix sparsemem build Commit b713aa0b15 "ARM: fix asm/memory.h build error" broke some configurations on mach-realview with sparsemem enabled, which is missing a definition of PHYS_OFFSET: arch/arm/include/asm/memory.h:268:42: error: 'PHYS_OFFSET' undeclared (first use in this function) #define PHYS_PFN_OFFSET ((unsigned long)(PHYS_OFFSET >> PAGE_SHIFT)) arch/arm/include/asm/dma-mapping.h:104:9: note: in expansion of macro 'PHYS_PFN_OFFSET' return PHYS_PFN_OFFSET + dma_to_pfn(dev, *dev->dma_mask); An easy workaround is for realview to define PHYS_OFFSET itself, in the same way we define it for platforms that don't have a private __virt_to_phys function. Signed-off-by: Arnd Bergmann Cc: Russell King Cc: Linus Walleij --- arch/arm/mach-realview/include/mach/memory.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-realview/include/mach/memory.h b/arch/arm/mach-realview/include/mach/memory.h index 2022e092f0ca..db09170e3832 100644 --- a/arch/arm/mach-realview/include/mach/memory.h +++ b/arch/arm/mach-realview/include/mach/memory.h @@ -56,6 +56,8 @@ #define PAGE_OFFSET1 (PAGE_OFFSET + 0x10000000) #define PAGE_OFFSET2 (PAGE_OFFSET + 0x30000000) +#define PHYS_OFFSET PLAT_PHYS_OFFSET + #define __phys_to_virt(phys) \ ((phys) >= 0x80000000 ? (phys) - 0x80000000 + PAGE_OFFSET2 : \ (phys) >= 0x20000000 ? (phys) - 0x20000000 + PAGE_OFFSET1 : \ -- cgit v1.2.3 From 152c55553eca4677305649abd6cc909f9c21ff26 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 13:03:28 +0100 Subject: ARM: integrator: only select pl01x if TTY is enabled Building the integrator platform without TTY support currently results in a build failure because we always turn on the pl010 or pl011 drivers. Changing this to a conditional 'select' statement enables us to build more random configurations, although it should have little impact for practical configurations. Signed-off-by: Arnd Bergmann Cc: Russell King Cc: Linus Walleij --- arch/arm/mach-integrator/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig index abeff25532ab..271a255864d2 100644 --- a/arch/arm/mach-integrator/Kconfig +++ b/arch/arm/mach-integrator/Kconfig @@ -6,8 +6,8 @@ config ARCH_INTEGRATOR_AP bool "Support Integrator/AP and Integrator/PP2 platforms" select CLKSRC_MMIO select MIGHT_HAVE_PCI - select SERIAL_AMBA_PL010 - select SERIAL_AMBA_PL010_CONSOLE + select SERIAL_AMBA_PL010 if TTY + select SERIAL_AMBA_PL010_CONSOLE if TTY select SOC_BUS help Include support for the ARM(R) Integrator/AP and @@ -18,8 +18,8 @@ config ARCH_INTEGRATOR_CP select ARCH_CINTEGRATOR select ARM_TIMER_SP804 select PLAT_VERSATILE_CLCD - select SERIAL_AMBA_PL011 - select SERIAL_AMBA_PL011_CONSOLE + select SERIAL_AMBA_PL011 if TTY + select SERIAL_AMBA_PL011_CONSOLE if TTY select SOC_BUS help Include support for the ARM(R) Integrator CP platform. -- cgit v1.2.3 From 37373f161b14a1462dcc3331548417a65f749636 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 12 Feb 2014 21:22:13 +0100 Subject: ARM: s3c24xx: MINI2440 needs I2C for EEPROM_AT24 If I2C is disabled, we cannot build the AT24 driver, so we should not select it. Signed-off-by: Arnd Bergmann Acked-by: Kukjin Kim Cc: Tomasz Figa Cc: Ben Dooks --- arch/arm/mach-s3c24xx/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig index d876431d64c0..bff3cc37448f 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c24xx/Kconfig @@ -537,7 +537,7 @@ config MACH_AT2440EVB config MACH_MINI2440 bool "MINI2440 development board" - select EEPROM_AT24 + select EEPROM_AT24 if I2C select LEDS_CLASS select LEDS_TRIGGERS select LEDS_TRIGGER_BACKLIGHT -- cgit v1.2.3 From 645e27b05203d1535819390bc40660c1669e6093 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 15 Mar 2014 11:43:39 +0100 Subject: ARM: s3c24xx: fix gta02 build error The gta02 has always been broken in the case when CONFIG_PCF50633_ADC is not used, since gta02_charger_worker then passes a nonexisting variable into the pcf50633_mbc_usb_curlim_set() function. This addresses the obvious typo by using the variable that is used everywhere else in this file. Signed-off-by: Arnd Bergmann Acked-by: Kukjin Kim Cc: Tomasz Figa Cc: Ben Dooks --- arch/arm/mach-s3c24xx/mach-gta02.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c index d9170e9f8ccd..ee7bb2905a99 100644 --- a/arch/arm/mach-s3c24xx/mach-gta02.c +++ b/arch/arm/mach-s3c24xx/mach-gta02.c @@ -196,7 +196,7 @@ static void gta02_charger_worker(struct work_struct *work) * If the PCF50633 ADC is disabled we fallback to a * 100mA limit for safety. */ - pcf50633_mbc_usb_curlim_set(pcf, 100); + pcf50633_mbc_usb_curlim_set(gta02_pcf, 100); #endif } -- cgit v1.2.3 From f88309c687002e28d144975a2075babb40a12835 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 21 Mar 2014 13:49:04 +0100 Subject: ARM: s3c24xx: osiris dvs needs tps65010 The osiris-dvs driver calls functions exported by the tps65010 driver, so we have to ensure that driver is enabled first. Using 'select' here doesn't work all that well, because it requires I2C to be enabled in turn. Signed-off-by: Arnd Bergmann --- arch/arm/mach-s3c24xx/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig index bff3cc37448f..f2727f2cc661 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c24xx/Kconfig @@ -573,7 +573,7 @@ config MACH_OSIRIS config MACH_OSIRIS_DVS tristate "Simtec IM2440D20 (OSIRIS) Dynamic Voltage Scaling driver" depends on MACH_OSIRIS - select TPS65010 + depends on TPS65010 help Say Y/M here if you want to have dynamic voltage scaling support on the Simtec IM2440D20 (OSIRIS) module via the TPS65011. -- cgit v1.2.3 From b25a1b64e19acfe1e497ef4391c775321084b1ba Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 26 Feb 2014 21:31:18 +0100 Subject: ARM: s3c64xx: MACH_SMDK6400 needs HSMMC1 This board uses both MMC controllers, so we need to enable the Kconfig option to define the platform data. Signed-off-by: Arnd Bergmann Acked-by: Kukjin Kim Cc: Tomasz Figa Cc: Ben Dooks --- arch/arm/mach-s3c64xx/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index 64f04e6f9c31..3136d86b0d6e 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig @@ -86,8 +86,7 @@ config MACH_SMDK6400 bool "SMDK6400" select CPU_S3C6400 select S3C64XX_SETUP_SDHCI - select S3C_DEV_HSMMC - select S3C_DEV_NAND + select S3C_DEV_HSMMC1 help Machine support for the Samsung SMDK6400 -- cgit v1.2.3 From 4ab75a3f3ddb840cc93446ebbcad8838e337d53f Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 14:35:38 +0100 Subject: ARM: s3c64xx: select power domains only when used The power domain code is only available when CONFIG_PM is enabled, so we must not select that unconditionally for s3c64xx. Changing it to 'select PM_GENERIC_DOMAINS if PM' mirrors what we do on other platforms, and fixes a possible randconfig build bug. Signed-off-by: Arnd Bergmann Acked-by: Kukjin Kim Cc: Tomasz Figa Cc: Ben Dooks --- arch/arm/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2d93211c6879..c076165545a2 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -766,7 +766,7 @@ config ARCH_S3C64XX select HAVE_TCM select NO_IOPORT select PLAT_SAMSUNG - select PM_GENERIC_DOMAINS + select PM_GENERIC_DOMAINS if PM select S3C_DEV_NAND select S3C_GPIO_TRACK select SAMSUNG_ATAGS -- cgit v1.2.3 From 4f579c0391320285ac48551efd9715a0e8366379 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 15 Mar 2014 20:08:48 +0100 Subject: ARM: s5p64x0: fix building with only one soc type The s5p64x0 platform supports two distinct SoCs, s5p6440 and s5p6450, and in the normal configuration, both are enabled. However if we build a kernel that only enables one of the two, the #ifdef logic in common.c breaks down, as some of the functions declared in the header are defined to NULL using the preprocessor but then defined anyway. This patch cleans up the mess and ensures that each function has either exactly one C declaration and one matching C definition, or we have a NULL defined function pointer but no C definition. Signed-off-by: Arnd Bergmann Acked-by: Kukjin Kim Cc: Tomasz Figa Cc: Ben Dooks --- arch/arm/mach-s5p64x0/common.c | 18 ++++++++++++++++-- arch/arm/mach-s5p64x0/common.h | 5 +---- 2 files changed, 17 insertions(+), 6 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c index 42e14f2e7ca7..f07edc304efb 100644 --- a/arch/arm/mach-s5p64x0/common.c +++ b/arch/arm/mach-s5p64x0/common.c @@ -205,6 +205,7 @@ void __init s5p64x0_init_io(struct map_desc *mach_desc, int size) samsung_pwm_set_platdata(&s5p64x0_pwm_variant); } +#ifdef CONFIG_CPU_S5P6440 void __init s5p6440_map_io(void) { /* initialize any device information early */ @@ -218,7 +219,9 @@ void __init s5p6440_map_io(void) iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); } +#endif +#ifdef CONFIG_CPU_S5P6450 void __init s5p6450_map_io(void) { /* initialize any device information early */ @@ -232,13 +235,14 @@ void __init s5p6450_map_io(void) iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc)); } +#endif /* * s5p64x0_init_clocks * * register and setup the CPU clocks */ - +#ifdef CONFIG_CPU_S5P6440 void __init s5p6440_init_clocks(int xtal) { printk(KERN_DEBUG "%s: initializing clocks\n", __func__); @@ -248,7 +252,9 @@ void __init s5p6440_init_clocks(int xtal) s5p6440_register_clocks(); s5p6440_setup_clocks(); } +#endif +#ifdef CONFIG_CPU_S5P6450 void __init s5p6450_init_clocks(int xtal) { printk(KERN_DEBUG "%s: initializing clocks\n", __func__); @@ -258,13 +264,14 @@ void __init s5p6450_init_clocks(int xtal) s5p6450_register_clocks(); s5p6450_setup_clocks(); } +#endif /* * s5p64x0_init_irq * * register the CPU interrupts */ - +#ifdef CONFIG_CPU_S5P6440 void __init s5p6440_init_irq(void) { /* S5P6440 supports 2 VIC */ @@ -279,7 +286,9 @@ void __init s5p6440_init_irq(void) s5p_init_irq(vic, ARRAY_SIZE(vic)); } +#endif +#ifdef CONFIG_CPU_S5P6450 void __init s5p6450_init_irq(void) { /* S5P6450 supports only 2 VIC */ @@ -294,6 +303,7 @@ void __init s5p6450_init_irq(void) s5p_init_irq(vic, ARRAY_SIZE(vic)); } +#endif struct bus_type s5p64x0_subsys = { .name = "s5p64x0-core", @@ -321,6 +331,7 @@ int __init s5p64x0_init(void) } /* uart registration process */ +#ifdef CONFIG_CPU_S5P6440 void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no) { int uart; @@ -332,11 +343,14 @@ void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no) s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); } +#endif +#ifdef CONFIG_CPU_S5P6450 void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no) { s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); } +#endif #define eint_offset(irq) ((irq) - IRQ_EINT(0)) diff --git a/arch/arm/mach-s5p64x0/common.h b/arch/arm/mach-s5p64x0/common.h index f3a9b43cba4a..cbe7f3d731d0 100644 --- a/arch/arm/mach-s5p64x0/common.h +++ b/arch/arm/mach-s5p64x0/common.h @@ -25,10 +25,10 @@ void s5p6450_register_clocks(void); void s5p6450_setup_clocks(void); void s5p64x0_restart(enum reboot_mode mode, const char *cmd); +extern int s5p64x0_init(void); #ifdef CONFIG_CPU_S5P6440 -extern int s5p64x0_init(void); extern void s5p6440_map_io(void); extern void s5p6440_init_clocks(int xtal); @@ -38,12 +38,10 @@ extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no); #define s5p6440_init_clocks NULL #define s5p6440_init_uarts NULL #define s5p6440_map_io NULL -#define s5p64x0_init NULL #endif #ifdef CONFIG_CPU_S5P6450 -extern int s5p64x0_init(void); extern void s5p6450_map_io(void); extern void s5p6450_init_clocks(int xtal); @@ -53,7 +51,6 @@ extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no); #define s5p6450_init_clocks NULL #define s5p6450_init_uarts NULL #define s5p6450_map_io NULL -#define s5p64x0_init NULL #endif #endif /* __ARCH_ARM_MACH_S5P64X0_COMMON_H */ -- cgit v1.2.3 From 943fa72629d9f5e8d3df5fc39351fe3360ff03cb Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 16:39:20 +0100 Subject: ARM: s5pv210: enable IDE support in MACH_TORBRECK Building MACH_TORBRECK by itself results in a build error because we try to reference the s3c_device_cfcon definition that is hidden inside CONFIG_SAMSUNG_DEV_IDE. This changes the Kconfig logic to ensure that option is enabled when we need it. Signed-off-by: Arnd Bergmann Acked-by: Kukjin Kim Cc: Tomasz Figa Cc: Ben Dooks --- arch/arm/mach-s5pv210/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index caaedafbbf5f..8c3abe521757 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig @@ -189,6 +189,7 @@ config MACH_TORBRECK select S5PV210_SETUP_I2C1 select S5PV210_SETUP_I2C2 select S5PV210_SETUP_SDHCI + select SAMSUNG_DEV_IDE help Machine support for aESOP Torbreck -- cgit v1.2.3 From 0443a653982942da4237b8344027bbb86e4b83a1 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 26 Feb 2014 17:55:35 +0100 Subject: ARM: samsung: allow serial driver to be disabled If CONFIG_SERIAL_SAMSUNG is disabled, we run into build errors with some samsung platforms. This adds a couple of #ifdef statements to hopefully deal with this more gracefully. Signed-off-by: Arnd Bergmann Acked-by: Kukjin Kim Cc: Tomasz Figa Cc: Ben Dooks --- arch/arm/mach-s3c64xx/irq-pm.c | 12 +++++++++--- arch/arm/mach-s5p64x0/irq-pm.c | 6 ++++++ arch/arm/plat-samsung/init.c | 4 ++++ 3 files changed, 19 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-s3c64xx/irq-pm.c b/arch/arm/mach-s3c64xx/irq-pm.c index 1649c0d1c1b8..ddf65583a5d8 100644 --- a/arch/arm/mach-s3c64xx/irq-pm.c +++ b/arch/arm/mach-s3c64xx/irq-pm.c @@ -55,7 +55,13 @@ static struct irq_grp_save { u32 mask; } eint_grp_save[5]; -static u32 irq_uart_mask[CONFIG_SERIAL_SAMSUNG_UARTS]; +#ifndef CONFIG_SERIAL_SAMSUNG_UARTS +#define SERIAL_SAMSUNG_UARTS 0 +#else +#define SERIAL_SAMSUNG_UARTS CONFIG_SERIAL_SAMSUNG_UARTS +#endif + +static u32 irq_uart_mask[SERIAL_SAMSUNG_UARTS]; static int s3c64xx_irq_pm_suspend(void) { @@ -66,7 +72,7 @@ static int s3c64xx_irq_pm_suspend(void) s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); - for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++) + for (i = 0; i < SERIAL_SAMSUNG_UARTS; i++) irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM); for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) { @@ -87,7 +93,7 @@ static void s3c64xx_irq_pm_resume(void) s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); - for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++) + for (i = 0; i < SERIAL_SAMSUNG_UARTS; i++) __raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM); for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) { diff --git a/arch/arm/mach-s5p64x0/irq-pm.c b/arch/arm/mach-s5p64x0/irq-pm.c index 3e6f2456ee9d..d5f0fd66b635 100644 --- a/arch/arm/mach-s5p64x0/irq-pm.c +++ b/arch/arm/mach-s5p64x0/irq-pm.c @@ -34,7 +34,9 @@ static struct irq_grp_save { u32 mask; } eint_grp_save[4]; +#ifdef CONFIG_SERIAL_SAMSUNG static u32 irq_uart_mask[CONFIG_SERIAL_SAMSUNG_UARTS]; +#endif static int s5p64x0_irq_pm_suspend(void) { @@ -45,8 +47,10 @@ static int s5p64x0_irq_pm_suspend(void) s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); +#ifdef CONFIG_SERIAL_SAMSUNG for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++) irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM); +#endif for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) { grp->con = __raw_readl(S5P64X0_EINT12CON + (i * 4)); @@ -66,8 +70,10 @@ static void s5p64x0_irq_pm_resume(void) s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); +#ifdef CONFIG_SERIAL_SAMSUNG for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++) __raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM); +#endif for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) { __raw_writel(grp->con, S5P64X0_EINT12CON + (i * 4)); diff --git a/arch/arm/plat-samsung/init.c b/arch/arm/plat-samsung/init.c index aa9511b6914a..a30df396ca34 100644 --- a/arch/arm/plat-samsung/init.c +++ b/arch/arm/plat-samsung/init.c @@ -97,7 +97,9 @@ void __init s3c24xx_init_clocks(int xtal) #if IS_ENABLED(CONFIG_SAMSUNG_ATAGS) static int nr_uarts __initdata = 0; +#ifdef CONFIG_SERIAL_SAMSUNG_UARTS static struct s3c2410_uartcfg uart_cfgs[CONFIG_SERIAL_SAMSUNG_UARTS]; +#endif /* s3c24xx_init_uartdevs * @@ -112,6 +114,7 @@ void __init s3c24xx_init_uartdevs(char *name, struct s3c24xx_uart_resources *res, struct s3c2410_uartcfg *cfg, int no) { +#ifdef CONFIG_SERIAL_SAMSUNG_UARTS struct platform_device *platdev; struct s3c2410_uartcfg *cfgptr = uart_cfgs; struct s3c24xx_uart_resources *resp; @@ -134,6 +137,7 @@ void __init s3c24xx_init_uartdevs(char *name, } nr_uarts = no; +#endif } void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no) -- cgit v1.2.3 From af960151efc1ccc7d7259f8795156356a8bee3d3 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 16:42:48 +0100 Subject: ARM: samsung: fix SAMSUNG_PM_DEBUG Kconfig logic The suspend debug code for Samsung has multiple dependencies that we should not unconditionally enable. In particular, we rely on the DEBUG_S3C_UART setting, which in turn depends on the samsung UART driver. Signed-off-off-by: Arnd Bergmann Acked-by: Kukjin Kim Cc: Tomasz Figa Cc: Ben Dooks --- arch/arm/plat-samsung/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 58645a58d0d8..26ff15c130ff 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -427,8 +427,7 @@ comment "Power management" config SAMSUNG_PM_DEBUG bool "S3C2410 PM Suspend debug" - depends on PM - select DEBUG_LL + depends on PM && DEBUG_KERNEL && DEBUG_S3C_UART help Say Y here if you want verbose debugging from the PM Suspend and Resume code. See -- cgit v1.2.3 From 335cce74f29863a0ba415e5a76ee63c63caa774e Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 14:11:16 +0100 Subject: ARM: samsung: select ATAGS where necessary Most of the Samsung platforms do not yet allow building with DT at all, so we should select CONFIG_ATAGS for now in all cases we also select CONFIG_SAMSUNG_ATAGS. Found during randconfig testing. Signed-off-by: Arnd Bergmann Acked-by: Kukjin Kim Cc: Tomasz Figa Cc: Ben Dooks --- arch/arm/Kconfig | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index c076165545a2..3dad96105ce4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -733,6 +733,7 @@ config ARCH_S3C24XX bool "Samsung S3C24XX SoCs" select ARCH_HAS_CPUFREQ select ARCH_REQUIRE_GPIOLIB + select ATAGS select CLKDEV_LOOKUP select CLKSRC_SAMSUNG_PWM select GENERIC_CLOCKEVENTS @@ -755,6 +756,7 @@ config ARCH_S3C64XX select ARCH_REQUIRE_GPIOLIB select ARM_AMBA select ARM_VIC + select ATAGS select CLKDEV_LOOKUP select CLKSRC_SAMSUNG_PWM select COMMON_CLK @@ -778,6 +780,7 @@ config ARCH_S3C64XX config ARCH_S5P64X0 bool "Samsung S5P6440 S5P6450" + select ATAGS select CLKDEV_LOOKUP select CLKSRC_SAMSUNG_PWM select CPU_V6 @@ -796,6 +799,7 @@ config ARCH_S5P64X0 config ARCH_S5PC100 bool "Samsung S5PC100" select ARCH_REQUIRE_GPIOLIB + select ATAGS select CLKDEV_LOOKUP select CLKSRC_SAMSUNG_PWM select CPU_V7 @@ -815,6 +819,7 @@ config ARCH_S5PV210 select ARCH_HAS_CPUFREQ select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_SPARSEMEM_ENABLE + select ATAGS select CLKDEV_LOOKUP select CLKSRC_SAMSUNG_PWM select CPU_V7 -- cgit v1.2.3 From 714e3302538ab1eff926e64ee56a1b50c9b0ca2b Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Tue, 18 Mar 2014 10:02:26 +0100 Subject: ARM: samsung: select CRC32 for SAMSUNG_PM_CHECK The Samsung pm_check code uses the crc32 library code, which can be built as a loadable module, in which case we get a link error building the kernel. A better solution is to use 'select CRC32', which is what all other users of this code do, as it ensures it is always built-in. Signed-off-by: Arnd Bergmann Acked-by: Kukjin Kim Cc: Tomasz Figa Cc: Ben Dooks --- arch/arm/plat-samsung/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 26ff15c130ff..b57e922f1614 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -444,7 +444,8 @@ config S3C_PM_DEBUG_LED_SMDK config SAMSUNG_PM_CHECK bool "S3C2410 PM Suspend Memory CRC" - depends on PM && CRC32 + depends on PM + select CRC32 help Enable the PM code's memory area checksum over sleep. This option will generate CRCs of all blocks of memory, and store them before -- cgit v1.2.3 From 39378e4143f9b698e5bd1a0a6fadf13224fee015 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 13 Mar 2014 17:25:52 +0100 Subject: ARM: exynos: fix l2x0 saved regs handling The exynos4_l2x0_cache_init function tries to flush the data cache for the location of the saved l2x0 registers and pass the physical address to the s5p-sleep implementation. However, the s5p-sleep code is optional, and if it is disabled, we get a linker error here when the l2x0_regs_phys variable does not exist. To solve this, use a compile-time conditional to drop this code if we don't want it. Signed-off-by: Arnd Bergmann Acked-by: Kukjin Kim Cc: Tomasz Figa Cc: Ben Dooks --- arch/arm/mach-exynos/common.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index f18be40e5b21..8d0042c9d4d3 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -404,8 +404,10 @@ static int __init exynos4_l2x0_cache_init(void) if (ret) return ret; - l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs); - clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long)); + if (IS_ENABLED(CONFIG_S5P_SLEEP)) { + l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs); + clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long)); + } return 0; } early_initcall(exynos4_l2x0_cache_init); -- cgit v1.2.3 From 96c3a2506b1bf17bd4e8d1abe8220912925ca279 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 19 Mar 2014 18:29:36 +0100 Subject: ARM: exynos: add missing include of linux/module.h After the restructuring of the module.h and init.h headers, we now need to include this explicitly here. Signed-off-by: Arnd Bergmann Acked-by: Kukjin Kim Cc: Tomasz Figa Cc: Ben Dooks --- arch/arm/mach-exynos/cpuidle.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c index f57cb91f02aa..93d2decc112d 100644 --- a/arch/arm/mach-exynos/cpuidle.c +++ b/arch/arm/mach-exynos/cpuidle.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include -- cgit v1.2.3 From 1146b600044de64af0ef775025731eeef1fa2189 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sun, 16 Mar 2014 18:04:54 +0100 Subject: ARM: sunxi: fix build for THUMB2_KERNEL Building an SMP kernel for the sunxi platform with THUMB2 instructions fails with this error at the moment: headsmp.S:7: Error: Thumb encoding does not support an immediate here -- `msr cpsr_fsxc,#0xd3' Since the generic secondary_startup function already does the same thing in a safe way, we can just drop the private sunxi implementation and jump straight to secondary_startup. Signed-off-by: Arnd Bergmann Cc: Maxime Ripard --- arch/arm/include/asm/smp.h | 1 + arch/arm/mach-sunxi/Makefile | 2 +- arch/arm/mach-sunxi/headsmp.S | 9 --------- arch/arm/mach-sunxi/platsmp.c | 2 +- 4 files changed, 3 insertions(+), 11 deletions(-) delete mode 100644 arch/arm/mach-sunxi/headsmp.S (limited to 'arch/arm') diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h index 22a3b9b5d4a1..4157aec4e307 100644 --- a/arch/arm/include/asm/smp.h +++ b/arch/arm/include/asm/smp.h @@ -74,6 +74,7 @@ struct secondary_data { }; extern struct secondary_data secondary_data; extern volatile int pen_release; +extern void secondary_startup(void); extern int __cpu_disable(void); diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile index d9397202d6ec..27b168f121a1 100644 --- a/arch/arm/mach-sunxi/Makefile +++ b/arch/arm/mach-sunxi/Makefile @@ -1,2 +1,2 @@ obj-$(CONFIG_ARCH_SUNXI) += sunxi.o -obj-$(CONFIG_SMP) += platsmp.o headsmp.o +obj-$(CONFIG_SMP) += platsmp.o diff --git a/arch/arm/mach-sunxi/headsmp.S b/arch/arm/mach-sunxi/headsmp.S deleted file mode 100644 index a10d494fb37b..000000000000 --- a/arch/arm/mach-sunxi/headsmp.S +++ /dev/null @@ -1,9 +0,0 @@ -#include -#include - - .section ".text.head", "ax" - -ENTRY(sun6i_secondary_startup) - msr cpsr_fsxc, #0xd3 - b secondary_startup -ENDPROC(sun6i_secondary_startup) diff --git a/arch/arm/mach-sunxi/platsmp.c b/arch/arm/mach-sunxi/platsmp.c index 7b141d8342a1..0c7dbce033cc 100644 --- a/arch/arm/mach-sunxi/platsmp.c +++ b/arch/arm/mach-sunxi/platsmp.c @@ -82,7 +82,7 @@ static int sun6i_smp_boot_secondary(unsigned int cpu, spin_lock(&cpu_lock); /* Set CPU boot address */ - writel(virt_to_phys(sun6i_secondary_startup), + writel(virt_to_phys(secondary_startup), cpucfg_membase + CPUCFG_PRIVATE0_REG); /* Assert the CPU core in reset */ -- cgit v1.2.3 From 9f3ba4567e8d11de89673afea174d206ca9446f6 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 27 Feb 2014 13:42:37 +0100 Subject: ARM: tegra: make debug_ll code build for ARMv6 In a combined ARMv6/v7 kernel, we cannot use the movt/movw instructions to load an immediate, as they are not valid on ARMv6. This changes the file to use an indirect load instead, as lots of other implementations do. Signed-off-by: Arnd Bergmann Tested-by: Stephen Warren Acked-by: Stephen Warren Cc: Thierry Reding Cc: linux-tegra@vger.kernel.org --- arch/arm/include/debug/tegra.S | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/debug/tegra.S b/arch/arm/include/debug/tegra.S index f98763f0bc17..3bc80599c022 100644 --- a/arch/arm/include/debug/tegra.S +++ b/arch/arm/include/debug/tegra.S @@ -53,8 +53,7 @@ #define checkuart(rp, rv, lhu, bit, uart) \ /* Load address of CLK_RST register */ \ - movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \ - movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \ + ldr rp, =TEGRA_CLK_RST_DEVICES_##lhu ; \ /* Load value from CLK_RST register */ \ ldr rp, [rp, #0] ; \ /* Test UART's reset bit */ \ @@ -62,8 +61,7 @@ /* If set, can't use UART; jump to save no UART */ \ bne 90f ; \ /* Load address of CLK_OUT_ENB register */ \ - movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \ - movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \ + ldr rp, =TEGRA_CLK_OUT_ENB_##lhu ; \ /* Load value from CLK_OUT_ENB register */ \ ldr rp, [rp, #0] ; \ /* Test UART's clock enable bit */ \ @@ -71,8 +69,7 @@ /* If clear, can't use UART; jump to save no UART */ \ beq 90f ; \ /* Passed all tests, load address of UART registers */ \ - movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \ - movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \ + ldr rp, =TEGRA_UART##uart##_BASE ; \ /* Jump to save UART address */ \ b 91f @@ -90,15 +87,16 @@ #ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA /* Check ODMDATA */ -10: movw \rp, #TEGRA_PMC_SCRATCH20 & 0xffff - movt \rp, #TEGRA_PMC_SCRATCH20 >> 16 +10: ldr \rp, =TEGRA_PMC_SCRATCH20 ldr \rp, [\rp, #0] @ Load PMC_SCRATCH20 - ubfx \rv, \rp, #18, #2 @ 19:18 are console type + lsr \rv, \rp, #18 @ 19:18 are console type + and \rv, \rv, #3 cmp \rv, #2 @ 2 and 3 mean DCC, UART beq 11f @ some boards swap the meaning cmp \rv, #3 @ so accept either bne 90f -11: ubfx \rv, \rp, #15, #3 @ 17:15 are UART ID +11: lsr \rv, \rp, #15 @ 17:15 are UART ID + and \rv, #7 cmp \rv, #0 @ UART 0? beq 20f cmp \rv, #1 @ UART 1? -- cgit v1.2.3 From 9c9c6c55a887dfe4e68d48d0829e412ed4f14ca9 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 26 Mar 2014 23:03:09 +0100 Subject: Revert "ARM: ixp4xx: fix gpio rework" This reverts commit 48ba81f6fdb7580a5c474da1b14a338e1358e6ab. A better fix was sent by Krzysztof Halasa. Signed-off-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/common.c | 6 +++--- arch/arm/mach-ixp4xx/goramo_mlr.c | 7 ------- 2 files changed, 3 insertions(+), 10 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index eef39c7ad0cf..df82a2b4a546 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -100,7 +100,7 @@ void __init ixp4xx_map_io(void) #define IXP4XX_GPIO_CLK_0 14 #define IXP4XX_GPIO_CLK_1 15 -void gpio_line_config(u8 line, u32 direction) +static void gpio_line_config(u8 line, u32 direction) { if (direction == IXP4XX_GPIO_IN) *IXP4XX_GPIO_GPOER |= (1 << line); @@ -108,12 +108,12 @@ void gpio_line_config(u8 line, u32 direction) *IXP4XX_GPIO_GPOER &= ~(1 << line); } -void gpio_line_get(u8 line, int *value) +static void gpio_line_get(u8 line, int *value) { *value = (*IXP4XX_GPIO_GPINR >> line) & 0x1; } -void gpio_line_set(u8 line, int value) +static void gpio_line_set(u8 line, int value) { if (value == IXP4XX_GPIO_HIGH) *IXP4XX_GPIO_GPOUTR |= (1 << line); diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c index 5a635c657ea2..e54ff491c105 100644 --- a/arch/arm/mach-ixp4xx/goramo_mlr.c +++ b/arch/arm/mach-ixp4xx/goramo_mlr.c @@ -17,13 +17,6 @@ #include #include -#define IXP4XX_GPIO_OUT 0x1 -#define IXP4XX_GPIO_IN 0x2 - -void gpio_line_config(u8 line, u32 direction); -void gpio_line_get(u8 line, int *value); -void gpio_line_set(u8 line, int value); - #define SLOT_ETHA 0x0B /* IDSEL = AD21 */ #define SLOT_ETHB 0x0C /* IDSEL = AD20 */ #define SLOT_MPCI 0x0D /* IDSEL = AD19 */ -- cgit v1.2.3 From e1a4018f939e9ff51712183c1fdc6775e5f181a1 Mon Sep 17 00:00:00 2001 From: Krzysztof Halasa Date: Sun, 23 Mar 2014 01:34:16 +0100 Subject: IXP4xx: Fix Goramo Multilink GPIO conversion. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit 098e30f6558f8 "ARM: ixp4xx: stop broadcasting the custom GPIO API" changed the internal gpio code of ixp4xx to be accessible only from common.c, but unfortunately that broke the Goramo MultiLink code, which uses this API. arch/arm/mach-ixp4xx/goramo_mlr.c: In function 'set_scl': arch/arm/mach-ixp4xx/goramo_mlr.c:82: error: implicit declaration of function 'gpio_line_set' arch/arm/mach-ixp4xx/goramo_mlr.c: In function 'output_control': arch/arm/mach-ixp4xx/goramo_mlr.c:111: error: implicit declaration of function 'gpio_line_config' arch/arm/mach-ixp4xx/goramo_mlr.c:111: error: 'IXP4XX_GPIO_OUT' undeclared arch/arm/mach-ixp4xx/goramo_mlr.c: In function 'hss_dcd_irq': arch/arm/mach-ixp4xx/goramo_mlr.c:155: error: implicit declaration of function 'gpio_line_get' arch/arm/mach-ixp4xx/goramo_mlr.c: In function 'gmlr_init': arch/arm/mach-ixp4xx/goramo_mlr.c:416: error: 'IXP4XX_GPIO_OUT' undeclared arch/arm/mach-ixp4xx/goramo_mlr.c:421: error: 'IXP4XX_GPIO_IN' undeclared Signed-off-by: Krzysztof Hałasa Reviewed-by: Linus Walleij Signed-off-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/goramo_mlr.c | 43 +++++++++++++++++++++++---------------- 1 file changed, 26 insertions(+), 17 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c index e54ff491c105..80bd9d6d04de 100644 --- a/arch/arm/mach-ixp4xx/goramo_mlr.c +++ b/arch/arm/mach-ixp4xx/goramo_mlr.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -79,19 +80,19 @@ static u8 control_value; static void set_scl(u8 value) { - gpio_line_set(GPIO_SCL, !!value); + gpio_set_value(GPIO_SCL, !!value); udelay(3); } static void set_sda(u8 value) { - gpio_line_set(GPIO_SDA, !!value); + gpio_set_value(GPIO_SDA, !!value); udelay(3); } static void set_str(u8 value) { - gpio_line_set(GPIO_STR, !!value); + gpio_set_value(GPIO_STR, !!value); udelay(3); } @@ -108,8 +109,8 @@ static void output_control(void) { int i; - gpio_line_config(GPIO_SCL, IXP4XX_GPIO_OUT); - gpio_line_config(GPIO_SDA, IXP4XX_GPIO_OUT); + gpio_direction_output(GPIO_SCL, 1); + gpio_direction_output(GPIO_SDA, 1); for (i = 0; i < 8; i++) { set_scl(0); @@ -151,8 +152,8 @@ static int hss_set_clock(int port, unsigned int clock_type) static irqreturn_t hss_dcd_irq(int irq, void *pdev) { - int i, port = (irq == IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N)); - gpio_line_get(port ? GPIO_HSS1_DCD_N : GPIO_HSS0_DCD_N, &i); + int port = (irq == IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N)); + int i = gpio_get_value(port ? GPIO_HSS1_DCD_N : GPIO_HSS0_DCD_N); set_carrier_cb_tab[port](pdev, !i); return IRQ_HANDLED; } @@ -168,7 +169,7 @@ static int hss_open(int port, void *pdev, else irq = IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N); - gpio_line_get(port ? GPIO_HSS1_DCD_N : GPIO_HSS0_DCD_N, &i); + i = gpio_get_value(port ? GPIO_HSS1_DCD_N : GPIO_HSS0_DCD_N); set_carrier_cb(pdev, !i); set_carrier_cb_tab[!!port] = set_carrier_cb; @@ -181,7 +182,7 @@ static int hss_open(int port, void *pdev, set_control(port ? CONTROL_HSS1_DTR_N : CONTROL_HSS0_DTR_N, 0); output_control(); - gpio_line_set(port ? GPIO_HSS1_RTS_N : GPIO_HSS0_RTS_N, 0); + gpio_set_value(port ? GPIO_HSS1_RTS_N : GPIO_HSS0_RTS_N, 0); return 0; } @@ -193,7 +194,7 @@ static void hss_close(int port, void *pdev) set_control(port ? CONTROL_HSS1_DTR_N : CONTROL_HSS0_DTR_N, 1); output_control(); - gpio_line_set(port ? GPIO_HSS1_RTS_N : GPIO_HSS0_RTS_N, 1); + gpio_set_value(port ? GPIO_HSS1_RTS_N : GPIO_HSS0_RTS_N, 1); } @@ -413,13 +414,21 @@ static void __init gmlr_init(void) if (hw_bits & CFG_HW_HAS_EEPROM) device_tab[devices++] = &device_i2c; /* max index 6 */ - gpio_line_config(GPIO_SCL, IXP4XX_GPIO_OUT); - gpio_line_config(GPIO_SDA, IXP4XX_GPIO_OUT); - gpio_line_config(GPIO_STR, IXP4XX_GPIO_OUT); - gpio_line_config(GPIO_HSS0_RTS_N, IXP4XX_GPIO_OUT); - gpio_line_config(GPIO_HSS1_RTS_N, IXP4XX_GPIO_OUT); - gpio_line_config(GPIO_HSS0_DCD_N, IXP4XX_GPIO_IN); - gpio_line_config(GPIO_HSS1_DCD_N, IXP4XX_GPIO_IN); + gpio_request(GPIO_SCL, "SCL/clock"); + gpio_request(GPIO_SDA, "SDA/data"); + gpio_request(GPIO_STR, "strobe"); + gpio_request(GPIO_HSS0_RTS_N, "HSS0 RTS"); + gpio_request(GPIO_HSS1_RTS_N, "HSS1 RTS"); + gpio_request(GPIO_HSS0_DCD_N, "HSS0 DCD"); + gpio_request(GPIO_HSS1_DCD_N, "HSS1 DCD"); + + gpio_direction_output(GPIO_SCL, 1); + gpio_direction_output(GPIO_SDA, 1); + gpio_direction_output(GPIO_STR, 0); + gpio_direction_output(GPIO_HSS0_RTS_N, 1); + gpio_direction_output(GPIO_HSS1_RTS_N, 1); + gpio_direction_input(GPIO_HSS0_DCD_N); + gpio_direction_input(GPIO_HSS1_DCD_N); irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS0_DCD_N), IRQ_TYPE_EDGE_BOTH); irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N), IRQ_TYPE_EDGE_BOTH); -- cgit v1.2.3 From 53ad835ce7050dc3a3b3343fb07636db86783e26 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 26 Mar 2014 23:07:17 +0100 Subject: Revert "ARM: ixp4xx: Make dma_set_coherent_mask common, correct implementation" This reverts commit bfdad565ae0a61ac943974b8ae61ec0ed55ceb04. The patch turned out to be incorrect, and will be replaced with a correct patch. Signed-off-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/common-pci.c | 9 +++++++++ arch/arm/mach-ixp4xx/common.c | 12 ------------ 2 files changed, 9 insertions(+), 12 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 055d81694a17..200970d56f6d 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c @@ -481,5 +481,14 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys) return 1; } +int dma_set_coherent_mask(struct device *dev, u64 mask) +{ + if (mask >= SZ_64M - 1) + return 0; + + return -EIO; +} + EXPORT_SYMBOL(ixp4xx_pci_read); EXPORT_SYMBOL(ixp4xx_pci_write); +EXPORT_SYMBOL(dma_set_coherent_mask); diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index df82a2b4a546..6d68aed6548a 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include @@ -579,17 +578,6 @@ void ixp4xx_restart(enum reboot_mode mode, const char *cmd) } } -int dma_set_coherent_mask(struct device *dev, u64 mask) -{ - if (dev_is_pci(dev) && mask >= SZ_64M) - return -EIO; - - dev->coherent_dma_mask = mask; - - return 0; -} -EXPORT_SYMBOL(dma_set_coherent_mask); - #ifdef CONFIG_IXP4XX_INDIRECT_PCI /* * In the case of using indirect PCI, we simply return the actual PCI -- cgit v1.2.3 From 00e1b3a3d196ae876370633b32007bf98584e748 Mon Sep 17 00:00:00 2001 From: Krzysztof Halasa Date: Sun, 23 Mar 2014 01:36:48 +0100 Subject: IXP4xx: Fix DMA masks. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now, devices will have 32-bit default DMA masks (0xFFFFFFFF) as per DMA API. Fixes: $ ifconfig eth0 up net eth0: coherent DMA mask is unset $ ifconfig hdlc0 up net hdlc0: coherent DMA mask is unset Also fixes a cosmetic off-by-one bug which caused DMA transfers ending exactly on the 64 MiB boundary to go through dmabounce unnecessarily. Signed-off-by: Krzysztof Hałasa Tested-by: Simon Kagstrom Signed-off-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/common-pci.c | 39 ------------------------- arch/arm/mach-ixp4xx/common.c | 61 +++++++++++++++++++++++++++++++++++---- 2 files changed, 56 insertions(+), 44 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 200970d56f6d..4977296f0c78 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c @@ -315,33 +315,6 @@ static int abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *r return 0; } - -static int ixp4xx_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) -{ - return (dma_addr + size) >= SZ_64M; -} - -/* - * Setup DMA mask to 64MB on PCI devices. Ignore all other devices. - */ -static int ixp4xx_pci_platform_notify(struct device *dev) -{ - if (dev_is_pci(dev)) { - *dev->dma_mask = SZ_64M - 1; - dev->coherent_dma_mask = SZ_64M - 1; - dmabounce_register_dev(dev, 2048, 4096, ixp4xx_needs_bounce); - } - return 0; -} - -static int ixp4xx_pci_platform_notify_remove(struct device *dev) -{ - if (dev_is_pci(dev)) - dmabounce_unregister_dev(dev); - - return 0; -} - void __init ixp4xx_pci_preinit(void) { unsigned long cpuid = read_cpuid_id(); @@ -475,20 +448,8 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys) pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset); pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); - platform_notify = ixp4xx_pci_platform_notify; - platform_notify_remove = ixp4xx_pci_platform_notify_remove; - return 1; } -int dma_set_coherent_mask(struct device *dev, u64 mask) -{ - if (mask >= SZ_64M - 1) - return 0; - - return -EIO; -} - EXPORT_SYMBOL(ixp4xx_pci_read); EXPORT_SYMBOL(ixp4xx_pci_write); -EXPORT_SYMBOL(dma_set_coherent_mask); diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 6d68aed6548a..12c71a4a42a0 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -30,8 +30,8 @@ #include #include #include +#include #include - #include #include #include @@ -40,7 +40,6 @@ #include #include #include - #include #include #include @@ -578,6 +577,54 @@ void ixp4xx_restart(enum reboot_mode mode, const char *cmd) } } +#ifdef CONFIG_PCI +static int ixp4xx_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) +{ + return (dma_addr + size) > SZ_64M; +} + +static int ixp4xx_platform_notify_remove(struct device *dev) +{ + if (dev_is_pci(dev)) + dmabounce_unregister_dev(dev); + + return 0; +} +#endif + +/* + * Setup DMA mask to 64MB on PCI devices and 4 GB on all other things. + */ +static int ixp4xx_platform_notify(struct device *dev) +{ + dev->dma_mask = &dev->coherent_dma_mask; + +#ifdef CONFIG_PCI + if (dev_is_pci(dev)) { + dev->coherent_dma_mask = DMA_BIT_MASK(28); /* 64 MB */ + dmabounce_register_dev(dev, 2048, 4096, ixp4xx_needs_bounce); + return 0; + } +#endif + + dev->coherent_dma_mask = DMA_BIT_MASK(32); + return 0; +} + +int dma_set_coherent_mask(struct device *dev, u64 mask) +{ + if (dev_is_pci(dev)) + mask &= DMA_BIT_MASK(28); /* 64 MB */ + + if ((mask & DMA_BIT_MASK(28)) == DMA_BIT_MASK(28)) { + dev->coherent_dma_mask = mask; + return 0; + } + + return -EIO; /* device wanted sub-64MB mask */ +} +EXPORT_SYMBOL(dma_set_coherent_mask); + #ifdef CONFIG_IXP4XX_INDIRECT_PCI /* * In the case of using indirect PCI, we simply return the actual PCI @@ -600,12 +647,16 @@ static void ixp4xx_iounmap(void __iomem *addr) if (!is_pci_memory((__force u32)addr)) __iounmap(addr); } +#endif void __init ixp4xx_init_early(void) { + platform_notify = ixp4xx_platform_notify; +#ifdef CONFIG_PCI + platform_notify_remove = ixp4xx_platform_notify_remove; +#endif +#ifdef CONFIG_IXP4XX_INDIRECT_PCI arch_ioremap_caller = ixp4xx_ioremap_caller; arch_iounmap = ixp4xx_iounmap; -} -#else -void __init ixp4xx_init_early(void) {} #endif +} -- cgit v1.2.3 From 27addb96db38fc7279fcd40f9df10438f5dc8f2e Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Thu, 20 Mar 2014 22:25:11 +0400 Subject: ARM: nspire: Fix compiler warning CC arch/arm/mach-nspire/nspire.o arch/arm/mach-nspire/nspire.c:79:2: warning: initialization from incompatible pointer type [enabled by default] arch/arm/mach-nspire/nspire.c:79:2: warning: (near initialization for '__mach_desc_NSPIRE.restart') [enabled by default] Signed-off-by: Alexander Shiyan Signed-off-by: Arnd Bergmann --- arch/arm/mach-nspire/nspire.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-nspire/nspire.c b/arch/arm/mach-nspire/nspire.c index 4b2ed2e8352f..3d24ebf12095 100644 --- a/arch/arm/mach-nspire/nspire.c +++ b/arch/arm/mach-nspire/nspire.c @@ -63,7 +63,7 @@ static void __init nspire_init(void) nspire_auxdata, NULL); } -static void nspire_restart(char mode, const char *cmd) +static void nspire_restart(enum reboot_mode mode, const char *cmd) { void __iomem *base = ioremap(NSPIRE_MISC_PHYS_BASE, SZ_4K); if (!base) -- cgit v1.2.3 From bf5fd5bf0a96a8bbc9c073118fc646bae13e24bd Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 20 Mar 2014 18:06:01 -0600 Subject: ARM: tegra: fix board DT pinmux setup Neither Tegra114 nor Tegra124 allow "low power mode" to be configured on SDIO1 or SDIO3 drive groups. Remove the attempt to configure that option from the Dalmore and Venice2 DTs. The Venice2 DT contained duplicate configurations for most sdmmc1_* pins. Remove the duplicate pins from one of the nodes, and fix the configuration since the remaining clk pin is output-only. Signed-off-by: Stephen Warren Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/tegra114-dalmore.dts | 2 -- arch/arm/boot/dts/tegra124-venice2.dts | 11 ++--------- 2 files changed, 2 insertions(+), 11 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index 73aecfb57ccb..eb54353975bc 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -715,7 +715,6 @@ nvidia,pins = "drive_sdio1"; nvidia,high-speed-mode = ; nvidia,schmitt = ; - nvidia,low-power-mode = ; nvidia,pull-down-strength = <36>; nvidia,pull-up-strength = <20>; nvidia,slew-rate-rising = ; @@ -725,7 +724,6 @@ nvidia,pins = "drive_sdio3"; nvidia,high-speed-mode = ; nvidia,schmitt = ; - nvidia,low-power-mode = ; nvidia,pull-down-strength = <22>; nvidia,pull-up-strength = <36>; nvidia,slew-rate-rising = ; diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts index c6dcef513e5d..0b54743c2621 100644 --- a/arch/arm/boot/dts/tegra124-venice2.dts +++ b/arch/arm/boot/dts/tegra124-venice2.dts @@ -138,14 +138,9 @@ nvidia,enable-input = ; }; sdmmc1_clk_pz0 { - nvidia,pins = "sdmmc1_clk_pz0", - "sdmmc1_cmd_pz1", - "sdmmc1_dat0_py7", - "sdmmc1_dat1_py6", - "sdmmc1_dat2_py5", - "sdmmc1_dat3_py4"; + nvidia,pins = "sdmmc1_clk_pz0"; nvidia,function = "sdmmc1"; - nvidia,enable-input = ; + nvidia,enable-input = ; nvidia,pull = ; nvidia,tristate = ; }; @@ -423,7 +418,6 @@ nvidia,pins = "drive_sdio1"; nvidia,high-speed-mode = ; nvidia,schmitt = ; - nvidia,low-power-mode = ; nvidia,pull-down-strength = <32>; nvidia,pull-up-strength = <42>; nvidia,slew-rate-rising = ; @@ -433,7 +427,6 @@ nvidia,pins = "drive_sdio3"; nvidia,high-speed-mode = ; nvidia,schmitt = ; - nvidia,low-power-mode = ; nvidia,pull-down-strength = <20>; nvidia,pull-up-strength = <36>; nvidia,slew-rate-rising = ; -- cgit v1.2.3 From f8afae40a076347eeb9be179522b570e50d39af4 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Tue, 25 Mar 2014 22:19:00 +0100 Subject: ARM: moxart: fix CPU selection Moxart uses an FA526 CPU core, which is ARMv4 based, not ARMv4T. Before moxart, we had no CONFIG_MULTI_V4 option, since no ARMv4 platform was enabled for multiplatform. This now adds the missing option, which will give us slightly more efficient code on pure moxart kernels, because we can build a pure FA526 kernel now rather than a combined FA526+ARM920T kernel that we used to. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig | 6 ++++++ arch/arm/mach-moxart/Kconfig | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3dad96105ce4..4f85b09f9f61 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -893,6 +893,12 @@ menu "Multiple platform selection" comment "CPU Core family selection" +config ARCH_MULTI_V4 + bool "ARMv4 based platforms (FA526)" + depends on !ARCH_MULTI_V6_V7 + select ARCH_MULTI_V4_V5 + select CPU_FA526 + config ARCH_MULTI_V4T bool "ARMv4T based platforms (ARM720T, ARM920T, ...)" depends on !ARCH_MULTI_V6_V7 diff --git a/arch/arm/mach-moxart/Kconfig b/arch/arm/mach-moxart/Kconfig index 3795ae28a613..e9b45bb58263 100644 --- a/arch/arm/mach-moxart/Kconfig +++ b/arch/arm/mach-moxart/Kconfig @@ -1,5 +1,5 @@ config ARCH_MOXART - bool "MOXA ART SoC" if ARCH_MULTI_V4T + bool "MOXA ART SoC" if ARCH_MULTI_V4 select CPU_FA526 select ARM_DMA_MEM_BUFFERABLE select USE_OF -- cgit v1.2.3 From cb46a256a78225817945cd52068d61d5126c236e Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 3 Apr 2014 10:02:12 +0200 Subject: ARM: at91: fix a typo My recent commit 871336a9379 "ARM: at91: fix broken "if () else" statement" introduced a typo because of a last-minute fixup. This adds the missing closing parenthesis. Signed-off-by: Arnd Bergmann --- arch/arm/mach-at91/at91sam9260_devices.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index 8a4c6656b608..1630ae64d3fb 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c @@ -1255,7 +1255,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) at91_set_A_periph(AT91_PIN_PC10, 0); /* CFRNW */ at91_set_A_periph(AT91_PIN_PC15, 1); /* NWAIT */ - if (IS_ENABLED(CONFIG_PATA_AT91) && (data->flags & AT91_CF_TRUE_IDE) + if (IS_ENABLED(CONFIG_PATA_AT91) && (data->flags & AT91_CF_TRUE_IDE)) pdev->name = "pata_at91"; else pdev->name = "at91_cf"; -- cgit v1.2.3