From 139563ad27e7baad7935b8113940f0d804cf513b Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sun, 21 Oct 2012 01:01:10 -0600 Subject: ARM: OMAP2+: PRM: split PRM functions into OMAP2, OMAP3-specific files Move OMAP3xxx-specific PRM functions & macros into prm3xxx.[ch] and OMAP2xxx-specific macros into prm2xxx.h. (prm2xxx.c will be created by a subsequent patch when it's needed.) Move basic PRM register access functions into static inline functions in prm2xxx_3xxx.h, leaving only OMAP2/3 hardreset functions in prm2xxx_3xxx.c. Also clarify the initcall function naming to reinforce that this code is specifically for the PRM IP block. This is in preparation for the upcoming powerdomain series and the upcoming move of this code to drivers/. Signed-off-by: Paul Walmsley Reviewed-by: Russ Dill Acked-by: Santosh Shilimkar --- arch/arm/mach-omap2/prm2xxx_3xxx.h | 256 +++++++------------------------------ 1 file changed, 49 insertions(+), 207 deletions(-) (limited to 'arch/arm/mach-omap2/prm2xxx_3xxx.h') diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h index c19d249b4816..8d09a1ac9311 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h @@ -1,7 +1,7 @@ /* - * OMAP2/3 Power/Reset Management (PRM) register definitions + * OMAP2xxx/3xxx-common Power/Reset Management (PRM) register definitions * - * Copyright (C) 2007-2009, 2011 Texas Instruments, Inc. + * Copyright (C) 2007-2009, 2011-2012 Texas Instruments, Inc. * Copyright (C) 2008-2010 Nokia Corporation * Paul Walmsley * @@ -19,160 +19,6 @@ #include "prcm-common.h" #include "prm.h" -#define OMAP2420_PRM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) -#define OMAP2430_PRM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg)) -#define OMAP34XX_PRM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) - - -/* - * OMAP2-specific global PRM registers - * Use __raw_{read,write}l() with these registers. - * - * With a few exceptions, these are the register names beginning with - * PRCM_* on 24xx. (The exceptions are the IRQSTATUS and IRQENABLE - * bits.) - * - */ - -#define OMAP2_PRCM_REVISION_OFFSET 0x0000 -#define OMAP2420_PRCM_REVISION OMAP2420_PRM_REGADDR(OCP_MOD, 0x0000) -#define OMAP2_PRCM_SYSCONFIG_OFFSET 0x0010 -#define OMAP2420_PRCM_SYSCONFIG OMAP2420_PRM_REGADDR(OCP_MOD, 0x0010) - -#define OMAP2_PRCM_IRQSTATUS_MPU_OFFSET 0x0018 -#define OMAP2420_PRCM_IRQSTATUS_MPU OMAP2420_PRM_REGADDR(OCP_MOD, 0x0018) -#define OMAP2_PRCM_IRQENABLE_MPU_OFFSET 0x001c -#define OMAP2420_PRCM_IRQENABLE_MPU OMAP2420_PRM_REGADDR(OCP_MOD, 0x001c) - -#define OMAP2_PRCM_VOLTCTRL_OFFSET 0x0050 -#define OMAP2420_PRCM_VOLTCTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0050) -#define OMAP2_PRCM_VOLTST_OFFSET 0x0054 -#define OMAP2420_PRCM_VOLTST OMAP2420_PRM_REGADDR(OCP_MOD, 0x0054) -#define OMAP2_PRCM_CLKSRC_CTRL_OFFSET 0x0060 -#define OMAP2420_PRCM_CLKSRC_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0060) -#define OMAP2_PRCM_CLKOUT_CTRL_OFFSET 0x0070 -#define OMAP2420_PRCM_CLKOUT_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0070) -#define OMAP2_PRCM_CLKEMUL_CTRL_OFFSET 0x0078 -#define OMAP2420_PRCM_CLKEMUL_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0078) -#define OMAP2_PRCM_CLKCFG_CTRL_OFFSET 0x0080 -#define OMAP2420_PRCM_CLKCFG_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0080) -#define OMAP2_PRCM_CLKCFG_STATUS_OFFSET 0x0084 -#define OMAP2420_PRCM_CLKCFG_STATUS OMAP2420_PRM_REGADDR(OCP_MOD, 0x0084) -#define OMAP2_PRCM_VOLTSETUP_OFFSET 0x0090 -#define OMAP2420_PRCM_VOLTSETUP OMAP2420_PRM_REGADDR(OCP_MOD, 0x0090) -#define OMAP2_PRCM_CLKSSETUP_OFFSET 0x0094 -#define OMAP2420_PRCM_CLKSSETUP OMAP2420_PRM_REGADDR(OCP_MOD, 0x0094) -#define OMAP2_PRCM_POLCTRL_OFFSET 0x0098 -#define OMAP2420_PRCM_POLCTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0098) - -#define OMAP2430_PRCM_REVISION OMAP2430_PRM_REGADDR(OCP_MOD, 0x0000) -#define OMAP2430_PRCM_SYSCONFIG OMAP2430_PRM_REGADDR(OCP_MOD, 0x0010) - -#define OMAP2430_PRCM_IRQSTATUS_MPU OMAP2430_PRM_REGADDR(OCP_MOD, 0x0018) -#define OMAP2430_PRCM_IRQENABLE_MPU OMAP2430_PRM_REGADDR(OCP_MOD, 0x001c) - -#define OMAP2430_PRCM_VOLTCTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0050) -#define OMAP2430_PRCM_VOLTST OMAP2430_PRM_REGADDR(OCP_MOD, 0x0054) -#define OMAP2430_PRCM_CLKSRC_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0060) -#define OMAP2430_PRCM_CLKOUT_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0070) -#define OMAP2430_PRCM_CLKEMUL_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0078) -#define OMAP2430_PRCM_CLKCFG_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0080) -#define OMAP2430_PRCM_CLKCFG_STATUS OMAP2430_PRM_REGADDR(OCP_MOD, 0x0084) -#define OMAP2430_PRCM_VOLTSETUP OMAP2430_PRM_REGADDR(OCP_MOD, 0x0090) -#define OMAP2430_PRCM_CLKSSETUP OMAP2430_PRM_REGADDR(OCP_MOD, 0x0094) -#define OMAP2430_PRCM_POLCTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0098) - -/* - * OMAP3-specific global PRM registers - * Use __raw_{read,write}l() with these registers. - * - * With a few exceptions, these are the register names beginning with - * PRM_* on 34xx. (The exceptions are the IRQSTATUS and IRQENABLE - * bits.) - */ - -#define OMAP3_PRM_REVISION_OFFSET 0x0004 -#define OMAP3430_PRM_REVISION OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0004) -#define OMAP3_PRM_SYSCONFIG_OFFSET 0x0014 -#define OMAP3430_PRM_SYSCONFIG OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0014) - -#define OMAP3_PRM_IRQSTATUS_MPU_OFFSET 0x0018 -#define OMAP3430_PRM_IRQSTATUS_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0018) -#define OMAP3_PRM_IRQENABLE_MPU_OFFSET 0x001c -#define OMAP3430_PRM_IRQENABLE_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x001c) - - -#define OMAP3_PRM_VC_SMPS_SA_OFFSET 0x0020 -#define OMAP3430_PRM_VC_SMPS_SA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0020) -#define OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET 0x0024 -#define OMAP3430_PRM_VC_SMPS_VOL_RA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0024) -#define OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET 0x0028 -#define OMAP3430_PRM_VC_SMPS_CMD_RA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0028) -#define OMAP3_PRM_VC_CMD_VAL_0_OFFSET 0x002c -#define OMAP3430_PRM_VC_CMD_VAL_0 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x002c) -#define OMAP3_PRM_VC_CMD_VAL_1_OFFSET 0x0030 -#define OMAP3430_PRM_VC_CMD_VAL_1 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0030) -#define OMAP3_PRM_VC_CH_CONF_OFFSET 0x0034 -#define OMAP3430_PRM_VC_CH_CONF OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0034) -#define OMAP3_PRM_VC_I2C_CFG_OFFSET 0x0038 -#define OMAP3430_PRM_VC_I2C_CFG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0038) -#define OMAP3_PRM_VC_BYPASS_VAL_OFFSET 0x003c -#define OMAP3430_PRM_VC_BYPASS_VAL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x003c) -#define OMAP3_PRM_RSTCTRL_OFFSET 0x0050 -#define OMAP3430_PRM_RSTCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0050) -#define OMAP3_PRM_RSTTIME_OFFSET 0x0054 -#define OMAP3430_PRM_RSTTIME OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0054) -#define OMAP3_PRM_RSTST_OFFSET 0x0058 -#define OMAP3430_PRM_RSTST OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0058) -#define OMAP3_PRM_VOLTCTRL_OFFSET 0x0060 -#define OMAP3430_PRM_VOLTCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0060) -#define OMAP3_PRM_SRAM_PCHARGE_OFFSET 0x0064 -#define OMAP3430_PRM_SRAM_PCHARGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0064) -#define OMAP3_PRM_CLKSRC_CTRL_OFFSET 0x0070 -#define OMAP3430_PRM_CLKSRC_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0070) -#define OMAP3_PRM_VOLTSETUP1_OFFSET 0x0090 -#define OMAP3430_PRM_VOLTSETUP1 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0090) -#define OMAP3_PRM_VOLTOFFSET_OFFSET 0x0094 -#define OMAP3430_PRM_VOLTOFFSET OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0094) -#define OMAP3_PRM_CLKSETUP_OFFSET 0x0098 -#define OMAP3430_PRM_CLKSETUP OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0098) -#define OMAP3_PRM_POLCTRL_OFFSET 0x009c -#define OMAP3430_PRM_POLCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x009c) -#define OMAP3_PRM_VOLTSETUP2_OFFSET 0x00a0 -#define OMAP3430_PRM_VOLTSETUP2 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00a0) -#define OMAP3_PRM_VP1_CONFIG_OFFSET 0x00b0 -#define OMAP3430_PRM_VP1_CONFIG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b0) -#define OMAP3_PRM_VP1_VSTEPMIN_OFFSET 0x00b4 -#define OMAP3430_PRM_VP1_VSTEPMIN OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b4) -#define OMAP3_PRM_VP1_VSTEPMAX_OFFSET 0x00b8 -#define OMAP3430_PRM_VP1_VSTEPMAX OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b8) -#define OMAP3_PRM_VP1_VLIMITTO_OFFSET 0x00bc -#define OMAP3430_PRM_VP1_VLIMITTO OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00bc) -#define OMAP3_PRM_VP1_VOLTAGE_OFFSET 0x00c0 -#define OMAP3430_PRM_VP1_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c0) -#define OMAP3_PRM_VP1_STATUS_OFFSET 0x00c4 -#define OMAP3430_PRM_VP1_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c4) -#define OMAP3_PRM_VP2_CONFIG_OFFSET 0x00d0 -#define OMAP3430_PRM_VP2_CONFIG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d0) -#define OMAP3_PRM_VP2_VSTEPMIN_OFFSET 0x00d4 -#define OMAP3430_PRM_VP2_VSTEPMIN OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d4) -#define OMAP3_PRM_VP2_VSTEPMAX_OFFSET 0x00d8 -#define OMAP3430_PRM_VP2_VSTEPMAX OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d8) -#define OMAP3_PRM_VP2_VLIMITTO_OFFSET 0x00dc -#define OMAP3430_PRM_VP2_VLIMITTO OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00dc) -#define OMAP3_PRM_VP2_VOLTAGE_OFFSET 0x00e0 -#define OMAP3430_PRM_VP2_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e0) -#define OMAP3_PRM_VP2_STATUS_OFFSET 0x00e4 -#define OMAP3430_PRM_VP2_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e4) - -#define OMAP3_PRM_CLKSEL_OFFSET 0x0040 -#define OMAP3430_PRM_CLKSEL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040) -#define OMAP3_PRM_CLKOUT_CTRL_OFFSET 0x0070 -#define OMAP3430_PRM_CLKOUT_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0070) - /* * Module specific PRM register offsets from PRM_BASE + domain offset * @@ -200,67 +46,63 @@ #define PM_EVGENONTIM 0x00d8 #define PM_EVGENOFFTIM 0x00dc -/* OMAP2xxx specific register offsets */ -#define OMAP24XX_PM_WKEN2 0x00a4 -#define OMAP24XX_PM_WKST2 0x00b4 - -#define OMAP24XX_PRCM_IRQSTATUS_DSP 0x00f0 /* IVA mod */ -#define OMAP24XX_PRCM_IRQENABLE_DSP 0x00f4 /* IVA mod */ -#define OMAP24XX_PRCM_IRQSTATUS_IVA 0x00f8 -#define OMAP24XX_PRCM_IRQENABLE_IVA 0x00fc - -/* OMAP3 specific register offsets */ -#define OMAP3430ES2_PM_WKEN3 0x00f0 -#define OMAP3430ES2_PM_WKST3 0x00b8 - -#define OMAP3430_PM_MPUGRPSEL 0x00a4 -#define OMAP3430_PM_MPUGRPSEL1 OMAP3430_PM_MPUGRPSEL -#define OMAP3430ES2_PM_MPUGRPSEL3 0x00f8 -#define OMAP3430_PM_IVAGRPSEL 0x00a8 -#define OMAP3430_PM_IVAGRPSEL1 OMAP3430_PM_IVAGRPSEL -#define OMAP3430ES2_PM_IVAGRPSEL3 0x00f4 - -#define OMAP3430_PM_PREPWSTST 0x00e8 - -#define OMAP3430_PRM_IRQSTATUS_IVA2 0x00f8 -#define OMAP3430_PRM_IRQENABLE_IVA2 0x00fc +#ifndef __ASSEMBLER__ +#include -#ifndef __ASSEMBLER__ /* Power/reset management domain register get/set */ -extern u32 omap2_prm_read_mod_reg(s16 module, u16 idx); -extern void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx); -extern u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); -extern u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx); -extern u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx); -extern u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask); +static inline u32 omap2_prm_read_mod_reg(s16 module, u16 idx) +{ + return __raw_readl(prm_base + module + idx); +} + +static inline void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx) +{ + __raw_writel(val, prm_base + module + idx); +} + +/* Read-modify-write a register in a PRM module. Caller must lock */ +static inline u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, + s16 idx) +{ + u32 v; + + v = omap2_prm_read_mod_reg(module, idx); + v &= ~mask; + v |= bits; + omap2_prm_write_mod_reg(v, module, idx); + + return v; +} + +/* Read a PRM register, AND it, and shift the result down to bit 0 */ +static inline u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) +{ + u32 v; + + v = omap2_prm_read_mod_reg(domain, idx); + v &= mask; + v >>= __ffs(mask); + + return v; +} + +static inline u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) +{ + return omap2_prm_rmw_mod_reg_bits(bits, bits, module, idx); +} + +static inline u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) +{ + return omap2_prm_rmw_mod_reg_bits(bits, 0x0, module, idx); +} /* These omap2_ PRM functions apply to both OMAP2 and 3 */ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); -/* OMAP3-specific VP functions */ -u32 omap3_prm_vp_check_txdone(u8 vp_id); -void omap3_prm_vp_clear_txdone(u8 vp_id); - -/* - * OMAP3 access functions for voltage controller (VC) and - * voltage proccessor (VP) in the PRM. - */ -extern u32 omap3_prm_vcvp_read(u8 offset); -extern void omap3_prm_vcvp_write(u32 val, u8 offset); -extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); - -extern void omap3xxx_prm_reconfigure_io_chain(void); - -/* PRM interrupt-related functions */ -extern void omap3xxx_prm_read_pending_irqs(unsigned long *events); -extern void omap3xxx_prm_ocp_barrier(void); -extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask); -extern void omap3xxx_prm_restore_irqen(u32 *saved_mask); - #endif /* __ASSEMBLER */ /* -- cgit v1.2.3 From 498153995b9ff41279be54fc56facb92f5cad793 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sun, 21 Oct 2012 01:01:10 -0600 Subject: ARM: OMAP2+: powerdomain/PRM: move the low-level powerdomain functions into PRM Move the low-level SoC-specific powerdomain control functions into prm*.c. For example, OMAP2xxx low-level powerdomain functions go into prm2xxx.c. Then remove the unnecessary powerdomain*xxx*.c files. The objective is to centralize low-level PRM register accesses into the prm*.[ch] files, and then to export an OMAP SoC-independent API to higher-level OMAP power management code. Signed-off-by: Paul Walmsley Cc: Rajendra Nayak Cc: Vaibhav Hiremath Acked-by: Rajendra Nayak Reviewed-by: Russ Dill Acked-by: Santosh Shilimkar --- arch/arm/mach-omap2/Makefile | 1 + arch/arm/mach-omap2/powerdomain2xxx_3xxx.c | 242 ------------------------ arch/arm/mach-omap2/powerdomain33xx.c | 229 ----------------------- arch/arm/mach-omap2/powerdomain44xx.c | 285 ----------------------------- arch/arm/mach-omap2/prm2xxx.c | 41 +++++ arch/arm/mach-omap2/prm2xxx_3xxx.c | 112 +++++++++++- arch/arm/mach-omap2/prm2xxx_3xxx.h | 13 ++ arch/arm/mach-omap2/prm33xx.c | 202 ++++++++++++++++++++ arch/arm/mach-omap2/prm3xxx.c | 107 ++++++++++- arch/arm/mach-omap2/prm44xx.c | 265 +++++++++++++++++++++++++++ 10 files changed, 739 insertions(+), 758 deletions(-) delete mode 100644 arch/arm/mach-omap2/powerdomain2xxx_3xxx.c delete mode 100644 arch/arm/mach-omap2/powerdomain33xx.c delete mode 100644 arch/arm/mach-omap2/powerdomain44xx.c create mode 100644 arch/arm/mach-omap2/prm2xxx.c (limited to 'arch/arm/mach-omap2/prm2xxx_3xxx.h') diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 20849604be94..7404e3d48cea 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -95,6 +95,7 @@ endif # PRCM obj-y += prcm.o prm_common.o obj-$(CONFIG_ARCH_OMAP2) += cm2xxx_3xxx.o prm2xxx_3xxx.o +obj-$(CONFIG_ARCH_OMAP2) += prm2xxx.o obj-$(CONFIG_ARCH_OMAP3) += cm2xxx_3xxx.o prm2xxx_3xxx.o obj-$(CONFIG_ARCH_OMAP3) += prm3xxx.o obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c deleted file mode 100644 index 3950ccfe5f4a..000000000000 --- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c +++ /dev/null @@ -1,242 +0,0 @@ -/* - * OMAP2 and OMAP3 powerdomain control - * - * Copyright (C) 2009-2011 Texas Instruments, Inc. - * Copyright (C) 2007-2009 Nokia Corporation - * - * Derived from mach-omap2/powerdomain.c written by Paul Walmsley - * Rajendra Nayak - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include - -#include - -#include "powerdomain.h" -#include "prm.h" -#include "prm-regbits-24xx.h" -#include "prm-regbits-34xx.h" - - -/* Common functions across OMAP2 and OMAP3 */ -static int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) -{ - omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, - (pwrst << OMAP_POWERSTATE_SHIFT), - pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); - return 0; -} - -static int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL, - OMAP_POWERSTATE_MASK); -} - -static int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTST, - OMAP_POWERSTATEST_MASK); -} - -static int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); - - omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL); - - return 0; -} - -static int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - - omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL); - - return 0; -} - -static int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_stst_mask(bank); - - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST, - m); -} - -static int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL, m); -} - -static int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) -{ - u32 v; - - v = pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE_MASK); - omap2_prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE_MASK, v, - pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); - - return 0; -} - -static int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm) -{ - u32 c = 0; - - /* - * REVISIT: pwrdm_wait_transition() may be better implemented - * via a callback and a periodic timer check -- how long do we expect - * powerdomain transitions to take? - */ - - /* XXX Is this udelay() value meaningful? */ - while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP2_PM_PWSTST) & - OMAP_INTRANSITION_MASK) && - (c++ < PWRDM_TRANSITION_BAILOUT)) - udelay(1); - - if (c > PWRDM_TRANSITION_BAILOUT) { - pr_err("powerdomain: %s: waited too long to complete transition\n", - pwrdm->name); - return -EAGAIN; - } - - pr_debug("powerdomain: completed transition in %d loops\n", c); - - return 0; -} - -/* Applicable only for OMAP3. Not supported on OMAP2 */ -static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP3430_PM_PREPWSTST, - OMAP3430_LASTPOWERSTATEENTERED_MASK); -} - -static int omap3_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTST, - OMAP3430_LOGICSTATEST_MASK); -} - -static int omap3_pwrdm_read_logic_retst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL, - OMAP3430_LOGICSTATEST_MASK); -} - -static int omap3_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP3430_PM_PREPWSTST, - OMAP3430_LASTLOGICSTATEENTERED_MASK); -} - -static int omap3_get_mem_bank_lastmemst_mask(u8 bank) -{ - switch (bank) { - case 0: - return OMAP3430_LASTMEM1STATEENTERED_MASK; - case 1: - return OMAP3430_LASTMEM2STATEENTERED_MASK; - case 2: - return OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK; - case 3: - return OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK; - default: - WARN_ON(1); /* should never happen */ - return -EEXIST; - } - return 0; -} - -static int omap3_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m; - - m = omap3_get_mem_bank_lastmemst_mask(bank); - - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP3430_PM_PREPWSTST, m); -} - -static int omap3_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) -{ - omap2_prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST); - return 0; -} - -static int omap3_pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm) -{ - return omap2_prm_rmw_mod_reg_bits(0, - 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, - pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); -} - -static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) -{ - return omap2_prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, - 0, pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL); -} - -struct pwrdm_ops omap2_pwrdm_operations = { - .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, - .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, - .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, - .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, - .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, - .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, - .pwrdm_read_mem_pwrst = omap2_pwrdm_read_mem_pwrst, - .pwrdm_read_mem_retst = omap2_pwrdm_read_mem_retst, - .pwrdm_wait_transition = omap2_pwrdm_wait_transition, -}; - -struct pwrdm_ops omap3_pwrdm_operations = { - .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, - .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, - .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, - .pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst, - .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, - .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst, - .pwrdm_read_logic_retst = omap3_pwrdm_read_logic_retst, - .pwrdm_read_prev_logic_pwrst = omap3_pwrdm_read_prev_logic_pwrst, - .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, - .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, - .pwrdm_read_mem_pwrst = omap2_pwrdm_read_mem_pwrst, - .pwrdm_read_mem_retst = omap2_pwrdm_read_mem_retst, - .pwrdm_read_prev_mem_pwrst = omap3_pwrdm_read_prev_mem_pwrst, - .pwrdm_clear_all_prev_pwrst = omap3_pwrdm_clear_all_prev_pwrst, - .pwrdm_enable_hdwr_sar = omap3_pwrdm_enable_hdwr_sar, - .pwrdm_disable_hdwr_sar = omap3_pwrdm_disable_hdwr_sar, - .pwrdm_wait_transition = omap2_pwrdm_wait_transition, -}; diff --git a/arch/arm/mach-omap2/powerdomain33xx.c b/arch/arm/mach-omap2/powerdomain33xx.c deleted file mode 100644 index 67c5663899b6..000000000000 --- a/arch/arm/mach-omap2/powerdomain33xx.c +++ /dev/null @@ -1,229 +0,0 @@ -/* - * AM33XX Powerdomain control - * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ - * - * Derived from mach-omap2/powerdomain44xx.c written by Rajendra Nayak - * - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include - -#include - -#include "powerdomain.h" -#include "prm33xx.h" -#include "prm-regbits-33xx.h" - - -static int am33xx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) -{ - am33xx_prm_rmw_reg_bits(OMAP_POWERSTATE_MASK, - (pwrst << OMAP_POWERSTATE_SHIFT), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - return 0; -} - -static int am33xx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - v &= OMAP_POWERSTATE_MASK; - v >>= OMAP_POWERSTATE_SHIFT; - - return v; -} - -static int am33xx_pwrdm_read_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); - v &= OMAP_POWERSTATEST_MASK; - v >>= OMAP_POWERSTATEST_SHIFT; - - return v; -} - -static int am33xx_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); - v &= AM33XX_LASTPOWERSTATEENTERED_MASK; - v >>= AM33XX_LASTPOWERSTATEENTERED_SHIFT; - - return v; -} - -static int am33xx_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) -{ - am33xx_prm_rmw_reg_bits(AM33XX_LOWPOWERSTATECHANGE_MASK, - (1 << AM33XX_LOWPOWERSTATECHANGE_SHIFT), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - return 0; -} - -static int am33xx_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) -{ - am33xx_prm_rmw_reg_bits(AM33XX_LASTPOWERSTATEENTERED_MASK, - AM33XX_LASTPOWERSTATEENTERED_MASK, - pwrdm->prcm_offs, pwrdm->pwrstst_offs); - return 0; -} - -static int am33xx_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) -{ - u32 m; - - m = pwrdm->logicretstate_mask; - if (!m) - return -EINVAL; - - am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - - return 0; -} - -static int am33xx_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); - v &= AM33XX_LOGICSTATEST_MASK; - v >>= AM33XX_LOGICSTATEST_SHIFT; - - return v; -} - -static int am33xx_pwrdm_read_logic_retst(struct powerdomain *pwrdm) -{ - u32 v, m; - - m = pwrdm->logicretstate_mask; - if (!m) - return -EINVAL; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - v &= m; - v >>= __ffs(m); - - return v; -} - -static int am33xx_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = pwrdm->mem_on_mask[bank]; - if (!m) - return -EINVAL; - - am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - - return 0; -} - -static int am33xx_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = pwrdm->mem_ret_mask[bank]; - if (!m) - return -EINVAL; - - am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - - return 0; -} - -static int am33xx_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m, v; - - m = pwrdm->mem_pwrst_mask[bank]; - if (!m) - return -EINVAL; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); - v &= m; - v >>= __ffs(m); - - return v; -} - -static int am33xx_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m, v; - - m = pwrdm->mem_retst_mask[bank]; - if (!m) - return -EINVAL; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - v &= m; - v >>= __ffs(m); - - return v; -} - -static int am33xx_pwrdm_wait_transition(struct powerdomain *pwrdm) -{ - u32 c = 0; - - /* - * REVISIT: pwrdm_wait_transition() may be better implemented - * via a callback and a periodic timer check -- how long do we expect - * powerdomain transitions to take? - */ - - /* XXX Is this udelay() value meaningful? */ - while ((am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs) - & OMAP_INTRANSITION_MASK) && - (c++ < PWRDM_TRANSITION_BAILOUT)) - udelay(1); - - if (c > PWRDM_TRANSITION_BAILOUT) { - pr_err("powerdomain: %s: waited too long to complete transition\n", - pwrdm->name); - return -EAGAIN; - } - - pr_debug("powerdomain: completed transition in %d loops\n", c); - - return 0; -} - -struct pwrdm_ops am33xx_pwrdm_operations = { - .pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst, - .pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst, - .pwrdm_read_pwrst = am33xx_pwrdm_read_pwrst, - .pwrdm_read_prev_pwrst = am33xx_pwrdm_read_prev_pwrst, - .pwrdm_set_logic_retst = am33xx_pwrdm_set_logic_retst, - .pwrdm_read_logic_pwrst = am33xx_pwrdm_read_logic_pwrst, - .pwrdm_read_logic_retst = am33xx_pwrdm_read_logic_retst, - .pwrdm_clear_all_prev_pwrst = am33xx_pwrdm_clear_all_prev_pwrst, - .pwrdm_set_lowpwrstchange = am33xx_pwrdm_set_lowpwrstchange, - .pwrdm_read_mem_pwrst = am33xx_pwrdm_read_mem_pwrst, - .pwrdm_read_mem_retst = am33xx_pwrdm_read_mem_retst, - .pwrdm_set_mem_onst = am33xx_pwrdm_set_mem_onst, - .pwrdm_set_mem_retst = am33xx_pwrdm_set_mem_retst, - .pwrdm_wait_transition = am33xx_pwrdm_wait_transition, -}; diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c deleted file mode 100644 index aceb4f464c9b..000000000000 --- a/arch/arm/mach-omap2/powerdomain44xx.c +++ /dev/null @@ -1,285 +0,0 @@ -/* - * OMAP4 powerdomain control - * - * Copyright (C) 2009-2010, 2012 Texas Instruments, Inc. - * Copyright (C) 2007-2009 Nokia Corporation - * - * Derived from mach-omap2/powerdomain.c written by Paul Walmsley - * Rajendra Nayak - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include - -#include "powerdomain.h" -#include -#include "prm2xxx_3xxx.h" -#include "prm44xx.h" -#include "prminst44xx.h" -#include "prm-regbits-44xx.h" - -static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) -{ - omap4_prminst_rmw_inst_reg_bits(OMAP_POWERSTATE_MASK, - (pwrst << OMAP_POWERSTATE_SHIFT), - pwrdm->prcm_partition, - pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); - return 0; -} - -static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - v &= OMAP_POWERSTATE_MASK; - v >>= OMAP_POWERSTATE_SHIFT; - - return v; -} - -static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTST); - v &= OMAP_POWERSTATEST_MASK; - v >>= OMAP_POWERSTATEST_SHIFT; - - return v; -} - -static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTST); - v &= OMAP4430_LASTPOWERSTATEENTERED_MASK; - v >>= OMAP4430_LASTPOWERSTATEENTERED_SHIFT; - - return v; -} - -static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) -{ - omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK, - (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT), - pwrdm->prcm_partition, - pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); - return 0; -} - -static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) -{ - omap4_prminst_rmw_inst_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK, - OMAP4430_LASTPOWERSTATEENTERED_MASK, - pwrdm->prcm_partition, - pwrdm->prcm_offs, OMAP4_PM_PWSTST); - return 0; -} - -static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) -{ - u32 v; - - v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK); - omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v, - pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - - return 0; -} - -static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); - - omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - - return 0; -} - -static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - - omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - - return 0; -} - -static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTST); - v &= OMAP4430_LOGICSTATEST_MASK; - v >>= OMAP4430_LOGICSTATEST_SHIFT; - - return v; -} - -static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm) -{ - u32 v; - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - v &= OMAP4430_LOGICRETSTATE_MASK; - v >>= OMAP4430_LOGICRETSTATE_SHIFT; - - return v; -} - -/** - * omap4_pwrdm_read_prev_logic_pwrst - read the previous logic powerstate - * @pwrdm: struct powerdomain * to read the state for - * - * Reads the previous logic powerstate for a powerdomain. This - * function must determine the previous logic powerstate by first - * checking the previous powerstate for the domain. If that was OFF, - * then logic has been lost. If previous state was RETENTION, the - * function reads the setting for the next retention logic state to - * see the actual value. In every other case, the logic is - * retained. Returns either PWRDM_POWER_OFF or PWRDM_POWER_RET - * depending whether the logic was retained or not. - */ -static int omap4_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) -{ - int state; - - state = omap4_pwrdm_read_prev_pwrst(pwrdm); - - if (state == PWRDM_POWER_OFF) - return PWRDM_POWER_OFF; - - if (state != PWRDM_POWER_RET) - return PWRDM_POWER_RET; - - return omap4_pwrdm_read_logic_retst(pwrdm); -} - -static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m, v; - - m = omap2_pwrdm_get_mem_bank_stst_mask(bank); - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTST); - v &= m; - v >>= __ffs(m); - - return v; -} - -static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m, v; - - m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - v &= m; - v >>= __ffs(m); - - return v; -} - -/** - * omap4_pwrdm_read_prev_mem_pwrst - reads the previous memory powerstate - * @pwrdm: struct powerdomain * to read mem powerstate for - * @bank: memory bank index - * - * Reads the previous memory powerstate for a powerdomain. This - * function must determine the previous memory powerstate by first - * checking the previous powerstate for the domain. If that was OFF, - * then logic has been lost. If previous state was RETENTION, the - * function reads the setting for the next memory retention state to - * see the actual value. In every other case, the logic is - * retained. Returns either PWRDM_POWER_OFF or PWRDM_POWER_RET - * depending whether logic was retained or not. - */ -static int omap4_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) -{ - int state; - - state = omap4_pwrdm_read_prev_pwrst(pwrdm); - - if (state == PWRDM_POWER_OFF) - return PWRDM_POWER_OFF; - - if (state != PWRDM_POWER_RET) - return PWRDM_POWER_RET; - - return omap4_pwrdm_read_mem_retst(pwrdm, bank); -} - -static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm) -{ - u32 c = 0; - - /* - * REVISIT: pwrdm_wait_transition() may be better implemented - * via a callback and a periodic timer check -- how long do we expect - * powerdomain transitions to take? - */ - - /* XXX Is this udelay() value meaningful? */ - while ((omap4_prminst_read_inst_reg(pwrdm->prcm_partition, - pwrdm->prcm_offs, - OMAP4_PM_PWSTST) & - OMAP_INTRANSITION_MASK) && - (c++ < PWRDM_TRANSITION_BAILOUT)) - udelay(1); - - if (c > PWRDM_TRANSITION_BAILOUT) { - pr_err("powerdomain: %s: waited too long to complete transition\n", - pwrdm->name); - return -EAGAIN; - } - - pr_debug("powerdomain: completed transition in %d loops\n", c); - - return 0; -} - -struct pwrdm_ops omap4_pwrdm_operations = { - .pwrdm_set_next_pwrst = omap4_pwrdm_set_next_pwrst, - .pwrdm_read_next_pwrst = omap4_pwrdm_read_next_pwrst, - .pwrdm_read_pwrst = omap4_pwrdm_read_pwrst, - .pwrdm_read_prev_pwrst = omap4_pwrdm_read_prev_pwrst, - .pwrdm_set_lowpwrstchange = omap4_pwrdm_set_lowpwrstchange, - .pwrdm_clear_all_prev_pwrst = omap4_pwrdm_clear_all_prev_pwrst, - .pwrdm_set_logic_retst = omap4_pwrdm_set_logic_retst, - .pwrdm_read_logic_pwrst = omap4_pwrdm_read_logic_pwrst, - .pwrdm_read_prev_logic_pwrst = omap4_pwrdm_read_prev_logic_pwrst, - .pwrdm_read_logic_retst = omap4_pwrdm_read_logic_retst, - .pwrdm_read_mem_pwrst = omap4_pwrdm_read_mem_pwrst, - .pwrdm_read_mem_retst = omap4_pwrdm_read_mem_retst, - .pwrdm_read_prev_mem_pwrst = omap4_pwrdm_read_prev_mem_pwrst, - .pwrdm_set_mem_onst = omap4_pwrdm_set_mem_onst, - .pwrdm_set_mem_retst = omap4_pwrdm_set_mem_retst, - .pwrdm_wait_transition = omap4_pwrdm_wait_transition, -}; diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c new file mode 100644 index 000000000000..218ef6a1f11e --- /dev/null +++ b/arch/arm/mach-omap2/prm2xxx.c @@ -0,0 +1,41 @@ +/* + * OMAP2xxx PRM module functions + * + * Copyright (C) 2010-2012 Texas Instruments, Inc. + * Copyright (C) 2010 Nokia Corporation + * Benoît Cousson + * Paul Walmsley + * Rajendra Nayak + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +#include "common.h" +#include +#include + +#include "vp.h" +#include "powerdomain.h" +#include "prm2xxx.h" +#include "cm2xxx_3xxx.h" +#include "prm-regbits-24xx.h" + +struct pwrdm_ops omap2_pwrdm_operations = { + .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, + .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, + .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, + .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, + .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, + .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, + .pwrdm_read_mem_pwrst = omap2_pwrdm_read_mem_pwrst, + .pwrdm_read_mem_retst = omap2_pwrdm_read_mem_retst, + .pwrdm_wait_transition = omap2_pwrdm_wait_transition, +}; diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index 0d6cc543987d..bdddf5ca67c4 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c @@ -17,7 +17,7 @@ #include #include "common.h" - +#include "powerdomain.h" #include "prm2xxx_3xxx.h" #include "prm-regbits-24xx.h" @@ -98,3 +98,113 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; } + +/* Powerdomain low-level functions */ + +/* Common functions across OMAP2 and OMAP3 */ +int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) +{ + omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, + (pwrst << OMAP_POWERSTATE_SHIFT), + pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); + return 0; +} + +int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) +{ + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL, + OMAP_POWERSTATE_MASK); +} + +int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm) +{ + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTST, + OMAP_POWERSTATEST_MASK); +} + +int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) +{ + u32 m; + + m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); + + omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL); + + return 0; +} + +int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) +{ + u32 m; + + m = omap2_pwrdm_get_mem_bank_retst_mask(bank); + + omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL); + + return 0; +} + +int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m; + + m = omap2_pwrdm_get_mem_bank_stst_mask(bank); + + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST, + m); +} + +int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m; + + m = omap2_pwrdm_get_mem_bank_retst_mask(bank); + + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL, m); +} + +int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) +{ + u32 v; + + v = pwrst << __ffs(OMAP_LOGICRETSTATE_MASK); + omap2_prm_rmw_mod_reg_bits(OMAP_LOGICRETSTATE_MASK, v, pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL); + + return 0; +} + +int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm) +{ + u32 c = 0; + + /* + * REVISIT: pwrdm_wait_transition() may be better implemented + * via a callback and a periodic timer check -- how long do we expect + * powerdomain transitions to take? + */ + + /* XXX Is this udelay() value meaningful? */ + while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP2_PM_PWSTST) & + OMAP_INTRANSITION_MASK) && + (c++ < PWRDM_TRANSITION_BAILOUT)) + udelay(1); + + if (c > PWRDM_TRANSITION_BAILOUT) { + pr_err("powerdomain: %s: waited too long to complete transition\n", + pwrdm->name); + return -EAGAIN; + } + + pr_debug("powerdomain: completed transition in %d loops\n", c); + + return 0; +} + diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h index 8d09a1ac9311..706b0262f3f0 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h @@ -50,6 +50,7 @@ #ifndef __ASSEMBLER__ #include +#include "powerdomain.h" /* Power/reset management domain register get/set */ static inline u32 omap2_prm_read_mod_reg(s16 module, u16 idx) @@ -103,6 +104,18 @@ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); +extern int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst); +extern int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm); +extern int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm); +extern int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst); +extern int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst); +extern int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank); +extern int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank); +extern int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst); +extern int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm); + #endif /* __ASSEMBLER */ /* diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c index e7dbb6cf1255..3417dd3a7c37 100644 --- a/arch/arm/mach-omap2/prm33xx.c +++ b/arch/arm/mach-omap2/prm33xx.c @@ -22,6 +22,7 @@ #include #include "common.h" +#include "powerdomain.h" #include "prm33xx.h" #include "prm-regbits-33xx.h" @@ -133,3 +134,204 @@ int am33xx_prm_deassert_hardreset(u8 shift, s16 inst, return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; } + +static int am33xx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) +{ + am33xx_prm_rmw_reg_bits(OMAP_POWERSTATE_MASK, + (pwrst << OMAP_POWERSTATE_SHIFT), + pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + return 0; +} + +static int am33xx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + v &= OMAP_POWERSTATE_MASK; + v >>= OMAP_POWERSTATE_SHIFT; + + return v; +} + +static int am33xx_pwrdm_read_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); + v &= OMAP_POWERSTATEST_MASK; + v >>= OMAP_POWERSTATEST_SHIFT; + + return v; +} + +static int am33xx_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); + v &= AM33XX_LASTPOWERSTATEENTERED_MASK; + v >>= AM33XX_LASTPOWERSTATEENTERED_SHIFT; + + return v; +} + +static int am33xx_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) +{ + am33xx_prm_rmw_reg_bits(AM33XX_LOWPOWERSTATECHANGE_MASK, + (1 << AM33XX_LOWPOWERSTATECHANGE_SHIFT), + pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + return 0; +} + +static int am33xx_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) +{ + am33xx_prm_rmw_reg_bits(AM33XX_LASTPOWERSTATEENTERED_MASK, + AM33XX_LASTPOWERSTATEENTERED_MASK, + pwrdm->prcm_offs, pwrdm->pwrstst_offs); + return 0; +} + +static int am33xx_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) +{ + u32 m; + + m = pwrdm->logicretstate_mask; + if (!m) + return -EINVAL; + + am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + + return 0; +} + +static int am33xx_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); + v &= AM33XX_LOGICSTATEST_MASK; + v >>= AM33XX_LOGICSTATEST_SHIFT; + + return v; +} + +static int am33xx_pwrdm_read_logic_retst(struct powerdomain *pwrdm) +{ + u32 v, m; + + m = pwrdm->logicretstate_mask; + if (!m) + return -EINVAL; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + v &= m; + v >>= __ffs(m); + + return v; +} + +static int am33xx_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) +{ + u32 m; + + m = pwrdm->mem_on_mask[bank]; + if (!m) + return -EINVAL; + + am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + + return 0; +} + +static int am33xx_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) +{ + u32 m; + + m = pwrdm->mem_ret_mask[bank]; + if (!m) + return -EINVAL; + + am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + + return 0; +} + +static int am33xx_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m, v; + + m = pwrdm->mem_pwrst_mask[bank]; + if (!m) + return -EINVAL; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); + v &= m; + v >>= __ffs(m); + + return v; +} + +static int am33xx_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m, v; + + m = pwrdm->mem_retst_mask[bank]; + if (!m) + return -EINVAL; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + v &= m; + v >>= __ffs(m); + + return v; +} + +static int am33xx_pwrdm_wait_transition(struct powerdomain *pwrdm) +{ + u32 c = 0; + + /* + * REVISIT: pwrdm_wait_transition() may be better implemented + * via a callback and a periodic timer check -- how long do we expect + * powerdomain transitions to take? + */ + + /* XXX Is this udelay() value meaningful? */ + while ((am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs) + & OMAP_INTRANSITION_MASK) && + (c++ < PWRDM_TRANSITION_BAILOUT)) + udelay(1); + + if (c > PWRDM_TRANSITION_BAILOUT) { + pr_err("powerdomain: %s: waited too long to complete transition\n", + pwrdm->name); + return -EAGAIN; + } + + pr_debug("powerdomain: completed transition in %d loops\n", c); + + return 0; +} + +struct pwrdm_ops am33xx_pwrdm_operations = { + .pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst, + .pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst, + .pwrdm_read_pwrst = am33xx_pwrdm_read_pwrst, + .pwrdm_read_prev_pwrst = am33xx_pwrdm_read_prev_pwrst, + .pwrdm_set_logic_retst = am33xx_pwrdm_set_logic_retst, + .pwrdm_read_logic_pwrst = am33xx_pwrdm_read_logic_pwrst, + .pwrdm_read_logic_retst = am33xx_pwrdm_read_logic_retst, + .pwrdm_clear_all_prev_pwrst = am33xx_pwrdm_clear_all_prev_pwrst, + .pwrdm_set_lowpwrstchange = am33xx_pwrdm_set_lowpwrstchange, + .pwrdm_read_mem_pwrst = am33xx_pwrdm_read_mem_pwrst, + .pwrdm_read_mem_retst = am33xx_pwrdm_read_mem_retst, + .pwrdm_set_mem_onst = am33xx_pwrdm_set_mem_onst, + .pwrdm_set_mem_retst = am33xx_pwrdm_set_mem_retst, + .pwrdm_wait_transition = am33xx_pwrdm_wait_transition, +}; diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c index 88f7d8de7da9..e276ff270ac5 100644 --- a/arch/arm/mach-omap2/prm3xxx.c +++ b/arch/arm/mach-omap2/prm3xxx.c @@ -5,6 +5,7 @@ * Copyright (C) 2010 Nokia Corporation * Benoît Cousson * Paul Walmsley + * Rajendra Nayak * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -22,8 +23,9 @@ #include #include "vp.h" - +#include "powerdomain.h" #include "prm3xxx.h" +#include "prm2xxx_3xxx.h" #include "cm2xxx_3xxx.h" #include "prm-regbits-34xx.h" @@ -215,6 +217,109 @@ static void __init omap3xxx_prm_enable_io_wakeup(void) PM_WKEN); } +/* Powerdomain low-level functions */ + +/* Applicable only for OMAP3. Not supported on OMAP2 */ +static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) +{ + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP3430_PM_PREPWSTST, + OMAP3430_LASTPOWERSTATEENTERED_MASK); +} + +static int omap3_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) +{ + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTST, + OMAP3430_LOGICSTATEST_MASK); +} + +static int omap3_pwrdm_read_logic_retst(struct powerdomain *pwrdm) +{ + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL, + OMAP3430_LOGICSTATEST_MASK); +} + +static int omap3_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) +{ + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP3430_PM_PREPWSTST, + OMAP3430_LASTLOGICSTATEENTERED_MASK); +} + +static int omap3_get_mem_bank_lastmemst_mask(u8 bank) +{ + switch (bank) { + case 0: + return OMAP3430_LASTMEM1STATEENTERED_MASK; + case 1: + return OMAP3430_LASTMEM2STATEENTERED_MASK; + case 2: + return OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK; + case 3: + return OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK; + default: + WARN_ON(1); /* should never happen */ + return -EEXIST; + } + return 0; +} + +static int omap3_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m; + + m = omap3_get_mem_bank_lastmemst_mask(bank); + + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP3430_PM_PREPWSTST, m); +} + +static int omap3_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) +{ + omap2_prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST); + return 0; +} + +static int omap3_pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm) +{ + return omap2_prm_rmw_mod_reg_bits(0, + 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, + pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); +} + +static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) +{ + return omap2_prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, + 0, pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL); +} + +struct pwrdm_ops omap3_pwrdm_operations = { + .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, + .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, + .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, + .pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst, + .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, + .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst, + .pwrdm_read_logic_retst = omap3_pwrdm_read_logic_retst, + .pwrdm_read_prev_logic_pwrst = omap3_pwrdm_read_prev_logic_pwrst, + .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, + .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, + .pwrdm_read_mem_pwrst = omap2_pwrdm_read_mem_pwrst, + .pwrdm_read_mem_retst = omap2_pwrdm_read_mem_retst, + .pwrdm_read_prev_mem_pwrst = omap3_pwrdm_read_prev_mem_pwrst, + .pwrdm_clear_all_prev_pwrst = omap3_pwrdm_clear_all_prev_pwrst, + .pwrdm_enable_hdwr_sar = omap3_pwrdm_enable_hdwr_sar, + .pwrdm_disable_hdwr_sar = omap3_pwrdm_disable_hdwr_sar, + .pwrdm_wait_transition = omap2_pwrdm_wait_transition, +}; + +/* + * + */ + static int __init omap3xxx_prm_init(void) { int ret; diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 06bb67910a31..48d91930796d 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -5,6 +5,7 @@ * Copyright (C) 2010 Nokia Corporation * Benoît Cousson * Paul Walmsley + * Rajendra Nayak * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -27,6 +28,7 @@ #include "prm-regbits-44xx.h" #include "prcm44xx.h" #include "prminst44xx.h" +#include "powerdomain.h" static const struct omap_prcm_irq omap4_prcm_irqs[] = { OMAP_PRCM_IRQ("wkup", 0, 0), @@ -291,6 +293,269 @@ static void __init omap44xx_prm_enable_io_wakeup(void) OMAP4_PRM_IO_PMCTRL_OFFSET); } +/* Powerdomain low-level functions */ + +static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) +{ + omap4_prminst_rmw_inst_reg_bits(OMAP_POWERSTATE_MASK, + (pwrst << OMAP_POWERSTATE_SHIFT), + pwrdm->prcm_partition, + pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); + return 0; +} + +static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + v &= OMAP_POWERSTATE_MASK; + v >>= OMAP_POWERSTATE_SHIFT; + + return v; +} + +static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTST); + v &= OMAP_POWERSTATEST_MASK; + v >>= OMAP_POWERSTATEST_SHIFT; + + return v; +} + +static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTST); + v &= OMAP4430_LASTPOWERSTATEENTERED_MASK; + v >>= OMAP4430_LASTPOWERSTATEENTERED_SHIFT; + + return v; +} + +static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) +{ + omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK, + (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT), + pwrdm->prcm_partition, + pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); + return 0; +} + +static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) +{ + omap4_prminst_rmw_inst_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK, + OMAP4430_LASTPOWERSTATEENTERED_MASK, + pwrdm->prcm_partition, + pwrdm->prcm_offs, OMAP4_PM_PWSTST); + return 0; +} + +static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) +{ + u32 v; + + v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK); + omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v, + pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + + return 0; +} + +static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) +{ + u32 m; + + m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); + + omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + + return 0; +} + +static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) +{ + u32 m; + + m = omap2_pwrdm_get_mem_bank_retst_mask(bank); + + omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + + return 0; +} + +static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTST); + v &= OMAP4430_LOGICSTATEST_MASK; + v >>= OMAP4430_LOGICSTATEST_SHIFT; + + return v; +} + +static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm) +{ + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + v &= OMAP4430_LOGICRETSTATE_MASK; + v >>= OMAP4430_LOGICRETSTATE_SHIFT; + + return v; +} + +/** + * omap4_pwrdm_read_prev_logic_pwrst - read the previous logic powerstate + * @pwrdm: struct powerdomain * to read the state for + * + * Reads the previous logic powerstate for a powerdomain. This + * function must determine the previous logic powerstate by first + * checking the previous powerstate for the domain. If that was OFF, + * then logic has been lost. If previous state was RETENTION, the + * function reads the setting for the next retention logic state to + * see the actual value. In every other case, the logic is + * retained. Returns either PWRDM_POWER_OFF or PWRDM_POWER_RET + * depending whether the logic was retained or not. + */ +static int omap4_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) +{ + int state; + + state = omap4_pwrdm_read_prev_pwrst(pwrdm); + + if (state == PWRDM_POWER_OFF) + return PWRDM_POWER_OFF; + + if (state != PWRDM_POWER_RET) + return PWRDM_POWER_RET; + + return omap4_pwrdm_read_logic_retst(pwrdm); +} + +static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m, v; + + m = omap2_pwrdm_get_mem_bank_stst_mask(bank); + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTST); + v &= m; + v >>= __ffs(m); + + return v; +} + +static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m, v; + + m = omap2_pwrdm_get_mem_bank_retst_mask(bank); + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + v &= m; + v >>= __ffs(m); + + return v; +} + +/** + * omap4_pwrdm_read_prev_mem_pwrst - reads the previous memory powerstate + * @pwrdm: struct powerdomain * to read mem powerstate for + * @bank: memory bank index + * + * Reads the previous memory powerstate for a powerdomain. This + * function must determine the previous memory powerstate by first + * checking the previous powerstate for the domain. If that was OFF, + * then logic has been lost. If previous state was RETENTION, the + * function reads the setting for the next memory retention state to + * see the actual value. In every other case, the logic is + * retained. Returns either PWRDM_POWER_OFF or PWRDM_POWER_RET + * depending whether logic was retained or not. + */ +static int omap4_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + int state; + + state = omap4_pwrdm_read_prev_pwrst(pwrdm); + + if (state == PWRDM_POWER_OFF) + return PWRDM_POWER_OFF; + + if (state != PWRDM_POWER_RET) + return PWRDM_POWER_RET; + + return omap4_pwrdm_read_mem_retst(pwrdm, bank); +} + +static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm) +{ + u32 c = 0; + + /* + * REVISIT: pwrdm_wait_transition() may be better implemented + * via a callback and a periodic timer check -- how long do we expect + * powerdomain transitions to take? + */ + + /* XXX Is this udelay() value meaningful? */ + while ((omap4_prminst_read_inst_reg(pwrdm->prcm_partition, + pwrdm->prcm_offs, + OMAP4_PM_PWSTST) & + OMAP_INTRANSITION_MASK) && + (c++ < PWRDM_TRANSITION_BAILOUT)) + udelay(1); + + if (c > PWRDM_TRANSITION_BAILOUT) { + pr_err("powerdomain: %s: waited too long to complete transition\n", + pwrdm->name); + return -EAGAIN; + } + + pr_debug("powerdomain: completed transition in %d loops\n", c); + + return 0; +} + +struct pwrdm_ops omap4_pwrdm_operations = { + .pwrdm_set_next_pwrst = omap4_pwrdm_set_next_pwrst, + .pwrdm_read_next_pwrst = omap4_pwrdm_read_next_pwrst, + .pwrdm_read_pwrst = omap4_pwrdm_read_pwrst, + .pwrdm_read_prev_pwrst = omap4_pwrdm_read_prev_pwrst, + .pwrdm_set_lowpwrstchange = omap4_pwrdm_set_lowpwrstchange, + .pwrdm_clear_all_prev_pwrst = omap4_pwrdm_clear_all_prev_pwrst, + .pwrdm_set_logic_retst = omap4_pwrdm_set_logic_retst, + .pwrdm_read_logic_pwrst = omap4_pwrdm_read_logic_pwrst, + .pwrdm_read_prev_logic_pwrst = omap4_pwrdm_read_prev_logic_pwrst, + .pwrdm_read_logic_retst = omap4_pwrdm_read_logic_retst, + .pwrdm_read_mem_pwrst = omap4_pwrdm_read_mem_pwrst, + .pwrdm_read_mem_retst = omap4_pwrdm_read_mem_retst, + .pwrdm_read_prev_mem_pwrst = omap4_pwrdm_read_prev_mem_pwrst, + .pwrdm_set_mem_onst = omap4_pwrdm_set_mem_onst, + .pwrdm_set_mem_retst = omap4_pwrdm_set_mem_retst, + .pwrdm_wait_transition = omap4_pwrdm_wait_transition, +}; + + static int __init omap4xxx_prm_init(void) { if (!cpu_is_omap44xx()) -- cgit v1.2.3 From 4bd5259e53accda0fe295d3b25da348f4d5f4b09 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sun, 21 Oct 2012 01:01:11 -0600 Subject: ARM: OMAP2/3: clockdomain/PRM/CM: move the low-level clockdomain functions into PRM/CM Move the low-level SoC-specific clockdomain control functions into cm*.c and prm*.c. For example, OMAP2xxx low-level clockdomain functions go into cm2xxx.c. Then remove the unnecessary clockdomain*xxx*.c files. The objective is to centralize low-level CM and PRM register accesses into the cm*.[ch] and prm*.[ch] files, and then to export an OMAP SoC-independent API to higher-level OMAP power management code. Signed-off-by: Paul Walmsley Cc: Rajendra Nayak Cc: Vaibhav Hiremath Acked-by: Rajendra Nayak Reviewed-by: Russ Dill Acked-by: Santosh Shilimkar --- arch/arm/mach-omap2/Makefile | 5 - arch/arm/mach-omap2/clockdomain2xxx_3xxx.c | 340 ----------------------------- arch/arm/mach-omap2/clockdomain33xx.c | 74 ------- arch/arm/mach-omap2/clockdomain44xx.c | 151 ------------- arch/arm/mach-omap2/cm2xxx.c | 89 +++++++- arch/arm/mach-omap2/cm2xxx_3xxx.h | 12 + arch/arm/mach-omap2/cm33xx.c | 56 +++++ arch/arm/mach-omap2/cm3xxx.c | 174 ++++++++++++++- arch/arm/mach-omap2/cminst44xx.c | 142 +++++++++++- arch/arm/mach-omap2/prm2xxx.c | 17 ++ arch/arm/mach-omap2/prm2xxx.h | 6 + arch/arm/mach-omap2/prm2xxx_3xxx.c | 43 ++++ arch/arm/mach-omap2/prm2xxx_3xxx.h | 8 + 13 files changed, 543 insertions(+), 574 deletions(-) delete mode 100644 arch/arm/mach-omap2/clockdomain2xxx_3xxx.c delete mode 100644 arch/arm/mach-omap2/clockdomain33xx.c delete mode 100644 arch/arm/mach-omap2/clockdomain44xx.c (limited to 'arch/arm/mach-omap2/prm2xxx_3xxx.h') diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 56a33869c8b2..3751d56853ef 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -133,22 +133,17 @@ obj-$(CONFIG_SOC_OMAP5) += $(powerdomain-common) # PRCM clockdomain control clockdomain-common += clockdomain.o obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common) -obj-$(CONFIG_ARCH_OMAP2) += clockdomain2xxx_3xxx.o obj-$(CONFIG_ARCH_OMAP2) += clockdomains2xxx_3xxx_data.o obj-$(CONFIG_SOC_OMAP2420) += clockdomains2420_data.o obj-$(CONFIG_SOC_OMAP2430) += clockdomains2430_data.o obj-$(CONFIG_ARCH_OMAP3) += $(clockdomain-common) -obj-$(CONFIG_ARCH_OMAP3) += clockdomain2xxx_3xxx.o obj-$(CONFIG_ARCH_OMAP3) += clockdomains2xxx_3xxx_data.o obj-$(CONFIG_ARCH_OMAP3) += clockdomains3xxx_data.o obj-$(CONFIG_ARCH_OMAP4) += $(clockdomain-common) -obj-$(CONFIG_ARCH_OMAP4) += clockdomain44xx.o obj-$(CONFIG_ARCH_OMAP4) += clockdomains44xx_data.o obj-$(CONFIG_SOC_AM33XX) += $(clockdomain-common) -obj-$(CONFIG_SOC_AM33XX) += clockdomain33xx.o obj-$(CONFIG_SOC_AM33XX) += clockdomains33xx_data.o obj-$(CONFIG_SOC_OMAP5) += $(clockdomain-common) -obj-$(CONFIG_SOC_OMAP5) += clockdomain44xx.o # Clock framework obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c deleted file mode 100644 index 658487c34cb2..000000000000 --- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c +++ /dev/null @@ -1,340 +0,0 @@ -/* - * OMAP2 and OMAP3 clockdomain control - * - * Copyright (C) 2008-2010 Texas Instruments, Inc. - * Copyright (C) 2008-2010 Nokia Corporation - * - * Derived from mach-omap2/clockdomain.c written by Paul Walmsley - * Rajendra Nayak - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include "prm.h" -#include "prm2xxx_3xxx.h" -#include "cm.h" -#include "cm2xxx.h" -#include "cm3xxx.h" -#include "cm-regbits-24xx.h" -#include "cm-regbits-34xx.h" -#include "prm-regbits-24xx.h" -#include "clockdomain.h" - -static int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit), - clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); - return 0; -} - -static int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit), - clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); - return 0; -} - -static int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, - PM_WKDEP, (1 << clkdm2->dep_bit)); -} - -static int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm) -{ - struct clkdm_dep *cd; - u32 mask = 0; - - for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { - if (!cd->clkdm) - continue; /* only happens if data is erroneous */ - - /* PRM accesses are slow, so minimize them */ - mask |= 1 << cd->clkdm->dep_bit; - atomic_set(&cd->wkdep_usecount, 0); - } - - omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, - PM_WKDEP); - return 0; -} - -static int omap3_clkdm_add_sleepdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit), - clkdm1->pwrdm.ptr->prcm_offs, - OMAP3430_CM_SLEEPDEP); - return 0; -} - -static int omap3_clkdm_del_sleepdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit), - clkdm1->pwrdm.ptr->prcm_offs, - OMAP3430_CM_SLEEPDEP); - return 0; -} - -static int omap3_clkdm_read_sleepdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, - OMAP3430_CM_SLEEPDEP, (1 << clkdm2->dep_bit)); -} - -static int omap3_clkdm_clear_all_sleepdeps(struct clockdomain *clkdm) -{ - struct clkdm_dep *cd; - u32 mask = 0; - - for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) { - if (!cd->clkdm) - continue; /* only happens if data is erroneous */ - - /* PRM accesses are slow, so minimize them */ - mask |= 1 << cd->clkdm->dep_bit; - atomic_set(&cd->sleepdep_usecount, 0); - } - omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, - OMAP3430_CM_SLEEPDEP); - return 0; -} - -static int omap2_clkdm_sleep(struct clockdomain *clkdm) -{ - omap2_cm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, - clkdm->pwrdm.ptr->prcm_offs, - OMAP2_PM_PWSTCTRL); - return 0; -} - -static int omap2_clkdm_wakeup(struct clockdomain *clkdm) -{ - omap2_cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, - clkdm->pwrdm.ptr->prcm_offs, - OMAP2_PM_PWSTCTRL); - return 0; -} - -static void omap2_clkdm_allow_idle(struct clockdomain *clkdm) -{ - if (atomic_read(&clkdm->usecount) > 0) - _clkdm_add_autodeps(clkdm); - - omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); -} - -static void omap2_clkdm_deny_idle(struct clockdomain *clkdm) -{ - omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (atomic_read(&clkdm->usecount) > 0) - _clkdm_del_autodeps(clkdm); -} - -static void _enable_hwsup(struct clockdomain *clkdm) -{ - if (cpu_is_omap24xx()) - omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - else if (cpu_is_omap34xx()) - omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); -} - -static void _disable_hwsup(struct clockdomain *clkdm) -{ - if (cpu_is_omap24xx()) - omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - else if (cpu_is_omap34xx()) - omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); -} - -static int omap3_clkdm_sleep(struct clockdomain *clkdm) -{ - omap3xxx_cm_clkdm_force_sleep(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - return 0; -} - -static int omap3_clkdm_wakeup(struct clockdomain *clkdm) -{ - omap3xxx_cm_clkdm_force_wakeup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - return 0; -} - -static int omap2xxx_clkdm_clk_enable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - if (!clkdm->clktrctrl_mask) - return 0; - - hwsup = omap3xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (hwsup) { - /* Disable HW transitions when we are changing deps */ - _disable_hwsup(clkdm); - _clkdm_add_autodeps(clkdm); - _enable_hwsup(clkdm); - } else { - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - omap2_clkdm_wakeup(clkdm); - } - - return 0; -} - -static int omap2xxx_clkdm_clk_disable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - if (!clkdm->clktrctrl_mask) - return 0; - - hwsup = omap3xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (hwsup) { - /* Disable HW transitions when we are changing deps */ - _disable_hwsup(clkdm); - _clkdm_del_autodeps(clkdm); - _enable_hwsup(clkdm); - } else { - if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) - omap2_clkdm_sleep(clkdm); - } - - return 0; -} - -static void omap3_clkdm_allow_idle(struct clockdomain *clkdm) -{ - if (atomic_read(&clkdm->usecount) > 0) - _clkdm_add_autodeps(clkdm); - - omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); -} - -static void omap3_clkdm_deny_idle(struct clockdomain *clkdm) -{ - omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (atomic_read(&clkdm->usecount) > 0) - _clkdm_del_autodeps(clkdm); -} - -static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - if (!clkdm->clktrctrl_mask) - return 0; - - /* - * The CLKDM_MISSING_IDLE_REPORTING flag documentation has - * more details on the unpleasant problem this is working - * around - */ - if ((clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) && - (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) { - omap3_clkdm_wakeup(clkdm); - return 0; - } - - hwsup = omap2xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (hwsup) { - /* Disable HW transitions when we are changing deps */ - _disable_hwsup(clkdm); - _clkdm_add_autodeps(clkdm); - _enable_hwsup(clkdm); - } else { - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - omap3_clkdm_wakeup(clkdm); - } - - return 0; -} - -static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - if (!clkdm->clktrctrl_mask) - return 0; - - /* - * The CLKDM_MISSING_IDLE_REPORTING flag documentation has - * more details on the unpleasant problem this is working - * around - */ - if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING && - !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { - _enable_hwsup(clkdm); - return 0; - } - - hwsup = omap2xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (hwsup) { - /* Disable HW transitions when we are changing deps */ - _disable_hwsup(clkdm); - _clkdm_del_autodeps(clkdm); - _enable_hwsup(clkdm); - } else { - if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) - omap3_clkdm_sleep(clkdm); - } - - return 0; -} - -struct clkdm_ops omap2_clkdm_operations = { - .clkdm_add_wkdep = omap2_clkdm_add_wkdep, - .clkdm_del_wkdep = omap2_clkdm_del_wkdep, - .clkdm_read_wkdep = omap2_clkdm_read_wkdep, - .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps, - .clkdm_sleep = omap2_clkdm_sleep, - .clkdm_wakeup = omap2_clkdm_wakeup, - .clkdm_allow_idle = omap2_clkdm_allow_idle, - .clkdm_deny_idle = omap2_clkdm_deny_idle, - .clkdm_clk_enable = omap2xxx_clkdm_clk_enable, - .clkdm_clk_disable = omap2xxx_clkdm_clk_disable, -}; - -struct clkdm_ops omap3_clkdm_operations = { - .clkdm_add_wkdep = omap2_clkdm_add_wkdep, - .clkdm_del_wkdep = omap2_clkdm_del_wkdep, - .clkdm_read_wkdep = omap2_clkdm_read_wkdep, - .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps, - .clkdm_add_sleepdep = omap3_clkdm_add_sleepdep, - .clkdm_del_sleepdep = omap3_clkdm_del_sleepdep, - .clkdm_read_sleepdep = omap3_clkdm_read_sleepdep, - .clkdm_clear_all_sleepdeps = omap3_clkdm_clear_all_sleepdeps, - .clkdm_sleep = omap3_clkdm_sleep, - .clkdm_wakeup = omap3_clkdm_wakeup, - .clkdm_allow_idle = omap3_clkdm_allow_idle, - .clkdm_deny_idle = omap3_clkdm_deny_idle, - .clkdm_clk_enable = omap3xxx_clkdm_clk_enable, - .clkdm_clk_disable = omap3xxx_clkdm_clk_disable, -}; diff --git a/arch/arm/mach-omap2/clockdomain33xx.c b/arch/arm/mach-omap2/clockdomain33xx.c deleted file mode 100644 index aca6388fad76..000000000000 --- a/arch/arm/mach-omap2/clockdomain33xx.c +++ /dev/null @@ -1,74 +0,0 @@ -/* - * AM33XX clockdomain control - * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ - * Vaibhav Hiremath - * - * Derived from mach-omap2/clockdomain44xx.c written by Rajendra Nayak - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include - -#include "clockdomain.h" -#include "cm33xx.h" - - -static int am33xx_clkdm_sleep(struct clockdomain *clkdm) -{ - am33xx_cm_clkdm_force_sleep(clkdm->cm_inst, clkdm->clkdm_offs); - return 0; -} - -static int am33xx_clkdm_wakeup(struct clockdomain *clkdm) -{ - am33xx_cm_clkdm_force_wakeup(clkdm->cm_inst, clkdm->clkdm_offs); - return 0; -} - -static void am33xx_clkdm_allow_idle(struct clockdomain *clkdm) -{ - am33xx_cm_clkdm_enable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); -} - -static void am33xx_clkdm_deny_idle(struct clockdomain *clkdm) -{ - am33xx_cm_clkdm_disable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); -} - -static int am33xx_clkdm_clk_enable(struct clockdomain *clkdm) -{ - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - return am33xx_clkdm_wakeup(clkdm); - - return 0; -} - -static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); - - if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) - am33xx_clkdm_sleep(clkdm); - - return 0; -} - -struct clkdm_ops am33xx_clkdm_operations = { - .clkdm_sleep = am33xx_clkdm_sleep, - .clkdm_wakeup = am33xx_clkdm_wakeup, - .clkdm_allow_idle = am33xx_clkdm_allow_idle, - .clkdm_deny_idle = am33xx_clkdm_deny_idle, - .clkdm_clk_enable = am33xx_clkdm_clk_enable, - .clkdm_clk_disable = am33xx_clkdm_clk_disable, -}; diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach-omap2/clockdomain44xx.c deleted file mode 100644 index 6fc6155625bc..000000000000 --- a/arch/arm/mach-omap2/clockdomain44xx.c +++ /dev/null @@ -1,151 +0,0 @@ -/* - * OMAP4 clockdomain control - * - * Copyright (C) 2008-2010 Texas Instruments, Inc. - * Copyright (C) 2008-2010 Nokia Corporation - * - * Derived from mach-omap2/clockdomain.c written by Paul Walmsley - * Rajendra Nayak - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include "clockdomain.h" -#include "cminst44xx.h" -#include "cm44xx.h" - -static int omap4_clkdm_add_wkup_sleep_dep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap4_cminst_set_inst_reg_bits((1 << clkdm2->dep_bit), - clkdm1->prcm_partition, - clkdm1->cm_inst, clkdm1->clkdm_offs + - OMAP4_CM_STATICDEP); - return 0; -} - -static int omap4_clkdm_del_wkup_sleep_dep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap4_cminst_clear_inst_reg_bits((1 << clkdm2->dep_bit), - clkdm1->prcm_partition, - clkdm1->cm_inst, clkdm1->clkdm_offs + - OMAP4_CM_STATICDEP); - return 0; -} - -static int omap4_clkdm_read_wkup_sleep_dep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - return omap4_cminst_read_inst_reg_bits(clkdm1->prcm_partition, - clkdm1->cm_inst, clkdm1->clkdm_offs + - OMAP4_CM_STATICDEP, - (1 << clkdm2->dep_bit)); -} - -static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm) -{ - struct clkdm_dep *cd; - u32 mask = 0; - - if (!clkdm->prcm_partition) - return 0; - - for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { - if (!cd->clkdm) - continue; /* only happens if data is erroneous */ - - mask |= 1 << cd->clkdm->dep_bit; - atomic_set(&cd->wkdep_usecount, 0); - } - - omap4_cminst_clear_inst_reg_bits(mask, clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs + - OMAP4_CM_STATICDEP); - return 0; -} - -static int omap4_clkdm_sleep(struct clockdomain *clkdm) -{ - omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs); - return 0; -} - -static int omap4_clkdm_wakeup(struct clockdomain *clkdm) -{ - omap4_cminst_clkdm_force_wakeup(clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs); - return 0; -} - -static void omap4_clkdm_allow_idle(struct clockdomain *clkdm) -{ - omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs); -} - -static void omap4_clkdm_deny_idle(struct clockdomain *clkdm) -{ - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - omap4_clkdm_wakeup(clkdm); - else - omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition, - clkdm->cm_inst, - clkdm->clkdm_offs); -} - -static int omap4_clkdm_clk_enable(struct clockdomain *clkdm) -{ - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - return omap4_clkdm_wakeup(clkdm); - - return 0; -} - -static int omap4_clkdm_clk_disable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - if (!clkdm->prcm_partition) - return 0; - - /* - * The CLKDM_MISSING_IDLE_REPORTING flag documentation has - * more details on the unpleasant problem this is working - * around - */ - if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING && - !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { - omap4_clkdm_allow_idle(clkdm); - return 0; - } - - hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs); - - if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) - omap4_clkdm_sleep(clkdm); - - return 0; -} - -struct clkdm_ops omap4_clkdm_operations = { - .clkdm_add_wkdep = omap4_clkdm_add_wkup_sleep_dep, - .clkdm_del_wkdep = omap4_clkdm_del_wkup_sleep_dep, - .clkdm_read_wkdep = omap4_clkdm_read_wkup_sleep_dep, - .clkdm_clear_all_wkdeps = omap4_clkdm_clear_all_wkup_sleep_deps, - .clkdm_add_sleepdep = omap4_clkdm_add_wkup_sleep_dep, - .clkdm_del_sleepdep = omap4_clkdm_del_wkup_sleep_dep, - .clkdm_read_sleepdep = omap4_clkdm_read_wkup_sleep_dep, - .clkdm_clear_all_sleepdeps = omap4_clkdm_clear_all_wkup_sleep_deps, - .clkdm_sleep = omap4_clkdm_sleep, - .clkdm_wakeup = omap4_clkdm_wakeup, - .clkdm_allow_idle = omap4_clkdm_allow_idle, - .clkdm_deny_idle = omap4_clkdm_deny_idle, - .clkdm_clk_enable = omap4_clkdm_clk_enable, - .clkdm_clk_disable = omap4_clkdm_clk_disable, -}; diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c index 051349370711..64165013daf9 100644 --- a/arch/arm/mach-omap2/cm2xxx.c +++ b/arch/arm/mach-omap2/cm2xxx.c @@ -2,8 +2,9 @@ * OMAP2xxx CM module functions * * Copyright (C) 2009 Nokia Corporation - * Copyright (C) 2012 Texas Instruments, Inc. + * Copyright (C) 2008-2010, 2012 Texas Instruments, Inc. * Paul Walmsley + * Rajendra Nayak * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -20,9 +21,11 @@ #include "soc.h" #include "iomap.h" #include "common.h" +#include "prm2xxx.h" #include "cm.h" #include "cm2xxx.h" #include "cm-regbits-24xx.h" +#include "clockdomain.h" /* CM_AUTOIDLE_PLL.AUTO_* bit values for DPLLs */ #define DPLL_AUTOIDLE_DISABLE 0x0 @@ -166,3 +169,87 @@ int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; } + +/* Clockdomain low-level functions */ + +static void omap2xxx_clkdm_allow_idle(struct clockdomain *clkdm) +{ + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_add_autodeps(clkdm); + + omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); +} + +static void omap2xxx_clkdm_deny_idle(struct clockdomain *clkdm) +{ + omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_del_autodeps(clkdm); +} + +static int omap2xxx_clkdm_clk_enable(struct clockdomain *clkdm) +{ + bool hwsup = false; + + if (!clkdm->clktrctrl_mask) + return 0; + + hwsup = omap2xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (hwsup) { + /* Disable HW transitions when we are changing deps */ + omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + _clkdm_add_autodeps(clkdm); + omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + } else { + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + omap2xxx_clkdm_wakeup(clkdm); + } + + return 0; +} + +static int omap2xxx_clkdm_clk_disable(struct clockdomain *clkdm) +{ + bool hwsup = false; + + if (!clkdm->clktrctrl_mask) + return 0; + + hwsup = omap2xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (hwsup) { + /* Disable HW transitions when we are changing deps */ + omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + _clkdm_del_autodeps(clkdm); + omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + } else { + if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) + omap2xxx_clkdm_sleep(clkdm); + } + + return 0; +} + +struct clkdm_ops omap2_clkdm_operations = { + .clkdm_add_wkdep = omap2_clkdm_add_wkdep, + .clkdm_del_wkdep = omap2_clkdm_del_wkdep, + .clkdm_read_wkdep = omap2_clkdm_read_wkdep, + .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps, + .clkdm_sleep = omap2xxx_clkdm_sleep, + .clkdm_wakeup = omap2xxx_clkdm_wakeup, + .clkdm_allow_idle = omap2xxx_clkdm_allow_idle, + .clkdm_deny_idle = omap2xxx_clkdm_deny_idle, + .clkdm_clk_enable = omap2xxx_clkdm_clk_enable, + .clkdm_clk_disable = omap2xxx_clkdm_clk_disable, +}; + diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.h b/arch/arm/mach-omap2/cm2xxx_3xxx.h index 865d332f6fb1..0e26bb1bf7e2 100644 --- a/arch/arm/mach-omap2/cm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/cm2xxx_3xxx.h @@ -74,6 +74,18 @@ static inline u32 omap2_cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, return v; } +/* Read a CM register, AND it, and shift the result down to bit 0 */ +static inline u32 omap2_cm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) +{ + u32 v; + + v = omap2_cm_read_mod_reg(domain, idx); + v &= mask; + v >>= __ffs(mask); + + return v; +} + static inline u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) { return omap2_cm_rmw_mod_reg_bits(bits, bits, module, idx); diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c index 13f56eafef03..9b3bcff127ff 100644 --- a/arch/arm/mach-omap2/cm33xx.c +++ b/arch/arm/mach-omap2/cm33xx.c @@ -24,6 +24,7 @@ #include +#include "clockdomain.h" #include "cm.h" #include "cm33xx.h" #include "cm-regbits-34xx.h" @@ -311,3 +312,58 @@ void am33xx_cm_module_disable(u16 inst, s16 cdoffs, u16 clkctrl_offs) v &= ~AM33XX_MODULEMODE_MASK; am33xx_cm_write_reg(v, inst, clkctrl_offs); } + +/* + * Clockdomain low-level functions + */ + +static int am33xx_clkdm_sleep(struct clockdomain *clkdm) +{ + am33xx_cm_clkdm_force_sleep(clkdm->cm_inst, clkdm->clkdm_offs); + return 0; +} + +static int am33xx_clkdm_wakeup(struct clockdomain *clkdm) +{ + am33xx_cm_clkdm_force_wakeup(clkdm->cm_inst, clkdm->clkdm_offs); + return 0; +} + +static void am33xx_clkdm_allow_idle(struct clockdomain *clkdm) +{ + am33xx_cm_clkdm_enable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); +} + +static void am33xx_clkdm_deny_idle(struct clockdomain *clkdm) +{ + am33xx_cm_clkdm_disable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); +} + +static int am33xx_clkdm_clk_enable(struct clockdomain *clkdm) +{ + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + return am33xx_clkdm_wakeup(clkdm); + + return 0; +} + +static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm) +{ + bool hwsup = false; + + hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); + + if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) + am33xx_clkdm_sleep(clkdm); + + return 0; +} + +struct clkdm_ops am33xx_clkdm_operations = { + .clkdm_sleep = am33xx_clkdm_sleep, + .clkdm_wakeup = am33xx_clkdm_wakeup, + .clkdm_allow_idle = am33xx_clkdm_allow_idle, + .clkdm_deny_idle = am33xx_clkdm_deny_idle, + .clkdm_clk_enable = am33xx_clkdm_clk_enable, + .clkdm_clk_disable = am33xx_clkdm_clk_disable, +}; diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c index 8f92c56e2254..8b03ec2f4394 100644 --- a/arch/arm/mach-omap2/cm3xxx.c +++ b/arch/arm/mach-omap2/cm3xxx.c @@ -1,9 +1,10 @@ /* - * OMAP2/3 CM module functions + * OMAP3xxx CM module functions * * Copyright (C) 2009 Nokia Corporation - * Copyright (C) 2012 Texas Instruments, Inc. + * Copyright (C) 2008-2010, 2012 Texas Instruments, Inc. * Paul Walmsley + * Rajendra Nayak * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -20,9 +21,11 @@ #include "soc.h" #include "iomap.h" #include "common.h" +#include "prm2xxx_3xxx.h" #include "cm.h" #include "cm3xxx.h" #include "cm-regbits-34xx.h" +#include "clockdomain.h" static const u8 omap3xxx_cm_idlest_offs[] = { CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3 @@ -107,6 +110,173 @@ int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; } +/* Clockdomain low-level operations */ + +static int omap3xxx_clkdm_add_sleepdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit), + clkdm1->pwrdm.ptr->prcm_offs, + OMAP3430_CM_SLEEPDEP); + return 0; +} + +static int omap3xxx_clkdm_del_sleepdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit), + clkdm1->pwrdm.ptr->prcm_offs, + OMAP3430_CM_SLEEPDEP); + return 0; +} + +static int omap3xxx_clkdm_read_sleepdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + return omap2_cm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, + OMAP3430_CM_SLEEPDEP, + (1 << clkdm2->dep_bit)); +} + +static int omap3xxx_clkdm_clear_all_sleepdeps(struct clockdomain *clkdm) +{ + struct clkdm_dep *cd; + u32 mask = 0; + + for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) { + if (!cd->clkdm) + continue; /* only happens if data is erroneous */ + + mask |= 1 << cd->clkdm->dep_bit; + atomic_set(&cd->sleepdep_usecount, 0); + } + omap2_cm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, + OMAP3430_CM_SLEEPDEP); + return 0; +} + +static int omap3xxx_clkdm_sleep(struct clockdomain *clkdm) +{ + omap3xxx_cm_clkdm_force_sleep(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + return 0; +} + +static int omap3xxx_clkdm_wakeup(struct clockdomain *clkdm) +{ + omap3xxx_cm_clkdm_force_wakeup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + return 0; +} + +static void omap3xxx_clkdm_allow_idle(struct clockdomain *clkdm) +{ + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_add_autodeps(clkdm); + + omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); +} + +static void omap3xxx_clkdm_deny_idle(struct clockdomain *clkdm) +{ + omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_del_autodeps(clkdm); +} + +static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm) +{ + bool hwsup = false; + + if (!clkdm->clktrctrl_mask) + return 0; + + /* + * The CLKDM_MISSING_IDLE_REPORTING flag documentation has + * more details on the unpleasant problem this is working + * around + */ + if ((clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) && + (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) { + omap3xxx_clkdm_wakeup(clkdm); + return 0; + } + + hwsup = omap3xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (hwsup) { + /* Disable HW transitions when we are changing deps */ + omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + _clkdm_add_autodeps(clkdm); + omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + } else { + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + omap3xxx_clkdm_wakeup(clkdm); + } + + return 0; +} + +static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm) +{ + bool hwsup = false; + + if (!clkdm->clktrctrl_mask) + return 0; + + /* + * The CLKDM_MISSING_IDLE_REPORTING flag documentation has + * more details on the unpleasant problem this is working + * around + */ + if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING && + !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { + omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + return 0; + } + + hwsup = omap3xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (hwsup) { + /* Disable HW transitions when we are changing deps */ + omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + _clkdm_del_autodeps(clkdm); + omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + } else { + if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) + omap3xxx_clkdm_sleep(clkdm); + } + + return 0; +} + +struct clkdm_ops omap3_clkdm_operations = { + .clkdm_add_wkdep = omap2_clkdm_add_wkdep, + .clkdm_del_wkdep = omap2_clkdm_del_wkdep, + .clkdm_read_wkdep = omap2_clkdm_read_wkdep, + .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps, + .clkdm_add_sleepdep = omap3xxx_clkdm_add_sleepdep, + .clkdm_del_sleepdep = omap3xxx_clkdm_del_sleepdep, + .clkdm_read_sleepdep = omap3xxx_clkdm_read_sleepdep, + .clkdm_clear_all_sleepdeps = omap3xxx_clkdm_clear_all_sleepdeps, + .clkdm_sleep = omap3xxx_clkdm_sleep, + .clkdm_wakeup = omap3xxx_clkdm_wakeup, + .clkdm_allow_idle = omap3xxx_clkdm_allow_idle, + .clkdm_deny_idle = omap3xxx_clkdm_deny_idle, + .clkdm_clk_enable = omap3xxx_clkdm_clk_enable, + .clkdm_clk_disable = omap3xxx_clkdm_clk_disable, +}; + /* * Context save/restore code - OMAP3 only */ diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index 1894015ff04b..7f9a464f01e9 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -2,8 +2,9 @@ * OMAP4 CM instance functions * * Copyright (C) 2009 Nokia Corporation - * Copyright (C) 2011 Texas Instruments, Inc. + * Copyright (C) 2008-2011 Texas Instruments, Inc. * Paul Walmsley + * Rajendra Nayak * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -22,6 +23,7 @@ #include "iomap.h" #include "common.h" +#include "clockdomain.h" #include "cm.h" #include "cm1_44xx.h" #include "cm2_44xx.h" @@ -343,3 +345,141 @@ void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, v &= ~OMAP4430_MODULEMODE_MASK; omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs); } + +/* + * Clockdomain low-level functions + */ + +static int omap4_clkdm_add_wkup_sleep_dep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap4_cminst_set_inst_reg_bits((1 << clkdm2->dep_bit), + clkdm1->prcm_partition, + clkdm1->cm_inst, clkdm1->clkdm_offs + + OMAP4_CM_STATICDEP); + return 0; +} + +static int omap4_clkdm_del_wkup_sleep_dep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap4_cminst_clear_inst_reg_bits((1 << clkdm2->dep_bit), + clkdm1->prcm_partition, + clkdm1->cm_inst, clkdm1->clkdm_offs + + OMAP4_CM_STATICDEP); + return 0; +} + +static int omap4_clkdm_read_wkup_sleep_dep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + return omap4_cminst_read_inst_reg_bits(clkdm1->prcm_partition, + clkdm1->cm_inst, + clkdm1->clkdm_offs + + OMAP4_CM_STATICDEP, + (1 << clkdm2->dep_bit)); +} + +static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm) +{ + struct clkdm_dep *cd; + u32 mask = 0; + + if (!clkdm->prcm_partition) + return 0; + + for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { + if (!cd->clkdm) + continue; /* only happens if data is erroneous */ + + mask |= 1 << cd->clkdm->dep_bit; + atomic_set(&cd->wkdep_usecount, 0); + } + + omap4_cminst_clear_inst_reg_bits(mask, clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs + + OMAP4_CM_STATICDEP); + return 0; +} + +static int omap4_clkdm_sleep(struct clockdomain *clkdm) +{ + omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs); + return 0; +} + +static int omap4_clkdm_wakeup(struct clockdomain *clkdm) +{ + omap4_cminst_clkdm_force_wakeup(clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs); + return 0; +} + +static void omap4_clkdm_allow_idle(struct clockdomain *clkdm) +{ + omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs); +} + +static void omap4_clkdm_deny_idle(struct clockdomain *clkdm) +{ + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + omap4_clkdm_wakeup(clkdm); + else + omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition, + clkdm->cm_inst, + clkdm->clkdm_offs); +} + +static int omap4_clkdm_clk_enable(struct clockdomain *clkdm) +{ + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + return omap4_clkdm_wakeup(clkdm); + + return 0; +} + +static int omap4_clkdm_clk_disable(struct clockdomain *clkdm) +{ + bool hwsup = false; + + if (!clkdm->prcm_partition) + return 0; + + /* + * The CLKDM_MISSING_IDLE_REPORTING flag documentation has + * more details on the unpleasant problem this is working + * around + */ + if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING && + !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { + omap4_clkdm_allow_idle(clkdm); + return 0; + } + + hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs); + + if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) + omap4_clkdm_sleep(clkdm); + + return 0; +} + +struct clkdm_ops omap4_clkdm_operations = { + .clkdm_add_wkdep = omap4_clkdm_add_wkup_sleep_dep, + .clkdm_del_wkdep = omap4_clkdm_del_wkup_sleep_dep, + .clkdm_read_wkdep = omap4_clkdm_read_wkup_sleep_dep, + .clkdm_clear_all_wkdeps = omap4_clkdm_clear_all_wkup_sleep_deps, + .clkdm_add_sleepdep = omap4_clkdm_add_wkup_sleep_dep, + .clkdm_del_sleepdep = omap4_clkdm_del_wkup_sleep_dep, + .clkdm_read_sleepdep = omap4_clkdm_read_wkup_sleep_dep, + .clkdm_clear_all_sleepdeps = omap4_clkdm_clear_all_wkup_sleep_deps, + .clkdm_sleep = omap4_clkdm_sleep, + .clkdm_wakeup = omap4_clkdm_wakeup, + .clkdm_allow_idle = omap4_clkdm_allow_idle, + .clkdm_deny_idle = omap4_clkdm_deny_idle, + .clkdm_clk_enable = omap4_clkdm_clk_enable, + .clkdm_clk_disable = omap4_clkdm_clk_disable, +}; diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c index 218ef6a1f11e..9cdb4e5e3d80 100644 --- a/arch/arm/mach-omap2/prm2xxx.c +++ b/arch/arm/mach-omap2/prm2xxx.c @@ -24,10 +24,27 @@ #include "vp.h" #include "powerdomain.h" +#include "clockdomain.h" #include "prm2xxx.h" #include "cm2xxx_3xxx.h" #include "prm-regbits-24xx.h" +int omap2xxx_clkdm_sleep(struct clockdomain *clkdm) +{ + omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, + clkdm->pwrdm.ptr->prcm_offs, + OMAP2_PM_PWSTCTRL); + return 0; +} + +int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm) +{ + omap2_prm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, + clkdm->pwrdm.ptr->prcm_offs, + OMAP2_PM_PWSTCTRL); + return 0; +} + struct pwrdm_ops omap2_pwrdm_operations = { .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h index 6490e1a580e8..6d76716a1ea5 100644 --- a/arch/arm/mach-omap2/prm2xxx.h +++ b/arch/arm/mach-omap2/prm2xxx.h @@ -119,4 +119,10 @@ #define OMAP24XX_PRCM_IRQSTATUS_IVA 0x00f8 #define OMAP24XX_PRCM_IRQENABLE_IVA 0x00fc +#ifndef __ASSEMBLER__ +/* Function prototypes */ +extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm); +extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm); +#endif + #endif diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index bdddf5ca67c4..30517f5af707 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c @@ -20,6 +20,7 @@ #include "powerdomain.h" #include "prm2xxx_3xxx.h" #include "prm-regbits-24xx.h" +#include "clockdomain.h" /** * omap2_prm_is_hardreset_asserted - read the HW reset line state of @@ -208,3 +209,45 @@ int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm) return 0; } +int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit), + clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); + return 0; +} + +int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit), + clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); + return 0; +} + +int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, + PM_WKDEP, (1 << clkdm2->dep_bit)); +} + +int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm) +{ + struct clkdm_dep *cd; + u32 mask = 0; + + for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { + if (!cd->clkdm) + continue; /* only happens if data is erroneous */ + + /* PRM accesses are slow, so minimize them */ + mask |= 1 << cd->clkdm->dep_bit; + atomic_set(&cd->wkdep_usecount, 0); + } + + omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, + PM_WKDEP); + return 0; +} + diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h index 706b0262f3f0..22a405a1543b 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h @@ -116,6 +116,14 @@ extern int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank); extern int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst); extern int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm); +extern int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2); +extern int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2); +extern int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2); +extern int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm); + #endif /* __ASSEMBLER */ /* -- cgit v1.2.3 From 2bb2a5d30abb0dc99d074877bfad2056142c730b Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sun, 21 Oct 2012 01:01:13 -0600 Subject: ARM: OMAP2+: PRM: create PRM reset source API for the watchdog timer driver The OMAP watchdog timer driver needs to determine what caused the SoC to reset for its GETBOOTSTATUS ioctl. So, define a set of standard reset sources across OMAP SoCs. For OMAP2xxx, 3xxx, and 4xxx SoCs, define mappings from the SoC-specific reset source register bits to the standardized reset source IDs. Create SoC-specific PRM functions that read the appropriate per-SoC register and use the mapping to return the standardized reset bits. Register the SoC-specific PRM functions with the common PRM code via prm_register(). Create a function in the common PRM code, prm_read_reset_sources(), that calls the SoC-specific function, registered during boot. This patch does not yet handle some SoCs, such as AM33xx. Those SoCs were not handled by the code this will replace. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/prm-regbits-24xx.h | 4 ++ arch/arm/mach-omap2/prm-regbits-34xx.h | 10 ++++ arch/arm/mach-omap2/prm.h | 44 +++++++++++++++++- arch/arm/mach-omap2/prm2xxx.c | 68 ++++++++++++++++++++++++++++ arch/arm/mach-omap2/prm2xxx.h | 4 ++ arch/arm/mach-omap2/prm2xxx_3xxx.h | 2 + arch/arm/mach-omap2/prm3xxx.c | 65 ++++++++++++++++++++++++++ arch/arm/mach-omap2/prm3xxx.h | 2 + arch/arm/mach-omap2/prm44xx.c | 83 ++++++++++++++++++++++++++++++++-- arch/arm/mach-omap2/prm44xx.h | 2 + arch/arm/mach-omap2/prm_common.c | 26 +++++++++++ 11 files changed, 306 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-omap2/prm2xxx_3xxx.h') diff --git a/arch/arm/mach-omap2/prm-regbits-24xx.h b/arch/arm/mach-omap2/prm-regbits-24xx.h index bd70a5a04291..638da6dd41c3 100644 --- a/arch/arm/mach-omap2/prm-regbits-24xx.h +++ b/arch/arm/mach-omap2/prm-regbits-24xx.h @@ -209,9 +209,13 @@ /* RM_RSTST_WKUP specific bits */ /* 2430 calls EXTWMPU_RST "EXTWARM_RST" and GLOBALWMPU_RST "GLOBALWARM_RST" */ +#define OMAP24XX_EXTWMPU_RST_SHIFT 6 #define OMAP24XX_EXTWMPU_RST_MASK (1 << 6) +#define OMAP24XX_SECU_WD_RST_SHIFT 5 #define OMAP24XX_SECU_WD_RST_MASK (1 << 5) +#define OMAP24XX_MPU_WD_RST_SHIFT 4 #define OMAP24XX_MPU_WD_RST_MASK (1 << 4) +#define OMAP24XX_SECU_VIOL_RST_SHIFT 3 #define OMAP24XX_SECU_VIOL_RST_MASK (1 << 3) /* PM_WKEN_WKUP specific bits */ diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h index 073d4db8aa5c..838b594d4e13 100644 --- a/arch/arm/mach-omap2/prm-regbits-34xx.h +++ b/arch/arm/mach-omap2/prm-regbits-34xx.h @@ -509,15 +509,25 @@ #define OMAP3430_RSTTIME1_MASK (0xff << 0) /* PRM_RSTST */ +#define OMAP3430_ICECRUSHER_RST_SHIFT 10 #define OMAP3430_ICECRUSHER_RST_MASK (1 << 10) +#define OMAP3430_ICEPICK_RST_SHIFT 9 #define OMAP3430_ICEPICK_RST_MASK (1 << 9) +#define OMAP3430_VDD2_VOLTAGE_MANAGER_RST_SHIFT 8 #define OMAP3430_VDD2_VOLTAGE_MANAGER_RST_MASK (1 << 8) +#define OMAP3430_VDD1_VOLTAGE_MANAGER_RST_SHIFT 7 #define OMAP3430_VDD1_VOLTAGE_MANAGER_RST_MASK (1 << 7) +#define OMAP3430_EXTERNAL_WARM_RST_SHIFT 6 #define OMAP3430_EXTERNAL_WARM_RST_MASK (1 << 6) +#define OMAP3430_SECURE_WD_RST_SHIFT 5 #define OMAP3430_SECURE_WD_RST_MASK (1 << 5) +#define OMAP3430_MPU_WD_RST_SHIFT 4 #define OMAP3430_MPU_WD_RST_MASK (1 << 4) +#define OMAP3430_SECURITY_VIOL_RST_SHIFT 3 #define OMAP3430_SECURITY_VIOL_RST_MASK (1 << 3) +#define OMAP3430_GLOBAL_SW_RST_SHIFT 1 #define OMAP3430_GLOBAL_SW_RST_MASK (1 << 1) +#define OMAP3430_GLOBAL_COLD_RST_SHIFT 0 #define OMAP3430_GLOBAL_COLD_RST_MASK (1 << 0) /* PRM_VOLTCTRL */ diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 3e51c1d15757..c30ab5de8d1d 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -52,16 +52,58 @@ #define OMAP_POWERSTATE_SHIFT 0 #define OMAP_POWERSTATE_MASK (0x3 << 0) +/* + * Standardized OMAP reset source bits + * + * To the extent these happen to match the hardware register bit + * shifts, it's purely coincidental. Used by omap-wdt.c. + * OMAP_UNKNOWN_RST_SRC_ID_SHIFT is a special value, used whenever + * there are any bits remaining in the global PRM_RSTST register that + * haven't been identified, or when the PRM code for the current SoC + * doesn't know how to interpret the register. + */ +#define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT 0 +#define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT 1 +#define OMAP_SECU_VIOL_RST_SRC_ID_SHIFT 2 +#define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3 +#define OMAP_SECU_WD_RST_SRC_ID_SHIFT 4 +#define OMAP_EXTWARM_RST_SRC_ID_SHIFT 5 +#define OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT 6 +#define OMAP_VDD_IVA_VM_RST_SRC_ID_SHIFT 7 +#define OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT 8 +#define OMAP_ICEPICK_RST_SRC_ID_SHIFT 9 +#define OMAP_ICECRUSHER_RST_SRC_ID_SHIFT 10 +#define OMAP_C2C_RST_SRC_ID_SHIFT 11 +#define OMAP_UNKNOWN_RST_SRC_ID_SHIFT 12 + #ifndef __ASSEMBLER__ +/** + * struct prm_reset_src_map - map register bitshifts to standard bitshifts + * @reg_shift: bitshift in the PRM reset source register + * @std_shift: bitshift equivalent in the standard reset source list + * + * The fields are signed because -1 is used as a terminator. + */ +struct prm_reset_src_map { + s8 reg_shift; + s8 std_shift; +}; + /** * struct prm_ll_data - fn ptrs to per-SoC PRM function implementations + * @read_reset_sources: ptr to the Soc PRM-specific get_reset_source impl */ -struct prm_ll_data {}; +struct prm_ll_data { + u32 (*read_reset_sources)(void); +}; extern int prm_register(struct prm_ll_data *pld); extern int prm_unregister(struct prm_ll_data *pld); +extern u32 prm_read_reset_sources(void); + #endif + #endif diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c index 9cdb4e5e3d80..e2860f9c111d 100644 --- a/arch/arm/mach-omap2/prm2xxx.c +++ b/arch/arm/mach-omap2/prm2xxx.c @@ -29,6 +29,46 @@ #include "cm2xxx_3xxx.h" #include "prm-regbits-24xx.h" +/* + * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP + * hardware register (which are specific to the OMAP2xxx SoCs) to + * reset source ID bit shifts (which is an OMAP SoC-independent + * enumeration) + */ +static struct prm_reset_src_map omap2xxx_prm_reset_src_map[] = { + { OMAP_GLOBALCOLD_RST_SHIFT, OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT }, + { OMAP_GLOBALWARM_RST_SHIFT, OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT }, + { OMAP24XX_SECU_VIOL_RST_SHIFT, OMAP_SECU_VIOL_RST_SRC_ID_SHIFT }, + { OMAP24XX_MPU_WD_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT }, + { OMAP24XX_SECU_WD_RST_SHIFT, OMAP_SECU_WD_RST_SRC_ID_SHIFT }, + { OMAP24XX_EXTWMPU_RST_SHIFT, OMAP_EXTWARM_RST_SRC_ID_SHIFT }, + { -1, -1 }, +}; + +/** + * omap2xxx_prm_read_reset_sources - return the last SoC reset source + * + * Return a u32 representing the last reset sources of the SoC. The + * returned reset source bits are standardized across OMAP SoCs. + */ +static u32 omap2xxx_prm_read_reset_sources(void) +{ + struct prm_reset_src_map *p; + u32 r = 0; + u32 v; + + v = omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST); + + p = omap2xxx_prm_reset_src_map; + while (p->reg_shift >= 0 && p->std_shift >= 0) { + if (v & (1 << p->reg_shift)) + r |= 1 << p->std_shift; + p++; + } + + return r; +} + int omap2xxx_clkdm_sleep(struct clockdomain *clkdm) { omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, @@ -56,3 +96,31 @@ struct pwrdm_ops omap2_pwrdm_operations = { .pwrdm_read_mem_retst = omap2_pwrdm_read_mem_retst, .pwrdm_wait_transition = omap2_pwrdm_wait_transition, }; + +/* + * + */ + +static struct prm_ll_data omap2xxx_prm_ll_data = { + .read_reset_sources = &omap2xxx_prm_read_reset_sources, +}; + +static int __init omap2xxx_prm_init(void) +{ + if (!cpu_is_omap24xx()) + return 0; + + return prm_register(&omap2xxx_prm_ll_data); +} +subsys_initcall(omap2xxx_prm_init); + +static void __exit omap2xxx_prm_exit(void) +{ + if (!cpu_is_omap24xx()) + return; + + /* Should never happen */ + WARN(prm_unregister(&omap2xxx_prm_ll_data), + "%s: prm_ll_data function pointer mismatch\n", __func__); +} +__exitcall(omap2xxx_prm_exit); diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h index 6d76716a1ea5..1d97112524f1 100644 --- a/arch/arm/mach-omap2/prm2xxx.h +++ b/arch/arm/mach-omap2/prm2xxx.h @@ -123,6 +123,10 @@ /* Function prototypes */ extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm); extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm); + +extern int __init prm2xxx_init(void); +extern int __exit prm2xxx_exit(void); + #endif #endif diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h index 22a405a1543b..3330b1bf789d 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h @@ -211,7 +211,9 @@ extern int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm); * * 3430: RM_RSTST_CORE, RM_RSTST_EMU */ +#define OMAP_GLOBALWARM_RST_SHIFT 1 #define OMAP_GLOBALWARM_RST_MASK (1 << 1) +#define OMAP_GLOBALCOLD_RST_SHIFT 0 #define OMAP_GLOBALCOLD_RST_MASK (1 << 0) /* diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c index e276ff270ac5..1fea656b2ca8 100644 --- a/arch/arm/mach-omap2/prm3xxx.c +++ b/arch/arm/mach-omap2/prm3xxx.c @@ -47,6 +47,27 @@ static struct omap_prcm_irq_setup omap3_prcm_irq_setup = { .restore_irqen = &omap3xxx_prm_restore_irqen, }; +/* + * omap3_prm_reset_src_map - map from bits in the PRM_RSTST hardware + * register (which are specific to OMAP3xxx SoCs) to reset source ID + * bit shifts (which is an OMAP SoC-independent enumeration) + */ +static struct prm_reset_src_map omap3xxx_prm_reset_src_map[] = { + { OMAP3430_GLOBAL_COLD_RST_SHIFT, OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT }, + { OMAP3430_GLOBAL_SW_RST_SHIFT, OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT }, + { OMAP3430_SECURITY_VIOL_RST_SHIFT, OMAP_SECU_VIOL_RST_SRC_ID_SHIFT }, + { OMAP3430_MPU_WD_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT }, + { OMAP3430_SECURE_WD_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT }, + { OMAP3430_EXTERNAL_WARM_RST_SHIFT, OMAP_EXTWARM_RST_SRC_ID_SHIFT }, + { OMAP3430_VDD1_VOLTAGE_MANAGER_RST_SHIFT, + OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT }, + { OMAP3430_VDD2_VOLTAGE_MANAGER_RST_SHIFT, + OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT }, + { OMAP3430_ICEPICK_RST_SHIFT, OMAP_ICEPICK_RST_SRC_ID_SHIFT }, + { OMAP3430_ICECRUSHER_RST_SHIFT, OMAP_ICECRUSHER_RST_SRC_ID_SHIFT }, + { -1, -1 }, +}; + /* PRM VP */ /* @@ -217,6 +238,30 @@ static void __init omap3xxx_prm_enable_io_wakeup(void) PM_WKEN); } +/** + * omap3xxx_prm_read_reset_sources - return the last SoC reset source + * + * Return a u32 representing the last reset sources of the SoC. The + * returned reset source bits are standardized across OMAP SoCs. + */ +static u32 omap3xxx_prm_read_reset_sources(void) +{ + struct prm_reset_src_map *p; + u32 r = 0; + u32 v; + + v = omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST); + + p = omap3xxx_prm_reset_src_map; + while (p->reg_shift >= 0 && p->std_shift >= 0) { + if (v & (1 << p->reg_shift)) + r |= 1 << p->std_shift; + p++; + } + + return r; +} + /* Powerdomain low-level functions */ /* Applicable only for OMAP3. Not supported on OMAP2 */ @@ -320,6 +365,10 @@ struct pwrdm_ops omap3_pwrdm_operations = { * */ +static struct prm_ll_data omap3xxx_prm_ll_data = { + .read_reset_sources = &omap3xxx_prm_read_reset_sources, +}; + static int __init omap3xxx_prm_init(void) { int ret; @@ -327,12 +376,28 @@ static int __init omap3xxx_prm_init(void) if (!cpu_is_omap34xx()) return 0; + ret = prm_register(&omap3xxx_prm_ll_data); + if (ret) + return ret; + omap3xxx_prm_enable_io_wakeup(); ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup); if (!ret) irq_set_status_flags(omap_prcm_event_to_irq("io"), IRQ_NOAUTOEN); + return ret; } subsys_initcall(omap3xxx_prm_init); + +static void __exit omap3xxx_prm_exit(void) +{ + if (!cpu_is_omap34xx()) + return; + + /* Should never happen */ + WARN(prm_unregister(&omap3xxx_prm_ll_data), + "%s: prm_ll_data function pointer mismatch\n", __func__); +} +__exitcall(omap3xxx_prm_exit); diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h index 6821e8321610..a3c28a875410 100644 --- a/arch/arm/mach-omap2/prm3xxx.h +++ b/arch/arm/mach-omap2/prm3xxx.h @@ -152,6 +152,8 @@ extern void omap3xxx_prm_ocp_barrier(void); extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask); extern void omap3xxx_prm_restore_irqen(u32 *saved_mask); +extern u32 omap3xxx_prm_get_reset_sources(void); + #endif /* __ASSEMBLER */ diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 48d91930796d..a799e9552fbf 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -1,7 +1,7 @@ /* * OMAP4 PRM module functions * - * Copyright (C) 2011 Texas Instruments, Inc. + * Copyright (C) 2011-2012 Texas Instruments, Inc. * Copyright (C) 2010 Nokia Corporation * Benoît Cousson * Paul Walmsley @@ -30,6 +30,8 @@ #include "prminst44xx.h" #include "powerdomain.h" +/* Static data */ + static const struct omap_prcm_irq omap4_prcm_irqs[] = { OMAP_PRCM_IRQ("wkup", 0, 0), OMAP_PRCM_IRQ("io", 9, 1), @@ -48,6 +50,33 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = { .restore_irqen = &omap44xx_prm_restore_irqen, }; +/* + * omap44xx_prm_reset_src_map - map from bits in the PRM_RSTST + * hardware register (which are specific to OMAP44xx SoCs) to reset + * source ID bit shifts (which is an OMAP SoC-independent + * enumeration) + */ +static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = { + { OMAP4430_RST_GLOBAL_WARM_SW_SHIFT, + OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT }, + { OMAP4430_RST_GLOBAL_COLD_SW_SHIFT, + OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT }, + { OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT, + OMAP_SECU_VIOL_RST_SRC_ID_SHIFT }, + { OMAP4430_MPU_WDT_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT }, + { OMAP4430_SECURE_WDT_RST_SHIFT, OMAP_SECU_WD_RST_SRC_ID_SHIFT }, + { OMAP4430_EXTERNAL_WARM_RST_SHIFT, OMAP_EXTWARM_RST_SRC_ID_SHIFT }, + { OMAP4430_VDD_MPU_VOLT_MGR_RST_SHIFT, + OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT }, + { OMAP4430_VDD_IVA_VOLT_MGR_RST_SHIFT, + OMAP_VDD_IVA_VM_RST_SRC_ID_SHIFT }, + { OMAP4430_VDD_CORE_VOLT_MGR_RST_SHIFT, + OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT }, + { OMAP4430_ICEPICK_RST_SHIFT, OMAP_ICEPICK_RST_SRC_ID_SHIFT }, + { OMAP4430_C2C_RST_SHIFT, OMAP_C2C_RST_SRC_ID_SHIFT }, + { -1, -1 }, +}; + /* PRM low-level functions */ /* Read a register in a CM/PRM instance in the PRM module */ @@ -293,6 +322,31 @@ static void __init omap44xx_prm_enable_io_wakeup(void) OMAP4_PRM_IO_PMCTRL_OFFSET); } +/** + * omap44xx_prm_read_reset_sources - return the last SoC reset source + * + * Return a u32 representing the last reset sources of the SoC. The + * returned reset source bits are standardized across OMAP SoCs. + */ +static u32 omap44xx_prm_read_reset_sources(void) +{ + struct prm_reset_src_map *p; + u32 r = 0; + u32 v; + + v = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, + OMAP4_RM_RSTST); + + p = omap44xx_prm_reset_src_map; + while (p->reg_shift >= 0 && p->std_shift >= 0) { + if (v & (1 << p->reg_shift)) + r |= 1 << p->std_shift; + p++; + } + + return r; +} + /* Powerdomain low-level functions */ static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) @@ -555,14 +609,37 @@ struct pwrdm_ops omap4_pwrdm_operations = { .pwrdm_wait_transition = omap4_pwrdm_wait_transition, }; +/* + * XXX document + */ +static struct prm_ll_data omap44xx_prm_ll_data = { + .read_reset_sources = &omap44xx_prm_read_reset_sources, +}; -static int __init omap4xxx_prm_init(void) +static int __init omap44xx_prm_init(void) { + int ret; + if (!cpu_is_omap44xx()) return 0; + ret = prm_register(&omap44xx_prm_ll_data); + if (ret) + return ret; + omap44xx_prm_enable_io_wakeup(); return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup); } -subsys_initcall(omap4xxx_prm_init); +subsys_initcall(omap44xx_prm_init); + +static void __exit omap44xx_prm_exit(void) +{ + if (!cpu_is_omap44xx()) + return; + + /* Should never happen */ + WARN(prm_unregister(&omap44xx_prm_ll_data), + "%s: prm_ll_data function pointer mismatch\n", __func__); +} +__exitcall(omap44xx_prm_exit); diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index ee72ae6bd8c9..c8e1accdc90e 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -771,6 +771,8 @@ extern void omap44xx_prm_ocp_barrier(void); extern void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask); extern void omap44xx_prm_restore_irqen(u32 *saved_mask); +extern u32 omap44xx_prm_get_reset_sources(void); + # endif #endif diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 8670a3c4bc5e..e200e4fb47dc 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -28,6 +28,8 @@ #include #include "prm2xxx_3xxx.h" +#include "prm2xxx.h" +#include "prm3xxx.h" #include "prm44xx.h" /* @@ -326,6 +328,30 @@ err: return -ENOMEM; } +/** + * prm_read_reset_sources - return the sources of the SoC's last reset + * + * Return a u32 bitmask representing the reset sources that caused the + * SoC to reset. The low-level per-SoC functions called by this + * function remap the SoC-specific reset source bits into an + * OMAP-common set of reset source bits, defined in + * arch/arm/mach-omap2/prm.h. Returns the standardized reset source + * u32 bitmask from the hardware upon success, or returns (1 << + * OMAP_UNKNOWN_RST_SRC_ID_SHIFT) if no low-level read_reset_sources() + * function was registered. + */ +u32 prm_read_reset_sources(void) +{ + u32 ret = 1 << OMAP_UNKNOWN_RST_SRC_ID_SHIFT; + + if (prm_ll_data->read_reset_sources) + ret = prm_ll_data->read_reset_sources(); + else + WARN_ONCE(1, "prm: %s: no mapping function defined for reset sources\n", __func__); + + return ret; +} + /** * prm_register - register per-SoC low-level data with the PRM * @pld: low-level per-SoC OMAP PRM data & function pointers to register -- cgit v1.2.3