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2016-03-18Merge branch 'akpm' (patches from Andrew)Linus Torvalds1-10/+3
Merge second patch-bomb from Andrew Morton: - a couple of hotfixes - the rest of MM - a new timer slack control in procfs - a couple of procfs fixes - a few misc things - some printk tweaks - lib/ updates, notably to radix-tree. - add my and Nick Piggin's old userspace radix-tree test harness to tools/testing/radix-tree/. Matthew said it was a godsend during the radix-tree work he did. - a few code-size improvements, switching to __always_inline where gcc screwed up. - partially implement character sets in sscanf * emailed patches from Andrew Morton <akpm@linux-foundation.org>: (118 commits) sscanf: implement basic character sets lib/bug.c: use common WARN helper param: convert some "on"/"off" users to strtobool lib: add "on"/"off" support to kstrtobool lib: update single-char callers of strtobool() lib: move strtobool() to kstrtobool() include/linux/unaligned: force inlining of byteswap operations include/uapi/linux/byteorder, swab: force inlining of some byteswap operations include/asm-generic/atomic-long.h: force inlining of some atomic_long operations usb: common: convert to use match_string() helper ide: hpt366: convert to use match_string() helper ata: hpt366: convert to use match_string() helper power: ab8500: convert to use match_string() helper power: charger_manager: convert to use match_string() helper drm/edid: convert to use match_string() helper pinctrl: convert to use match_string() helper device property: convert to use match_string() helper lib/string: introduce match_string() helper radix-tree tests: add test for radix_tree_iter_next radix-tree tests: add regression3 test ...
2016-03-17Merge tag 'gpio-v4.6-1' of ↵Linus Torvalds3-39/+16
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for kernel v4.6. There is quite a lot of interesting stuff going on. The patches to other subsystems and arch-wide are ACKed as far as possible, though I consider things like per-arch <asm/gpio.h> as essentially a part of the GPIO subsystem so it should not be needed. Core changes: - The gpio_chip is now a *real device*. Until now the gpio chips were just piggybacking the parent device or (gasp) floating in space outside of the device model. We now finally make GPIO chips devices. The gpio_chip will create a gpio_device which contains a struct device, and this gpio_device struct is kept private. Anything that needs to be kept private from the rest of the kernel will gradually be moved over to the gpio_device. - As a result of making the gpio_device a real device, we have added resource management, so devm_gpiochip_add_data() will cut down on overhead and reduce code lines. A huge slew of patches convert almost all drivers in the subsystem to use this. - Building on making the GPIO a real device, we add the first step of a new userspace ABI: the GPIO character device. We take small steps here, so we first add a pure *information* ABI and the tool "lsgpio" that will list all GPIO devices on the system and all lines on these devices. We can now discover GPIOs properly from userspace. We still have not come up with a way to actually *use* GPIOs from userspace. - To encourage people to use the character device for the future, we have it always-enabled when using GPIO. The old sysfs ABI is still opt-in (and can be used in parallel), but is marked as deprecated. We will keep it around for the foreseeable future, but it will not be extended to cover ever more use cases. Cleanup: - Bjorn Helgaas removed a whole slew of per-architecture <asm/gpio.h> includes. This dates back to when GPIO was an opt-in feature and no shared library even existed: just a header file with proper prototypes was provided and all semantics were up to the arch to implement. These patches make the GPIO chip even more a proper device and cleans out leftovers of the old in-kernel API here and there. Still some cruft is left but it's very little now. - There is still some clamping of return values for .get() going on, but we now return sane values in the vast majority of drivers and the errorpath is sanitized. Some patches for powerpc, blackfin and unicore still drop in. - We continue to switch the ARM, MIPS, blackfin, m68k local GPIO implementations to use gpiochip_add_data() and cut down on code lines. - MPC8xxx is converted to use the generic GPIO helpers. - ATH79 is converted to use the generic GPIO helpers. New drivers: - WinSystems WS16C48 - Acces 104-DIO-48E - F81866 (a F7188x variant) - Qoric (a MPC8xxx variant) - TS-4800 - SPI serializers (pisosr): simple 74xx shift registers connected to SPI to obtain a dirt-cheap output-only GPIO expander. - Texas Instruments TPIC2810 - Texas Instruments TPS65218 - Texas Instruments TPS65912 - X-Gene (ARM64) standby GPIO controller" * tag 'gpio-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (194 commits) Revert "Share upstreaming patches" gpio: mcp23s08: Fix clearing of interrupt. gpiolib: Fix comment referring to gpio_*() in gpiod_*() gpio: pca953x: Fix pca953x_gpio_set_multiple() on 64-bit gpio: xgene: Fix kconfig for standby GIPO contoller gpio: Add generic serializer DT binding gpio: uapi: use 0xB4 as ioctl() major gpio: tps65912: fix bad merge Revert "gpio: lp3943: Drop pin_used and lp3943_gpio_request/lp3943_gpio_free" gpio: omap: drop dev field from gpio_bank structure gpio: mpc8xxx: Slightly update the code for better readability gpio: mpc8xxx: Remove *read_reg and *write_reg from struct mpc8xxx_gpio_chip gpio: mpc8xxx: Fixup setting gpio direction output gpio: mcp23s08: Add support for mcp23s18 dt-bindings: gpio: altera: Fix altr,interrupt-type property gpio: add driver for MEN 16Z127 GPIO controller gpio: lp3943: Drop pin_used and lp3943_gpio_request/lp3943_gpio_free gpio: timberdale: Switch to devm_ioremap_resource() gpio: ts4800: Add IMX51 dependency gpiolib: rewrite gpiodev_add_to_list ...
2016-03-17pinctrl: convert to use match_string() helperAndy Shevchenko1-10/+3
The new helper returns index of the mathing string in an array. We would use it here. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-03-11pinctrl: single: Use a separate lockdep classSudeep Holla1-0/+8
The single pinmux controller can be cascaded to the other interrupt controllers. Hence when propagating wake-up settings to its parent interrupt controller, there's possiblity of detecting possible recursive locking and getting lockdep warning. This patch avoids this false positive by using a separate lockdep class for this single pinctrl interrupts. Cc: linux-gpio@vger.kernel.org Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-11drivers: pinctrl: add driver for Allwinner A64 SoCAndre Przywara3-0/+606
Based on the Allwinner A64 user manual and on the previous sunxi pinctrl drivers this introduces the pin multiplex assignments for the ARMv8 Allwinner A64 SoC. Port A is apparently used for the fixed function DRAM controller, so the ports start at B here (the manual mentions "n from 1 to 7", so not starting at 0). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-10Merge tag 'v4.5-rc5' into develLinus Walleij5-18/+47
Linux 4.5-rc5
2016-03-09pinctrl: amlogic: Make driver independent from two-domain configurationCarlo Caione4-224/+228
In the Amlogic Meson8 / Meson8b platforms we have two different buses: cbus and aobus, corresponding to 2 different power domains (regular and always-on). On each bus a different set of registers is mapped to manage muxes, GPIOs and in general to control a clear subset of the pins. Considering this architecture, having two different pinctrl devices, one for each bus / power domain, makes much more sense than just having one single device. Right now we have one single pin controller driver that uses two different domains (represented by 'gpio' and 'gpio-ao' sub-nodes in the DTS) to manage the set of registers on the two buses. This dual-domain configuration is hardcoded into the driver that strictly requires one domain for each bus in the same pin controller device. With this patch we refactor the driver to allow splitting the driver in two parts. This change is needed to have a proper description of the HW in the device-tree where we want to introduce aobus and cbus. Signed-off-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-09pinctrl: amlogic: Separate some pin functions for Meson8 / Meson8bCarlo Caione1-8/+27
Separate functions for pins controlled by different pin controllers. Signed-off-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-09pinctrl: at91: use __maybe_unused to hide pm functionsArnd Bergmann1-2/+2
The at91-pio4 pinctrl driver uses SET_SYSTEM_SLEEP_PM_OPS() to conditionally set the correct suspend/resume options, but they become unused when CONFIG_PM is disabled: drivers/pinctrl/pinctrl-at91-pio4.c:827:12: error: 'atmel_pctrl_suspend' defined but not used [-Werror=unused-function] drivers/pinctrl/pinctrl-at91-pio4.c:847:12: error: 'atmel_pctrl_resume' defined but not used [-Werror=unused-function] This adds __maybe_unused annotations so the compiler knows it can silently drop them instead of warning. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-09pinctrl: sh-pfc: core: don't open code of_device_get_match_data()Wolfram Sang1-1/+1
This change will also make Coverity happy by avoiding a theoretical NULL pointer dereference; yet another reason is to use the above helper function to tighten the code and make it more readable. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-09pinctrl: uniphier: rename CONFIG options and file namesMasahiro Yamada8-13/+13
The current "CONFIG_PINCTRL_UNIPHIER_PH1_*" is too long. It would not hurt to drop "PH1_" because "UNIPHIER_" already well specifies the SoC family. Also, rename files for consistency. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-09pinctrl: sunxi: make A80 explicitly non-modularPaul Gortmaker1-7/+2
The Kconfig currently controlling compilation of this code is: drivers/pinctrl/sunxi/Kconfig:config PINCTRL_SUN9I_A80_R drivers/pinctrl/sunxi/Kconfig: def_bool MACH_SUN9I ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. Cc: Chen-Yu Tsai <wens@csie.org> Cc: linux-gpio@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-09pinctrl: stm32: make explicitly non-modularPaul Gortmaker1-8/+1
The Kconfig currently controlling compilation of this code is: drivers/pinctrl/stm32/Kconfig:config PINCTRL_STM32F429 drivers/pinctrl/stm32/Kconfig: bool "STMicroelectronics STM32F429 pin control" if COMPILE_TEST && !MACH_STM32F429 ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. Since module_init translates to device_initcall in the non-modular case, the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. Cc: Patrice Chotard <patrice.chotard@st.com> Cc: linux-gpio@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-09pinctrl: sh-pfc: make explicitly non-modularPaul Gortmaker1-14/+4
The Kconfig / Makefile currently controlling compilation of this code is: drivers/pinctrl/sh-pfc/Makefile:obj-$(CONFIG_PINCTRL_SH_PFC) += sh-pfc.o drivers/pinctrl/sh-pfc/Makefile:sh-pfc-objs = core.o pinctrl.o drivers/pinctrl/sh-pfc/Kconfig:config PINCTRL_SH_PFC drivers/pinctrl/sh-pfc/Kconfig: def_bool y ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. Since module_init already wasn't being used in this code, the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Cc: linux-renesas-soc@vger.kernel.org Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-09pinctrl: meson: make explicitly non-modularPaul Gortmaker1-7/+1
The Kconfig currently controlling compilation of this code is: drivers/pinctrl/Kconfig:config PINCTRL_MESON drivers/pinctrl/Kconfig: bool ...meaning that it currently is not being built as a module by anyone. Lets remove the couple traces of modularity so that when reading the driver there is no doubt it is builtin-only. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. We don't replace module.h with init.h since the file already has that. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. Cc: Beniamino Galvani <b.galvani@gmail.com> Cc: Carlo Caione <carlo@endlessm.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Antoine Tenart <antoine.tenart@free-electrons.com> Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-09pinctrl: pinctrl-mt6397 driver explicitly non-modularPaul Gortmaker1-8/+2
The Kconfig for this driver is currently: config PINCTRL_MT6397 bool "Mediatek MT6397 pin control" if COMPILE_TEST && !MFD_MT6397 ...meaning that it is currently not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. Since module_init translates to device_initcall in the non-modular case, the init ordering remains unchanged with this commit. We also delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: linux-gpio@vger.kernel.org Cc: linux-mediatek@lists.infradead.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Hongzhou Yang <hongzhou.yang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-09pinctrl: sunxi: does not need module.hPaul Gortmaker1-1/+1
This file is not modular, nor is it using modular functions. The only thing close is the global THIS_MODULE which comes from export.h so lets replace it appropriately and cut back on the amount of header stuff we draw in by several thousand lines. Cc: linux-gpio@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-09pinctrl: pxa2xx: export symbolsLinus Walleij1-0/+2
The pxa2xxx fails some automated builds because of unexported symbols. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-08pinctrl: sunxi: Change mux setting on PI irq pinsHenry Paulissen1-10/+10
While I was testing irq's on the cubietruck I found a couple of not working irq pins. Further diving into the problem it opened up a mess called "manual". This so called manual (A20 user manual v1.3 dated 2014-10-10) says: Pin overview: Page 237: EINT26 is on mux 5. Page 288: EINT26 is on mux 6. The manual is so contradicting that further tests had to be made to see which of the 2 statements where correct. This patch is based on actual outcome of these tests and not what the manual says. Test procedure used: Connect a 1 pulse per second (GPS) line to the pin. echo pin### > /sys/class/gpio/export echo in > /sys/class/gpio/gpio###/direction echo rising > /sys/class/gpio/gpio###/edge Check /proc/interrupts if a irq was attached and if irq's where received. Hardware used: Henry Paulissen: Cubietruck Andere Przywara: BananaPi M1 Tested-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Henry Paulissen <henry@nitronetworks.nl> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-08pinctrl: sunxi: Remove non existing irq'sHenry Paulissen1-8/+4
While I was testing irq's on the cubietruck I found a couple of not working irq pins. Further diving into the problem it opened up a mess called "manual". This so called manual (A20 user manual v1.3 dated 2014-10-10) says: Pin overview: Page 233: EINT12 is on pin PC19 mux6. Page 236: EINT12 is on pin PH12 mux6. Now, it is a bit strange to have the same IRQ on 2 different pins, but I guess this could still be possible hardware wise. But then: Pin registers: Page 253: EINT12 is *not* on pin PC19. Page 281: EINT12 is on pin PH12. The manual is so contradicting that further tests had to be made to see which of the 2 statements where correct. This patch is based on actual outcome of these tests and not what the manual says. Test procedure used: Connect a 1 pulse per second (GPS) line to the pin. echo pin### > /sys/class/gpio/export echo in > /sys/class/gpio/gpio###/direction echo rising > /sys/class/gpio/gpio###/edge Check /proc/interrupts if a irq was attached and if irq's where received. Signed-off-by: Henry Paulissen <henry@nitronetworks.nl> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-08pinctrl: imx: attach iomuxc device to gpr sysconPhilipp Zabel10-0/+19
Commit bdb0066df96e ("mfd: syscon: Decouple syscon interface from platform devices") added the possibility to register syscon devices without associated platform device. This also removed regmap debugfs facilities, which don't work without a device. This patch associates the syscon regmap that handles the IOMUX controller's general purpose registers with the pinctrl device so that the GPR registers appear in the regmap debugfs directory again. For example, on i.MX6Q the GPR registers now can be read from /sys/kernel/debug/regmap/20e0000.iomuxc-gpr/registers. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-08pinctrl-bcm2835: Fix cut-and-paste error in "pull" parsingPhil Elwell1-1/+1
The DT bindings for pinctrl-bcm2835 allow both the function and pull to contain either one entry or one per pin. However, an error in the DT parsing can cause failures if the number of pulls differs from the number of functions. Cc: stable@vger.kernel.org Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Phil Elwell <phil@raspberrypi.org> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-07pinctrl: lpc18xx: add nxp,gpio-pin-interrupt propertyJoachim Eastwood1-6/+137
Add support for setting up GPIO pin interrupts in the lpc18xx pinctrl driver. The LPC18xx SCU contain two registers that sets up the signal routing to the GPIO pin interrupt (PINT) block. The routing uses the GPIO namespace and not the pin namespace so a lookup is preformed on the pin. Routing configuration is done in the device tree by using the new nxp,gpio-pin-interrupt property. This property takes single parameter which sets the PINT hwirq for the GPIO. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-07pinctrl: core: create nolock version of pinctrl_find_gpio_range_from_pinJoachim Eastwood2-12/+27
pinctrl_find_gpio_range_from_pin takes the pctldev->mutex but so does pinconf_pins_show and this will cause a deadlock if pinctrl_find_gpio_range_from_pin is used in .pin_config_get callback. Create a nolock version of pinctrl_find_gpio_range_from_pin to allow pin to gpio lookup to be used from pinconf_pins_show. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-07pinctrl: lpc18xx: ensure ngroups is initialized at correct placeColin Ian King1-3/+2
The initialization of ngroups is occurring at the end of the first iteration of the outer loop, which means that the assignment pins[ngroups++] = i is potentially indexing into a region outside of array pins because ngroups is not initialized. Instead, initialize ngroups in the inner loop before the first inner loop iteration. Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-03Merge branch 'sh-pfc-for-v4.6' of ↵Linus Walleij3-1/+91
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
2016-02-26pinctrl: sh-pfc: r8a7795: Add CAN FD supportRamesh Shanmugasundaram1-0/+37
This patch adds CANFD[0-1] pinmux support to r8a7795 SoC. Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-26pinctrl: sh-pfc: r8a7795: Add CAN supportRamesh Shanmugasundaram1-0/+52
This patch adds CAN[0-1] pinmux support to r8a7795 SoC. Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-26pinctrl: sh-pfc: r8a7794: Fix GP2[29] muxingAndrey Gusakov1-0/+1
GP2[29] muxing is controlled by 2-bit IP6[3:2] field, yet only 3 values are listed instead of 4... [Sergei: fixed up the formatting, renamed, added the changelog.] Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-26pinctrl: sh-pfc: Use ARCH_RENESASSimon Horman1-1/+1
Make use of ARCH_RENESAS in place of ARCH_SHMOBILE. This is part of an ongoing process to migrate from ARCH_SHMOBILE to ARCH_RENESAS the motivation for which being that RENESAS seems to be a more appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-25pinctrl: mediatek/7623: delete unnecessary .ownerLinus Walleij1-1/+0
This is set by the device core. Cc: John Crispin <blogic@openwrt.org> Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-19pinctrl: mediatek: Add Pinctrl/GPIO/EINT driver for MT7623John Crispin4-0/+2323
Add the driver and header files required to make pinctrl work on MediaTek MT7623. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-19Merge branch 'sh-pfc-for-v4.6' of ↵Linus Walleij11-2577/+3452
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
2016-02-19pinctrl: cygnus-gpio: use gpiochip data pointerLinus Walleij1-19/+14
This makes the driver use the data pointer added to the gpio_chip to store a pointer to the state container instead of relying on container_of(). Cc: bcm-kernel-feedback-list@broadcom.com Cc: Scott Branden <sbranden@broadcom.com> Cc: Jon Mason <jonmason@broadcom.com> Acked-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-19pinctrl: mediatek: add input-enable and direction setting for eint resourcesBiao Huang1-0/+4
To use pin as eint, user should make sure that: 1. pin is set to right mode, this is done in .irq_request_resources implementation already. 2. direction of the pin is input, which should call GPIO API to set pin to input gpio. We add what step 2 do to .irq_request_resources so that user doesn't need call GPIO API any more when pin for eint usage. Signed-off-by: Biao Huang <biao.huang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-19pinctrl: mediatek: add input-enable setting in gpio_request_enableBiao Huang1-0/+1
Since input-disable cuts off input signal of gpio, add input-enable setting in .gpio_request_enable implementation to ensure gpio function well Signed-off-by: Biao Huang <biao.huang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-18pinctrl: sh-pfc: r8a7794: Add EtherAVB pin groupsSergei Shtylyov1-0/+123
Add the EtherAVB pin groups to the R8A7794 PFC driver. Based on the patches by Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-18pinctrl: sh-pfc: Rework PFC GPIO supportMagnus Damm3-41/+24
The sh-pfc pinctrl driver is currently handling SoC-specific PFC hardware blocks on ARM64, ARM and SH architectures. For older SoCs using SH cores and some 32-bit ARM SoCs the PFC hardware also provides GPIO functionality. On the majority of 32-bit ARM SoCs from Renesas and so far all ARM64 SoCs the GPIO feature is provided by separate hardware blocks. So far GPIO support in the PFC driver has been compiled-in for the majority of the SoCs, but with this patch applied the SoCs with PFC support may select from one of the following: - CONFIG_PINCTRL_SH_PFC - Used if PFC lacks GPIO hardware - CONFIG_PINCTRL_SH_PFC_GPIO - Used if PFC includes GPIO support This patch results in the following changes: - The GPIO functionality is only compiled-in on relevant SoCs - The number of lines of code is reduced Build tested using the following configurations: - r8a7795 -> CONFIG_PINCTRL_SH_PFC_GPIO=n -> OK (ARM64) - r8a7790 -> CONFIG_PINCTRL_SH_PFC_GPIO=n -> OK (ARM) - r8a7790 + r8a7740 -> CONFIG_PINCTRL_SH_PFC_GPIO=y -> OK (ARM) - r8a7740 -> CONFIG_PINCTRL_SH_PFC_GPIO=y -> OK (ARM) - sh7751 -> CONFIG_PINCTRL_SH_PFC=n -> OK (SH rts7751r2d1) - sh7724 -> CONFIG_PINCTRL_SH_PFC_GPIO=y -> OK (SH ecovec24) Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> [geert: s/def_bool n/bool/] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-18pinctrl: sh-pfc: r8a7795: Add PWM supportTakeshi Kihara1-0/+153
This patch adds PWM[0-6] pinmux support to r8a7795 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [uli: adapted to mainline PFC driver] Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-18pinctrl: sh-pfc: r8a7795: Add support for INTC-EX IRQ pinsMagnus Damm1-0/+60
Most pins on the r8a7795 SoC can be configured in GPIO mode for interrupt and GPIO functionality, while a couple of them can also be routed to the INTC-EX hardware block (formerly known as IRQC). On r8a7795 the INTC-EX hardware handles pins IRQ0 -> IRQ5 and this patch adds support for them to the PFC driver as "intc_ex_irqN". Tested on r8a7795 Salvator-X with an external loop back adapter on EXIO_D that connects pin 9 (IRQ2/GP2_02) and pin 26 (ExA22/GP2_06). Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-18pinctrl: sh-pfc: r8a7794: Add audio clock pin groupsRyo Kataoka1-0/+122
Add the audio clock pin groups to the R8A7794 PFC driver. [Sergei: fixed pin group names to reflect the reality, fixed pin names in the comments to *_pins[], lowercased the separator comment, resolved rejects, added the changelog, renamed the patch.] Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-18pinctrl: sh-pfc: r8a7794: Add SSI pin groupsRyo Kataoka1-2/+313
Add the SSI pin groups to the R8A7794 PFC driver. [Sergei: fixed inconsistent alternate pin group naming, split SSI5/6 pin groups into data/control ones, moved SSI7 data B group to its proper place, fixed pin names in the comments to *_pins[], extended Cogent Embedded's copyright, added the changelog, renamed the patch.] Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-17pinctrl: mtk2701: skip setting .ownerLinus Walleij1-1/+0
The device core will handle this and Coccinelle complains. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-16pinctrl: qcom: ipq4019: Add IPQ4019 pinctrl supportVaradarajan Narayanan3-0/+462
Add pinctrl driver support for IPQ4019 platform Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> [Dropped .owner assignment] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-16pinctrl: mediatek: fix handling return value of mtk_pmx_find_gpio_modeAndrzej Hajda1-1/+1
The function can return negative values, so its result should be assigned to signed variable. The problem has been detected using coccinelle semantic patch scripts/coccinelle/tests/assign_signed_to_unsigned.cocci. Fixes: 59ee9c9 ('pinctrl: mediatek: Add gpio_request_enable support') Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Acked-by: Hongzhou Yang <hongzhou.yang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-16pinctrl: sirf/atlas7: stop poking around in GPIO internalsLinus Walleij1-18/+0
This code is poking around in the gpio_chip:s internal structures to achieve some kind of pin to GPIO mappings. - It is wrong to poke around in these structs and the pinctrl maintainer was stupid to let it pass unnoticed, mea culpa. - The right interface to use is gpiochip_add_pin_range() - The code appears unused: the pin control part of the driver is not adding any ranges, so we're iterating over an empty list. Maybe it is poking around in some other pin controllers GPIO ranges, and that's just totally wrong, again use gpiochip_add_pin_range() and specify the right pin controller. Cc: Barry Song <baohua@kernel.org> Cc: Guoying Zhang <Guoying.Zhang@csr.com> Cc: Wei Chen <Wei.Chen@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-16pinctrl: Turn AMD support to tristateJean Delvare1-1/+1
The pinctrl-amd driver builds just fine as a module so give users this option. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-15pinctrl: samsung: fix SMP race conditionYoungmin Nam1-13/+35
Previously, samsung_gpio_drection_in/output function were not covered with a spinlock. For example, samsung_gpio_direction_output function consists of two functions. 1. samsung_gpio_set 2. samsung_gpio_set_direction When 2 CPUs try to control the same gpio pin heavily, (situation like i2c control with gpio emulation) This situation can cause below problem. CPU 0 | CPU1 | samsung_gpio_direction_output | samsung_gpio_set(pin A as 1) | samsung_gpio_direction_output | samsung_gpio_set(pin A as 0) samsung_gpio_set_direction | | samsung_gpio_set_direction The initial value of pin A will be set as 0 while we wanted to set pin A as 1. This patch modifies samsung_gpio_direction_in/output function to be done in one spinlock to fix race condition. Additionally, the new samsung_gpio_set_value was added to implement gpio set callback(samsung_gpio_set) with spinlock using this function. Cc: stable@vger.kernel.org Signed-off-by: Youngmin Nam <ym0914@gmail.com> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-15pinctrl: coh901: fix initconst annotationArnd Bergmann1-1/+1
Clang correctly points out that the section attribute for u300_gpio_confdata is in the wrong place: drivers/pinctrl/pinctrl-coh901.c:130:37: error: '__section__' attribute only applies to functions and global variables This moves it from the type name to the variable, so it actually gets discarded. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-15pinctrl: Fix return value check in amd_gpio_probe()Wei Yongjun1-2/+2
In case of error, the function devm_ioremap_nocache() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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