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path: root/drivers/irqchip/irq-mmp.c
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2021-10-26irq: remove handle_domain_{irq,nmi}()Mark Rutland1-2/+2
Now that entry code handles IRQ entry (including setting the IRQ regs) before calling irqchip code, irqchip code can safely call generic_handle_domain_irq(), and there's no functional reason for it to call handle_domain_irq(). Let's cement this split of responsibility and remove handle_domain_irq() entirely, updating irqchip drivers to call generic_handle_domain_irq(). For consistency, handle_domain_nmi() is similarly removed and replaced with a generic_handle_domain_nmi() function which also does not perform any entry logic. Previously handle_domain_{irq,nmi}() had a WARN_ON() which would fire when they were called in an inappropriate context. So that we can identify similar issues going forward, similar WARN_ON_ONCE() logic is added to the generic_handle_*() functions, and comments are updated for clarity and consistency. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de>
2019-08-30irqchip/mmp: Coexist with GIC root IRQ controllerLubomir Rintel1-1/+6
On MMP3, the GIC can be set as a root IRQ interrupt controller. If the device tree indicated that GIC is enabled, avoid hooking up mmp2_handle_irq(). The interrupt muxes are still being used. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20190822092643.593488-10-lkundrak@v3.sk
2019-08-30irqchip/mmp: Mask off interrupts from other coresAndres Salomon1-0/+48
On mmp3, there's an extra set of ICU registers (ICU2) that handle interrupts on the extra cores. When masking off interrupts on MP1, these should be masked as well. We add a new interrupt controller via device tree to identify when we're looking at an mmp3 machine via compatible field of "marvell,mmp3-intc". [lkundrak@v3.sk: Changed "mrvl,mmp3-intc" compatible strings to "marvell,mmp3-intc". Tidied up the subject line a bit.] Signed-off-by: Andres Salomon <dilinger@queued.net> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20190822092643.593488-9-lkundrak@v3.sk -- Changes since v1: - Moved mmp3-specific mmp_icu2_base initialization from mmp_init_bases() to mmp3_of_init() so that we don't have to check for marvell,mmp3-intc compatibility twice. - Drop an superfluous call to irq_set_default_host() arch/arm/mach-mmp/regs-icu.h | 3 +++ drivers/irqchip/irq-mmp.c | 48 ++++++++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+) Signed-off-by: Andres Salomon <dilinger@queued.net> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20190822092643.593488-9-lkundrak@v3.sk
2019-08-30irqchip/mmp: Add missing chained_irq_{enter,exit}()Lubomir Rintel1-1/+8
The lack of chained_irq_exit() leaves the muxed interrupt masked on MMP3. For reasons unknown this is not a problem on MMP2. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20190822092643.593488-8-lkundrak@v3.sk
2019-08-30irqchip/mmp: Do not use of_address_to_resource() to get mux regsLubomir Rintel1-9/+13
The "regs" property of the "mrvl,mmp2-mux-intc" devices are silly. They are offsets from intc's base, not addresses on the parent bus. At this point it probably can't be fixed. On an OLPC XO-1.75 machine, the muxes are children of the intc, not the axi bus, and thus of_address_to_resource() won't work. We should treat the values as mere integers as opposed to bus addresses. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Marc Zyngier <maz@kernel.org> Acked-by: Pavel Machek <pavel@ucw.cz> Link: https://lore.kernel.org/r/20190822092643.593488-7-lkundrak@v3.sk
2019-08-20irqchip/mmp: Do not call irq_set_default_host() on DT platformsLubomir Rintel1-2/+0
Using a default domain on DT platforms is unnecessary, as the firmware tables describe the full topology, and nothing is implicit. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> [maz: wrote an actual changelog] Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner1-4/+1
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-03-21Merge tag 'irqchip-5.1-2' of ↵Thomas Gleixner1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent Pull irqchip updates for 5.1 from Marc Zyngier: - irqsteer error handling fix - GICv3 range coalescing fix - stm32 coprocessor coexistence fixes - mbigen MSI teardown fix - non-DT secondary GIC infrastructure removed - various cleanups (brcmstb-l2, mmp) - new DT bindings (r8a774c0)
2019-03-21irqchip/mmp: Make mmp_irq_domain_ops staticYueHaibing1-1/+1
Fix sparse warning: drivers/irqchip/irq-mmp.c:182:29: warning: symbol 'mmp_irq_domain_ops' was not declared. Should it be static? Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-01-29irqchip/mmp: Only touch the PJ4 IRQ & FIQ bits on enable/disableLubomir Rintel1-1/+5
Resetting bit 4 disables the interrupt delivery to the "secure processor" core. This breaks the keyboard on a OLPC XO 1.75 laptop, where the firmware running on the "secure processor" bit-bangs the PS/2 protocol over the GPIO lines. It is not clear what the rest of the bits are and Marvell was unhelpful when asked for documentation. Aside from the SP bit, there are probably priority bits. Leaving the unknown bits as the firmware set them up seems to be a wiser course of action compared to just turning them off. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz> [maz: fixed-up subject and commit message] Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-08-31irqchip/mmp: Make mmp_intc_conf constBhumika Goyal1-2/+2
Make these const as they are only used during a copy operation. Done using Coccinelle. @match disable optional_qualifier@ identifier s; @@ static struct mmp_intc_conf s = {...}; @ref@ position p; identifier match.s; @@ s@p @good1@ position ref.p; identifier match.s,f,c; expression e; @@ ( e = s@p | e = s@p.f | c(...,s@p.f,...) | c(...,s@p,...) ) @bad depends on !good1@ position ref.p; identifier match.s; @@ s@p @depends on forall !bad disable optional_qualifier@ identifier match.s; @@ static + const struct mmp_intc_conf s; Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2015-09-16irqchip: Kill off set_irq_flags usageRob Herring1-3/+0
set_irq_flags is ARM specific with custom flags which have genirq equivalents. Convert drivers to use the genirq interfaces directly, so we can kill off set_irq_flags. The translation of flags is as follows: IRQF_VALID -> !IRQ_NOREQUEST IRQF_PROBE -> !IRQ_NOPROBE IRQF_NOAUTOEN -> IRQ_NOAUTOEN For IRQs managed by an irqdomain, the irqdomain core code handles clearing and setting IRQ_NOREQUEST already, so there is no need to do this in .map() functions and we can simply remove the set_irq_flags calls. Some users also modify IRQ_NOPROBE and this has been maintained although it is not clear that is really needed. There appears to be a great deal of blind copy and paste of this code. Signed-off-by: Rob Herring <robh@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: Russell King <linux@arm.linux.org.uk> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Kukjin Kim <kgene@kernel.org> Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Lee Jones <lee@kernel.org> Cc: Alexander Shiyan <shc_work@mail.ru> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: linux-rpi-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Link: http://lkml.kernel.org/r/1440889285-5637-3-git-send-email-robh@kernel.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-09-16genirq: Remove irq argument from irq flow handlersThomas Gleixner1-1/+1
Most interrupt flow handlers do not use the irq argument. Those few which use it can retrieve the irq number from the irq descriptor. Remove the argument. Search and replace was done with coccinelle and some extra helper scripts around it. Thanks to Julia for her help! Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com>
2015-07-16irqchip/mmp: Prepare icu_mux_irq_demux for irq argument removalThomas Gleixner1-1/+2
The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr>
2015-07-11irqchip: Prepare for local stub header removalJoel Porquet1-2/+1
The IRQCHIP_DECLARE macro moved to to 'include/linux/irqchip.h', so the local irqchip.h became an empty shell, which solely includes include/linux/irqchip.h Include the global header in all irqchip drivers instead of the local header, so we can remove it. Signed-off-by: Joel Porquet <joel@porquet.org> Cc: vgupta@synopsys.com Cc: monstr@monstr.eu Cc: ralf@linux-mips.org Cc: jason@lakedaemon.net Link: http://lkml.kernel.org/r/1882096.X39jVG8e0D@joel-zenbook Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-09-03irqchip: mmp: Convert to handle_domain_irqMarc Zyngier1-6/+4
Use the new handle_domain_irq method to handle interrupts. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1409047421-27649-9-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-04-05Merge tag 'cleanup-3.15' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Arnd Bergmann: "These cleanup patches are mainly move stuff around and should all be harmless. They are mainly split out so that other branches can be based on top to avoid conflicts. Notable changes are: - We finally remove all mach/timex.h, after CLOCK_TICK_RATE is no longer used (Uwe Kleine-König) - The Qualcomm MSM platform is split out into legacy mach-msm and new-style mach-qcom, to allow easier maintainance of the new hardware support without regressions (Kumar Gala) - A rework of some of the Kconfig logic to simplify multiplatform support (Rob Herring) - Samsung Exynos gets closer to supporting multiplatform (Sachin Kamat and others) - mach-bcm3528 gets merged into mach-bcm (Stephen Warren) - at91 gains some common clock framework support (Alexandre Belloni, Jean-Jacques Hiblot and other French people)" * tag 'cleanup-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (89 commits) ARM: hisi: select HAVE_ARM_SCU only for SMP ARM: efm32: allow uncompress debug output ARM: prima2: build reset code standalone ARM: at91: add PWM clock ARM: at91: move sam9261 SoC to common clk ARM: at91: prepare common clk transition for sam9261 SoC ARM: at91: updated the at91_dt_defconfig with support for the ADS7846 ARM: at91: dt: sam9261: Device Tree support for the at91sam9261ek ARM: at91: dt: defconfig: Added the sam9261 to the list of DT-enabled SOCs ARM: at91: dt: Add at91sam9261 dt SoC support ARM: at91: switch sam9rl to common clock framework ARM: at91/dt: define main clk frequency of at91sam9rlek ARM: at91/dt: define at91sam9rl clocks ARM: at91: prepare common clk transition for sam9rl SoCs ARM: at91: prepare sam9 dt boards transition to common clk ARM: at91: dt: sam9rl: Device Tree for the at91sam9rlek ARM: at91/defconfig: Add the sam9rl to the list of DT-enabled SOCs ARM: at91: Add at91sam9rl DT SoC support ARM: at91: prepare at91sam9rl DT transition ARM: at91/defconfig: refresh at91sam9260_9g20_defconfig ...
2014-03-12irqchip: Remove asmlinkage from static functionsStephen Boyd1-4/+2
LTO patches add __visible to the asmlinkage define, causing compilation warnings like: drivers/irqchip/irq-gic.c:283:1: warning: 'externally_visible' attribute have effect only on public objects [-Wattributes] Drop asmlinkage here to avoid such warnings. Reported-by: Olof's autobuilder <build@lixom.net> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-arm-kernel@lists.infradead.org Cc: khilman@linaro.org Cc: Russell King <linux@arm.linux.org.uk> Cc: Josh Cartwright <joshc@codeaurora.org> Cc: Andi Kleen <ak@linux.intel.com> Link: http://lkml.kernel.org/r/1393980030-17770-1-git-send-email-sboyd@codeaurora.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-03-04irqchip: mmp: avoid use head file in a specific archNeil Zhang1-1/+1
For example, arm64 doesn't have mach/irq.h. Signed-off-by: Neil Zhang <zhangwm@marvell.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2013-08-24irqchip: mmp: avoid to include irqs head fileHaojian Zhuang1-24/+21
Since <mach/irqs.h> in irq-mmp.c blocks the multiplatform build, remove it instead. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2013-08-24ARM: mmp: avoid to include head file in mach-mmpHaojian Zhuang1-14/+1
pxa910_set_wake() & mmp2_set_wake() are both declared in head files of arch/arm/mach-mmp/include/mach directory. If we include these head files in irq-mmp driver, it blocks the multiplatform build. So adjust the code. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2013-08-24irqchip: mmp: support irqchipHaojian Zhuang1-115/+165
Support IRQCHIP & CONFIG_MULTI_IRQ_HANDLER in irq-mmp driver. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Reviewed-by: Daniel Drake <dsd@laptop.org>
2013-08-24irqchip: move mmp irq driverHaojian Zhuang1-0/+461
Move irq-mmp driver from mach-mmp directory into irqchip directory. It's used to support multiple platform. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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