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path: root/drivers/clk/tegra
AgeCommit message (Expand)AuthorFilesLines
2014-05-16clk: tegra: Fix wrong value written to PLLE_AUXTuomas Tynkkynen1-1/+1
2014-04-24clk: tegra: remove non-existent clocksStephen Warren1-3/+0
2014-02-24Merge branch 'clk-fixes' into clk-nextMike Turquette7-31/+45
2014-02-23clk: tegra: Staticize tegra_clk_periph_no_gate_opsSachin Kamat1-1/+1
2014-02-20clk: tegra124: remove gr2d and gr3d clocksPeter De Schrijver1-2/+0
2014-02-20clk: tegra: Fix vic03 mux indexPeter De Schrijver1-3/+1
2014-02-17clk: tegra: use max divider if divider overflowsAndrew Bresticker1-1/+1
2014-02-17clk: tegra: cclk_lp has a pllx/2 dividerAndrew Bresticker1-1/+1
2014-02-17clk: tegra: fix sdmmc clks on Tegra1x4Andrew Bresticker4-8/+16
2014-02-17clk: tegra: fix host1x clock on Tegra124Mark Zhang1-1/+1
2014-02-17clk: tegra: PLLD2 fixes for hdmiDavid Ung1-8/+7
2014-02-17clk: tegra: Fix PLLD mnp tableRhyland Klein1-1/+10
2014-02-17clk: tegra: Fix PLLP rate tableGabe Black1-5/+5
2014-02-17clk: tegra: Correct clock number for UARTEThierry Reding1-1/+1
2014-02-17clk: tegra: Add missing Tegra20 fuse clksPeter De Schrijver1-0/+2
2014-01-23Merge tag 'clk-for-linus-3.14-part1' of git://git.linaro.org/people/mike.turq...Linus Torvalds2-7/+7
2013-12-19clk: tegra: Staticize tegra_clk_periph_nodiv_opsSachin Kamat1-1/+1
2013-12-19clk: tegra: Staticize local variables in clk-pll.cSachin Kamat1-6/+6
2013-12-11clk: tegra: remove bogus PCIE_XCLKStephen Warren2-13/+0
2013-12-11clk: tegra: remove legacy reset APIsStephen Warren3-63/+0
2013-12-11clk: tegra: implement a reset driverStephen Warren6-6/+57
2013-11-28clk: tegra: fix __clk_lookup() return value checksWei Yongjun1-4/+4
2013-11-28clk: tegra: Do not print errors for clk_round_rate()Thierry Reding1-6/+3
2013-11-26clk: tegra: Initialize DSI low-power clocksThierry Reding1-0/+2
2013-11-26clk: tegra: add FUSE clock deviceAlexandre Courbot4-1/+4
2013-11-26clk: tegra: Properly setup PWM clock on Tegra30Thierry Reding1-1/+3
2013-11-26clk: tegra: Initialize secondary gr3d clock on Tegra30Thierry Reding1-0/+1
2013-11-26clk: tegra114: Initialize clocks needed for HDMIMikko Perttunen1-0/+2
2013-11-26clk: tegra124: add suspend/resume function for tegra_cpu_car_opsJoseph Lo1-0/+27
2013-11-26clk: tegra124: add wait_for_reset and disable_clock for tegra_cpu_car_opsJoseph Lo1-0/+26
2013-11-26clk: tegra124: Add support for Tegra124 clocksPeter De Schrijver2-0/+1371
2013-11-26clk: tegra124: Add new peripheral clocksPeter De Schrijver1-0/+69
2013-11-26clk: tegra124: Add common clk IDs to clk-id.hPeter De Schrijver1-0/+22
2013-11-26clk: tegra: add TEGRA_PERIPH_NO_GATEPeter De Schrijver3-3/+22
2013-11-26clk: tegra: add locking to periph clksPeter De Schrijver2-19/+24
2013-11-26clk: tegra: Add periph regs bank XPeter De Schrijver1-0/+10
2013-11-26clk: tegra: Add support for PLLSSPeter De Schrijver2-2/+126
2013-11-26clk: tegra: move tegra20 to common infraPeter De Schrijver1-402/+255
2013-11-26clk: tegra: move tegra30 to common infraPeter De Schrijver1-895/+403
2013-11-26clk: tegra: introduce common gen4 super clockPeter De Schrijver4-74/+155
2013-11-26clk: tegra: move PMC, fixed clocks to common filesPeter De Schrijver5-74/+253
2013-11-26clk: tegra: move periph clocks to common filePeter De Schrijver6-581/+627
2013-11-26clk: tegra: move audio clk to common filePeter De Schrijver4-208/+402
2013-11-26clk: tegra: add clkdev registration infraPeter De Schrijver3-159/+179
2013-11-26clk: tegra: add common infra for DT clocksPeter De Schrijver2-0/+16
2013-11-26clk: tegra: add header for common tegra clock IDsPeter De Schrijver1-0/+213
2013-11-26clk: tegra: move fields to tegra_clk_pll_paramsPeter De Schrijver5-177/+175
2013-11-26clk: tegra: use pll_ref as the pll_e parentPeter De Schrijver2-4/+7
2013-11-26clk: tegra: move some PLLC and PLLXC init to clk-pll.cPeter De Schrijver2-93/+111
2013-11-26clk: tegra: Add TEGRA_PERIPH_NO_DIV flagPeter De Schrijver2-3/+9