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path: root/arch/xtensa/kernel/align.S
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2014-08-14xtensa: allow single-stepping through unaligned load/storeMax Filippov1-0/+8
Update icount when icountlevel is non-zero but not greater than EXCM level when load/store instruction is successfully emulated. This allows single-stepping over such instruction in userspace debugger. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-08-14xtensa: move invalid unaligned instruction handler closer to its usersMax Filippov1-33/+29
With this change a threaded jump from .Linvalid_instruction_load to .Linvalid_instruction can be removed and more code may be added to common load/store exit path. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-08-14xtensa: make fast_unaligned store restartableMax Filippov1-32/+19
fast_unaligned may encounter DTLB miss or SEGFAULT during the store emulation. Don't update epc1 and lcount until after the store emulation is complete, so that the faulting store instruction could be replayed. Remove duplicate code handling zero overhead loops and calculate new epc1 and lcount in one place. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-08-14xtensa: add double exception fixup handler for fast_unalignedMax Filippov1-0/+43
fast_unaligned_fixup restores user registers and runs normal exception handler in the current stack frame. Unaligned load/store is retried after that. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-08-14xtensa: fix kernel/user jump out of fast_unalignedMax Filippov1-1/+1
Use correct register (a0, just read from the PS) to check user mode bit. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2013-09-06xtensa: keep a3 and excsave1 on entry to exception handlersMax Filippov1-3/+2
Based on the SMP patch by Joe Taylor and subsequent fixes. Preserve exception table pointer (normally stored in excsave1 SR) as it cannot be easily restored in SMP environment. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: clean up files to make them code-style compliantChris Zankel1-2/+1
Remove heading and trailing spaces, trim trailing lines, and wrap lines that are longer than 80 characters. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: provide proper assembler function boundaries with ENDPROC()Chris Zankel1-0/+1
Use ENDPROC() to mark the end of assembler functions. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-15xtensa: reorganize SR referencingMax Filippov1-19/+19
- reference SRs by names where possible, not by numbers; - get rid of __stringify around SR names where possible; - remove unneeded SR names from asm/regs.h; - add SREG_ prefix to remaining SR names; Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2006-12-10[PATCH] xtensa: remove extra header filesChris Zankel1-23/+19
The Xtensa port contained many header files that were never needed. This rather lengthy patch removes all those files. Unfortunately, there were many dependencies that needed to be updated, so this patch touches quite a few source files. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-09kbuild: m68k,parisc,ppc,ppc64,s390,xtensa use generic asm-offsets.h supportSam Ravnborg1-1/+1
Delete obsoleted parts form arch makefiles and rename to asm-offsets.h Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2005-06-24[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 3Chris Zankel1-0/+459
The attached patches provides part 3 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>