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2008-07-15powerpc: Fix a build problem on ppc32 with new DMA_ATTRsTakashi Iwai1-1/+1
The new dma_attrs support must only be enabled for 64 bits as it's not been implemented for 32 bits yet. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-15powerpc: Don't spin on sync instruction at boot timeSonny Rao1-1/+2
Push the sync below the secondary smp init hold loop and comment its purpose. This should speed up boot by reducing global traffic during the single-threaded portion of boot. Signed-off-by: Sonny Rao <sonnyrao@us.ibm.com> Signed-off-by: Milton Miller <miltonm@bga.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-15powerpc: Add VSX load/store alignment exception handlerMichael Neuling1-1/+57
VSX loads and stores will take an alignment exception when the address is not on a 4 byte boundary. This add support for these alignment exceptions and will emulate the requested load or store. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-15powerpc: fix giveup_vsx to save registers correctlyMichael Neuling4-7/+15
giveup_vsx didn't save the FPU and VMX regsiters. Change it to be like giveup_fpr/altivec which save these registers. Also update call sites where FPU and VMX are already saved to use the original giveup_vsx (renamed to __giveup_vsx). Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-15powerpc: support for latencytopArnd Bergmann2-10/+30
Implement save_stack_trace_tsk on powerpc, so that we can run with latencytop. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-15powerpc: Remove unnecessary condition when sanity-checking WIMG bitsDave Kleikamp2-4/+3
It is okay for both _PAGE_GUARDED and _PAGE_COHERENT (G and M) to be set in the same pte. In fact, even if that were not the case, there doesn't seem to be any place where G is set without also setting I (_PAGE_NO_CACHE), so the test for I is sufficient as a condition to clear _PAGE_COHERENT when filling the hash table. Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-15powerpc: Add PPC_FEATURE_PSERIES_PERFMON_COMPATNathan Lynch1-2/+4
Background from Maynard Johnson: As of POWER6, a set of 32 common events is defined that must be supported on all future POWER processors. The main impetus for this compat set is the need to support partition migration, especially from processor P(n) to processor P(n+1), where performance software that's running in the new partition may not be knowledgeable about processor P(n+1). If a performance tool determines it does not support the physical processor, but is told (via the PPC_FEATURE_PSERIES_PERFMON_COMPAT bit) that the processor supports the notion of the PMU compat set, then the performance tool can surface just those events to the user of the tool. PPC_FEATURE_PSERIES_PERFMON_COMPAT indicates that the PMU supports at least this basic subset of events which is compatible across POWER processor lines. Signed-off-by: Nathan Lynch <ntl@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-15powerpc: Add driver for Barrier Synchronization RegisterSonny Rao1-0/+1
Adds a character driver for BSR support on IBM POWER systems including Power5 and Power6. The BSR is an optional processor facility not currently implemented by any other processors. It's primary purpose is fast large SMP synchronization. More details on the BSR are in comments to the code which follows. This patch adds BSR driver to pseries_defconfig. Signed-off-by: Sonny Rao <sonnyrao@linux.vnet.ibm.com> Signed-off-by: Joel Schopp <jschopp@austin.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-15Merge commit 'gcl/gcl-next'Benjamin Herrenschmidt17-207/+1554
2008-07-15Merge commit 'jwb/jwb-next'Benjamin Herrenschmidt21-250/+1899
2008-07-14powerpc/fsl: update crypto node definition and device tree instancesKim Phillips26-143/+200
delete obsolete device-type property, delete model property (use compatible property instead), prepend "fsl," to Freescale specific properties. Add nodes to device trees that are missing them, and fix broken property values in other trees. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14powerpc/85xx: Minor fixes for 85xxds and 8536ds board.Jason Jin2-2/+2
Remove the "uninitialized use" compile warning and avoid potential runtime issue. Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14powerpc: Add 82xx/83xx/86xx to 6xx MultiplatformKumar Gala4-44/+26
There isn't any reason at this point that we can't build 82xx, 83xx & 86xx support in with the other 6xx based boards. Twiddle the Kconfigs to allow this. This allows us to remove the machine type selection for related to 6xx. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14powerpc/85xx: publish of device for cds platformsDave Jiang1-0/+14
Publish the devices listed in dts under SOC as of_device for 85xx_cds platform. The devices are needed by the 85xx EDAC driver. Signed-off-by: Dave Jiang <djiang@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14powerpc/booke: don't reinitialize time baseKumar Gala1-4/+0
For some reason long ago I decided that we should zero out the time base when we calibrate the decrementer. The problem is that this can be harmful in SMP systems where the firmware has already synchronized the time bases on the various cores. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14powerpc/86xx: Refactor pic initKumar Gala6-111/+86
Moved the pic initialization into its own common file and out of the board code. Also fixed the OF reference counting on the mpic node. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14powerpc/CPM: Add i2c pins to dts and board setupJochen Friedrich6-0/+44
Initialize I2C pins on boards with CPM1/CPM2 controllers and document the i2c bus in booting-without-of. The boards don't have any I2C chips connected to the I2C bus, so unless some external chips are connected to the boards, this code is just an example of setting everything else up. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14powerpc/85xx: Add support for MPC8536DSKumar Gala6-0/+2191
Add support for the MPC8536 process and MPC8536DS reference board. The MPC8536 is an e500v2 based SoC which eTSEC, USB, SATA, PCI, and PCIe. The USB and SATA IP blocks are similiar to those on the PQ2 Pro SoCs and thus use the same drivers. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14powerpc/85xx: minor fixes for MPC85xx DS board portKumar Gala1-3/+3
These issues were reported by Stephen Rothwell for another 85xx board port and pointed out by Chen Gong as issues in the DS port. * mpic OF node reference counting was off * of_device_id struct should be marked as __initdata Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14powerpc/CPM: Minor cosmetic changes to udbg_putcNye Liu1-2/+1
udbg_putc is a *function pointer* that is initialized during udbg_init_cpm. It might not be initialized properly when called from udbg_putc_cpm(), so (recursively) call udbg_putc_cpm() directly. Signed-off-by: Nye Liu <nyet@mrv.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14powerpc/85xx: TQM8548: add missing support for RTC and LM75Wolfgang Grandegger2-6/+142
It adds the missing RTC node to tqm8548.dts and enables support for I2C, DS1307 and LM75 in the default configuration. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14powerpc/86xx: mpc8610_hpcd: fix interrupt trigger type for ULi IDEAnton Vorontsov1-1/+1
i8259 PIC is disabled on MPC8610HPCD, and ULi IDE is configured to use PCI sideband interrupt that is specified in the device tree. Current HPCD's device tree specify that IDE interrupt is low to high sensitive, but in practice ULi IDE throws active-high interrupts (not active-low as all normal PCI devices). Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14powerpc: Fix pq2fads irq handling with PREEMPT_RTRune Torgersen1-1/+1
Fix interrupt threading issue on pq2fads when running with CONFIG_PREEMPT_RT Signed-off-by: Rune Torgersen <runet@innovsys.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14powerpc/85xx: Fix KSI8560 .dtsKumar Gala1-10/+10
Rename MPIC label to mpic to match all other 85xx .dts and to fix compile issue introduced by addition of the DMA node. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14Merge commit 'origin/HEAD' into test-mergeBenjamin Herrenschmidt4-4/+25
Manual fixup of include/asm-powerpc/pgtable-ppc64.h
2008-07-12powerpc/mpc5121: Add support for CPLD on MPC5121ADS boardJohn Rigby5-1/+233
Add a interrupt host for the interrupt controller in the mpc5121ads cpld. PCI interrupts are 0-7 the rest are 8-15 Touchscreen pendown irq is hardwired to irq1 All other irqs are chained to irq0 Signed-off-by: John Rigby <jrigby@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-07-12powerpc/mpc5121: Add generic board support for MPC5121 platformsJohn Rigby6-63/+177
Move shared code from mpc5121_ads.c to new file mpc512x_shared.c - mpc512x_find_ips_freq -> unchanged - contents of mpc5121_ads_init_IRQ -> mpc512x_init_IRQ - looking for fsl,mpc5121-ipic instead of fsl,ipic - mpc5121_ads_declare_of_platform_devices -> mpc5121_declare_of_platform_devices - and use compatible for lookup instead of node name Add new generic board setup mpc5121_generic.c Signed-off-by: John Rigby <jrigby@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-07-12powerpc/mpc5121: Add clock driverJohn Rigby3-0/+731
Plugs into the generic powerpc clock driver in arch/powerpc/kernel/clock.c The following subset of clk_interface is implemented: clk_get, clk_put: get clock via name, release clock clk_enable, clk_disable: enable or disable clock clk_get_rate: get clock rate in Hz clk_set_rate: stubbed clk_round_rate: stubbed clk_set_parent: NULL clk_get_parent: NULL Signed-off-by: John Rigby <jrigby@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-07-12powerpc/mpc5121: Update device tree for MPC5121ADS evaluation boardJohn Rigby1-11/+299
Current device tree is only bare bones. This patch adds nodes to make it a complete tree for the MPC5121ads. Added nodes include: mbx - opengl coprocessor nfc - nand flash controller cpld-pic - on board cpld rtc clock - clock control pmc - power management control gpio mscan - can module i2c axe - audio coprocessor display - display interface unit mdio ethernet usb ioctl - pin config pata ac97 - PSC configured as AC97 pscfifo - psc fifo configuration dma pci Fix typo in header changing MDS to ADS. Add a compatible property of the form "fsl,mpc5121-..." to nodes missing one. Changed localbus compatible to fsl,mpc5121-localbus, this does not break anything because the only code that uses it finds it via the node name, not compatible. Signed-off-by: John Rigby <jrigby@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-07-12powerpc/mpc5200: fix compile warnings in bestcomm driverGrant Likely2-2/+2
Fix for the following compiler warnings: CC arch/powerpc/sysdev/bestcomm/bestcomm.o arch/powerpc/sysdev/bestcomm/bestcomm.c: In function 'mpc52xx_bcom_probe': arch/powerpc/sysdev/bestcomm/bestcomm.c:446: warning: format '%08lx' expects type 'long unsigned int', but argument 2 has type 'phys_addr_t' CC arch/powerpc/sysdev/bestcomm/sram.o arch/powerpc/sysdev/bestcomm/sram.c: In function 'bcom_sram_init': arch/powerpc/sysdev/bestcomm/sram.c:89: warning: format '%08lx' expects type 'long unsigned int', but argument 3 has type 'phys_addr_t' Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-07-12powerpc/mpc5200: Add PSC helpers for bestcomm engineGrant Likely2-0/+100
Simplify the interface for setting up bestcomm DMA to PSCs by adding some helper functions. The helper function sets the correct values for the initator and ipr values in PSC DMA tasks based on the PSC number. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-07-12powerpc/mpc5200: add missing MSCAN FDT nodes for TQM52xxWolfgang Grandegger1-0/+14
This patch adds the still missing FDT nodes for the MSCAN devices for the TQM52xx modules. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-07-12powerpc/i2c: Convert i2c-mpc into an of_platform driverJon Smirl1-133/+0
Convert i2c-mpc to an of_platform driver. Utilize the code in drivers/of-i2c.c to make i2c modules dynamically loadable by the device tree. Signed-off-by: Jon Smirl <jonsmirl@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-07-12powerpc/mpc5200: PCI write combine timerAndre Schwarz1-1/+2
On MPC5200 the PCI target control register (PCITCR) @ MBAR + 0xD6C is initialized with only bit 7 (Latrule disable) set. The 8-Bit write combine timer (Bits 24..31) should be also set to a reasonable value _greater zero_ (0x08 = default) since setting it to 0x00 leads to _very poor_ performance as a PCI target since external burst won't be possible at all. Setting the WCT to 0x08 (cache-line size) leads to good overall perfomance. Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-07-09powerpc: Fix problems with 32bit PPC's running with >= 4GB of RAMStefan Roese3-8/+8
This patch enables 32bit PPC's (with 36bit physical address space, e.g. IBM/AMCC PPC44x) to run with >= 4GB of RAM. Mostly its just replacing types (unsigned long -> phys_addr_t). Tested on an AMCC Katmai with 4GB of DDR2. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-07-09powerpc/44x: Update ppc44x_defconfigJosh Boyer1-45/+104
Add the virtex and sam440ep platforms to the multiboard defconfig Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-07-09powerpc/44x: Support NAND boot for Rev A Warp boardsSean MacLennan1-2/+7
Allow the Rev A Warp boards to boot from NAND. Signed-off-by: Sean MacLennan <smaclennan@pikatech.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-07-09powerpc: rework 4xx PTE access and TLB missBenjamin Herrenschmidt4-192/+134
This is some preliminary work to improve TLB management on SW loaded TLB powerpc platforms. This introduce support for non-atomic PTE operations in pgtable-ppc32.h and removes write back to the PTE from the TLB miss handlers. In addition, the DSI interrupt code no longer tries to fixup write permission, this is left to generic code, and _PAGE_HWWRITE is gone. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-07-09Merge branch 'virtex-for-2.6.27' of ↵Josh Boyer12-3/+1646
git://git.secretlab.ca/git/linux-2.6-virtex into 4xx-next
2008-07-09powerpc/440: Convert Virtex ML507 device tree to dts-v1Grant Likely1-99/+157
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-07-09powerpc/bootwrapper: Allow user to specify additional default targetsGrant Likely2-0/+16
It is inconvenient to add additional default targets to the bootwrapper Makefile for each new board supported which just needs a different dts file. This change allows the defconfig to specify additional build targets. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-07-09powerpc/eeh: PERR/SERR bit settings during EEH device recoveryMike Mason1-0/+14
The following patch restores the PERR and SERR bits in the PCI command register during an EEH device recovery. We have found at least one case (an Agilent test card) where the PERR/SERR bits are set to 1 by firmware at boot time, but are not restored to 1 during EEH recovery. The patch fixes the Agilent card problem. It has been tested on several other EEH-enabled cards with no regressions. Signed-off-by: Mike Mason <mmlnx@us.ibm.com> Acked-by: Linas Vepstas <linasvepstas@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-09powerpc: remove unused variable in emulate_fp_pairMichael Neuling1-3/+3
regs is not used in emulate_fp_pair so remove it. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-09powerpc: fix swapcontext backwards compat. with VSX ucontext changesMichael Neuling2-5/+70
When the ucontext changed to add the VSX context, this broke backwards compatibly on swapcontext. swapcontext only compares the ucontext size passed in from the user to the new kernel ucontext size. This adds a check against the old ucontext size (with VMX but without VSX). It also adds some sanity check for ucontexts without VSX, but where VSX is used according the MSR. Fixes for both 32 and 64bit processes on 64bit kernels Kudos to Paulus for noticing. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-09powerpc/ibmebus: more meaningful variable namePaul Gortmaker1-2/+2
Choose a more meaningful name for better System.map readability and autopsy value etc. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-09ibm_newemac: Parameterize EMAC Multicast Match HandlingGrant Erickson9-27/+27
Various instances of the EMAC core have varying: 1) number of address match slots, 2) width of the registers for handling address match slots, 3) number of registers for handling address match slots and 4) base offset for those registers. As the driver stands today, it assumes that all EMACs have 4 IAHT and GAHT 32-bit registers, starting at offset 0x30 from the register base, with only 16-bits of each used for a total of 64 match slots. The 405EX(r) and 460EX now use the EMAC4SYNC core rather than the EMAC4 core. This core has 8 IAHT and GAHT registers, starting at offset 0x80 from the register base, with ALL 32-bits of each used for a total of 256 match slots. This adds a new compatible device tree entry "emac4sync" and a new, related feature flag "EMAC_FTR_EMAC4SYNC" along with a series of macros and inlines which supply the appropriate parameterized value based on the presence or absence of the EMAC4SYNC feature. The code has further been reworked where appropriate to use those macros and inlines. In addition, the register size passed to ioremap is now taken from the device tree: c4 for EMAC4SYNC cores 74 for EMAC4 cores 70 for EMAC cores rather than sizeof (emac_regs). Finally, the device trees have been updated with the appropriate compatible entries and resource sizes. This has been tested on an AMCC Haleakala board such that: 1) inbound ICMP requests to 'haleakala.local' via MDNS from both Mac OS X 10.4.11 and Ubuntu 8.04 systems as well as 2) outbound ICMP requests from 'haleakala.local' to those same systems in the '.local' domain via MDNS now work. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Acked-by: Jeff Garzik <jgarzik@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-09powerpc/mm: Don't clear _PAGE_COHERENT when _PAGE_SAO is setDave Kleikamp1-1/+2
The current low level hash code on LPAR configurations clears _PAGE_COHERENT (M) when either _PAGE_GUARDED (G) or _PAGE_NO_CACHE (I) is set. This conflicts with _PAGE_SAO which has M, I and W bits sets at once (normally invalid combo) to indicate the new SAO attribute. This changes the code to allow that case. Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-09powerpc/mm: Add Strong Access Ordering supportDave Kleikamp1-0/+3
Allow an application to enable Strong Access Ordering on specific pages of memory on Power 7 hardware. Currently, power has a weaker memory model than x86. Implementing a stronger memory model allows an emulator to more efficiently translate x86 code into power code, resulting in faster code execution. On Power 7 hardware, storing 0b1110 in the WIMG bits of the hpte enables strong access ordering mode for the memory page. This patchset allows a user to specify which pages are thus enabled by passing a new protection bit through mmap() and mprotect(). I have defined PROT_SAO to be 0x10. Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-09powerpc: Use new printk extension %pS to print symbols on oopsBenjamin Herrenschmidt1-9/+5
This changes the oops and backtrace code to use the new %pS printk extension to print out symbols rather than manually calling print_symbol. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-09powerpc: move device_to_mask() to dma-mapping.hMark Nelson1-9/+0
Move device_to_mask() to dma-mapping.h because we need to use it from outside dma_64.c in a later patch. Signed-off-by: Mark Nelson <markn@au1.ibm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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