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2011-03-25Blackfin: bitops: fix include order after little endian inclusionMike Frysinger1-1/+3
The le.h header requires things like test_bit to be declared, so we need to move its inclusion to after the point where that happens. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24Merge branch 'for-linus' of ↵Linus Torvalds2-1/+4
git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: Blackfin: bf54x: re-enable anomaly 05000353 for all revs Blackfin: enable atomic64_t support Blackfin: wire up new syncfs syscall Blackfin: SMP: flush CoreB cache when shutting down
2011-03-23bitops: remove minix bitops from asm/bitops.hAkinobu Mita1-1/+0
minix bit operations are only used by minix filesystem and useless by other modules. Because byte order of inode and block bitmaps is different on each architecture like below: m68k: big-endian 16bit indexed bitmaps h8300, microblaze, s390, sparc, m68knommu: big-endian 32 or 64bit indexed bitmaps m32r, mips, sh, xtensa: big-endian 32 or 64bit indexed bitmaps for big-endian mode little-endian bitmaps for little-endian mode Others: little-endian bitmaps In order to move minix bit operations from asm/bitops.h to architecture independent code in minix filesystem, this provides two config options. CONFIG_MINIX_FS_BIG_ENDIAN_16BIT_INDEXED is only selected by m68k. CONFIG_MINIX_FS_NATIVE_ENDIAN is selected by the architectures which use native byte order bitmaps (h8300, microblaze, s390, sparc, m68knommu, m32r, mips, sh, xtensa). The architectures which always use little-endian bitmaps do not select these options. Finally, we can remove minix bit operations from asm/bitops.h for all architectures. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Greg Ungerer <gerg@uclinux.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Roman Zippel <zippel@linux-m68k.org> Cc: Andreas Schwab <schwab@linux-m68k.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Michal Simek <monstr@monstr.eu> Cc: "David S. Miller" <davem@davemloft.net> Cc: Hirokazu Takata <takata@linux-m32r.org> Acked-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Paul Mundt <lethal@linux-sh.org> Cc: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-03-23bitops: remove ext2 non-atomic bitops from asm/bitops.hAkinobu Mita1-1/+0
As the result of conversions, there are no users of ext2 non-atomic bit operations except for ext2 filesystem itself. Now we can put them into architecture independent code in ext2 filesystem, and remove from asm/bitops.h for all architectures. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Jan Kara <jack@suse.cz> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-03-23bitops: introduce little-endian bitops for most architecturesAkinobu Mita1-0/+1
Introduce little-endian bit operations to the big-endian architectures which do not have native little-endian bit operations and the little-endian architectures. (alpha, avr32, blackfin, cris, frv, h8300, ia64, m32r, mips, mn10300, parisc, sh, sparc, tile, x86, xtensa) These architectures can just include generic implementation (asm-generic/bitops/le.h). Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Mikael Starvik <starvik@axis.com> Cc: David Howells <dhowells@redhat.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Matthew Wilcox <willy@debian.org> Cc: Grant Grundler <grundler@parisc-linux.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Zankel <chris@zankel.net> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Acked-by: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-03-22Blackfin: enable atomic64_t supportMike Frysinger1-0/+2
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-22Blackfin: wire up new syncfs syscallMike Frysinger1-1/+2
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin: wire up new syscallsMike Frysinger1-1/+4
Hook up name_to_handle_at, open_by_handle_at, and clock_adjtime. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin/ipipe: restore pipeline bits in irqflagsPhilippe Gerum1-10/+77
This patch fixes the Blackfin irqflags to make them I-pipe aware anew, after the introduction of the hard_local_irq_*() API. Signed-off-by: Philippe Gerum <rpm@xenomai.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin/ipipe: upgrade to I-pipe mainlinePhilippe Gerum2-65/+41
This patch introduces Blackfin-specific bits to support the current tip of the interrupt pipeline development, mainly: - 2/3-level interrupt maps (sparse IRQs) - generic virq handling - sysinfo v2 format for ipipe_get_sysinfo() Signed-off-by: Philippe Gerum <rpm@xenomai.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin: SMP: work around anomaly 05000491Sonic Zhang1-1/+6
In order to safely work around anomaly 05000491, we have to execute IFLUSH from L1 instruction sram. The trouble with multi-core systems is that all L1 sram is visible only to the active core. So we can't just place the functions into L1 and call it directly. We need to setup a jump table and place the entry point in external memory. This will call the right func based on the active core. In the process, convert from the manual relocation of a small bit of code into Core B's L1 to the more general framework we already have in place for loading arbitrary pieces of code into L1. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin: SMP: implement cpu_freq supportGraf Yang2-1/+4
Re-use some of the existing cpu hotplugging code in the process. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin: add bfin_write_{or,and} helpersMike Frysinger1-2/+14
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-03serial: bfin_5xx: split uart RX lock from uart port lock to avoid deadlockSonic Zhang1-0/+2
The RX lock is used to protect the RX buffer from concurrent access in DMA mode between the timer and RX interrupt routines. It is independent from the uart lock which is used to protect the TX buffer. It is possible for a uart TX transfer to be started up from the RX interrupt handler if low latency is enabled. So we need to split the locks to avoid deadlocking in this situation. In PIO mode, the RX lock is not necessary because the handle_simple_irq and handle_level_irq functions ensure driver interrupt handlers are called once on one core. And now that the RX path has its own lock, the TX interrupt has nothing to do with the RX path, so disabling it at the same time. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-01-10Blackfin: dpmc.h: pull in new pll.hMike Frysinger1-0/+2
Any consumer of dpmc.h expects to use VR_CTL, so also pull in the new mach/pll.h header for those functions. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: unify pll.h headersMike Frysinger1-0/+86
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: SMP: relocate blackfin_core_id() definitionGraf Yang2-4/+3
Since we're breaking apart some inter-header dependencies to avoid more circular loops, move the blackfin_core_id() definition to the func that it is based upon. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: SMP: fix build breakage in cache.hMike Frysinger1-0/+2
The SMP code needs "asmlinkage" which linkage.h provides. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: SMP: add missing arch_{read,write}_lock_flags helpersGraf Yang1-0/+4
Common code expects these to be defined for SMP ports, so add them. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: SMP: fix asm/bitops.h errorsMike Frysinger1-0/+2
The common asm-generic non-atomic bitops.h defines test_bit() for us, but we need to use our own version. So redirect the definition of this func to avoid having to inline the rest of the asm-generic file. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: SMP: rename the arch_xxx lock funcs to __raw_xxxGraf Yang2-12/+15
The external functions are named __raw_xxx, not arch_xxx, so rename the prototypes to match reality. This fixes some simple build errors in the bfin_ksyms.c code which exports these helpers to modules. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10serial: bfin_5xx: move resources into board filesSonic Zhang1-0/+12
Rather than maintain Kconfig entries where people have to enter raw numbers and hardcode lists of addresses/pins in the driver itself, push it all to platform resources. This lets us simplify the driver, the Kconfig, and gives board porters greater flexibility. In the process, we need to also start supporting the early platform interface. Not a big deal, but it causes the patch to be bigger than a simple resource relocation. All the Blackfin boards already have their resources updated and in place for this change. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: push gpio (port) defines into common headersMike Frysinger10-0/+250
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: dma: constify MMR pointer arrayMike Frysinger1-1/+1
The array of pointers is never written, so constify it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: bfin_dma.h: start a header for DMA MMR layoutMike Frysinger2-34/+92
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: switch to asm-generic/io.hMike Frysinger1-201/+37
Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10asm-generic/io.h: add reads[bwl]/writes[bwl] helpersMike Frysinger1-30/+0
A bunch of arches define reads[bwl]/writes[bwl] helpers for accessing memory mapped registers. Since the Blackfin ones aren't specific to Blackfin code, move them to the common asm-generic/io.h for people. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10Blackfin: bfin_serial.h: unify heavily duplicated serial codeMike Frysinger1-0/+263
Each Blackfin port has been duplicating UART structures and defines when there really is no need for it. So start a new bfin_serial.h header to unify all these pieces and give ourselves a fresh start. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-26m68k{nommu}/blackfin : remove old assembler-only flags bit definitionsPhilippe De Muyter1-8/+0
Long ago, PT_TRACESYS_OFF and friends were introduced as hard defines to avoid straight constants in assembler parts of linux m68k. They are not used anymore, and were not updated to follow changes in linux kernel. Remove them. When similar constants are needed, they are now generated using asm-offsets.c. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-10-25Blackfin: fix inverted anomaly 05000481 logicMike Frysinger1-1/+1
No one uses these MMRs so we didn't notice when the anomaly handling logic was inverted. Reported-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-25Blackfin: ppi/spi/twi headers: add missing __BFP undefMike Frysinger3-0/+6
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-25Blackfin: bfin_twi.h: start a common TWI headerMike Frysinger1-0/+43
Start one place for TWI definitions. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-22Blackfin: bfin_spi.h: add MMR peripheral layoutMike Frysinger1-0/+19
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-22Blackfin: bfin_ppi.h: start a common PPI/EPPI headerMike Frysinger1-0/+51
Start unifying the PPI/EPPI peripheral structures in one place. This may be used by camera/video/fpga/high speed devices. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-22Blackfin: bfin_can.h: add missing VERSION/VERSION2 MMRsMike Frysinger1-3/+6
Also document the mailbox (channel) data array layout. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-22Blackfin: H8606: move 8250 irqflags to platform resourcesMike Frysinger1-1/+0
Now that the common 8250 serial driver supports an "irqflags" field, we don't need to patch in a custom define into the code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-22Blackfin: add new cacheflush syscallSonic Zhang4-1/+26
Flushing caches sometimes requires anomaly workarounds which require supervisor-only insns. Normally we don't need to flush caches from userspace so this isn't a problem, but when gcc generates trampolines on the stack, we do. So add a new syscall for gcc to use modeled after the mips version. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-22Blackfin: workaround anomaly 05000481 (corruption with ITEST MMRs)Robin Getz1-3/+6
Nothing actually needs to use these MMRs (as direct cache manipulation is done with the DTEST MMRs), so simply hide the read funcs behind the anomaly define. They're generally unusable anyways when this anomaly is in effect. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-21Merge git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-irqflagsLinus Torvalds4-144/+149
* git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-irqflags: Fix IRQ flag handling naming MIPS: Add missing #inclusions of <linux/irq.h> smc91x: Add missing #inclusion of <linux/irq.h> Drop a couple of unnecessary asm/system.h inclusions SH: Add missing consts to sys_execve() declaration Blackfin: Rename IRQ flags handling functions Blackfin: Add missing dep to asm/irqflags.h Blackfin: Rename DES PC2() symbol to avoid collision Blackfin: Split the BF532 BFIN_*_FIO_FLAG() functions to their own header Blackfin: Split PLL code from mach-specific cdef headers
2010-10-18spi/bfin_spi: combine duplicate SPI_CTL read/write logicMike Frysinger1-68/+0
While combining things, also switch to the proper SPI bit define names. This lets us punt the rarely used SPI defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: redo GPIO CS handlingBarry Song1-1/+2
The common SPI layers take care of detecting CS conflicts and preventing two devices from claiming the same CS. This causes problems for the GPIO CS support we currently have as we are using CS0 to mean "GPIO CS". But if we have multiple devices using a GPIO CS, the common SPI layers see multiple devices using the virtual "CS0" and reject any such attempts. To make both work, we introduce an offset define. This represents the max number of hardware CS values that the SPI peripheral supports. If the CS is below this limit, we know we can use the hardware CS. If it's above, we treat it as a GPIO CS. This keeps the CS unique as seen by the common code and prevents conflicts. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18Blackfin: SPI: expand SPI bitmasksMike Frysinger1-4/+7
Expand the BIT_CTL defines to use the naming convention of the hardware, and expand the masks to cover all documented bits. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: drop custom cs_change_per_word supportMike Frysinger1-1/+0
As David points out, the cs_change_per_word option isn't standard, nor is anyone actually using it. So punt all of the dead code considering it makes up ~10% of the code size. Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-07Fix IRQ flag handling namingDavid Howells1-12/+0
Fix the IRQ flag handling naming. In linux/irqflags.h under one configuration, it maps: local_irq_enable() -> raw_local_irq_enable() local_irq_disable() -> raw_local_irq_disable() local_irq_save() -> raw_local_irq_save() ... and under the other configuration, it maps: raw_local_irq_enable() -> local_irq_enable() raw_local_irq_disable() -> local_irq_disable() raw_local_irq_save() -> local_irq_save() ... This is quite confusing. There should be one set of names expected of the arch, and this should be wrapped to give another set of names that are expected by users of this facility. Change this to have the arch provide: flags = arch_local_save_flags() flags = arch_local_irq_save() arch_local_irq_restore(flags) arch_local_irq_disable() arch_local_irq_enable() arch_irqs_disabled_flags(flags) arch_irqs_disabled() arch_safe_halt() Then linux/irqflags.h wraps these to provide: raw_local_save_flags(flags) raw_local_irq_save(flags) raw_local_irq_restore(flags) raw_local_irq_disable() raw_local_irq_enable() raw_irqs_disabled_flags(flags) raw_irqs_disabled() raw_safe_halt() with type checking on the flags 'arguments', and then wraps those to provide: local_save_flags(flags) local_irq_save(flags) local_irq_restore(flags) local_irq_disable() local_irq_enable() irqs_disabled_flags(flags) irqs_disabled() safe_halt() with tracing included if enabled. The arch functions can now all be inline functions rather than some of them having to be macros. Signed-off-by: David Howells <dhowells@redhat.com> [X86, FRV, MN10300] Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> [Tile] Signed-off-by: Michal Simek <monstr@monstr.eu> [Microblaze] Tested-by: Catalin Marinas <catalin.marinas@arm.com> [ARM] Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> [AVR] Acked-by: Tony Luck <tony.luck@intel.com> [IA-64] Acked-by: Hirokazu Takata <takata@linux-m32r.org> [M32R] Acked-by: Greg Ungerer <gerg@uclinux.org> [M68K/M68KNOMMU] Acked-by: Ralf Baechle <ralf@linux-mips.org> [MIPS] Acked-by: Kyle McMartin <kyle@mcmartin.ca> [PA-RISC] Acked-by: Paul Mackerras <paulus@samba.org> [PowerPC] Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [S390] Acked-by: Chen Liqin <liqin.chen@sunplusct.com> [Score] Acked-by: Matt Fleming <matt@console-pimps.org> [SH] Acked-by: David S. Miller <davem@davemloft.net> [Sparc] Acked-by: Chris Zankel <chris@zankel.net> [Xtensa] Reviewed-by: Richard Henderson <rth@twiddle.net> [Alpha] Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> [H8300] Cc: starvik@axis.com [CRIS] Cc: jesper.nilsson@axis.com [CRIS] Cc: linux-cris-kernel@axis.com
2010-10-07Blackfin: Rename IRQ flags handling functionsDavid Howells4-147/+157
Rename h/w IRQ flags handling functions to be in line with what is expected for the irq renaming patch. This renames local_*_hw() to hard_local_*() using the following perl command: perl -pi -e 's/local_irq_(restore|enable|disable)_hw/hard_local_irq_\1/ or s/local_irq_save_hw([_a-z]*)[(]flags[)]/flags = hard_local_irq_save\1()/' `find arch/blackfin/ -name "*.[ch]"` and then fixing up asm/irqflags.h manually. Additionally, arch/hard_local_save_flags() and arch/hard_local_irq_save() both return the flags rather than passing it through the argument list. Signed-off-by: David Howells <dhowells@redhat.com>
2010-10-07Blackfin: Add missing dep to asm/irqflags.hDavid Howells1-1/+8
Add a missing dependency (mach/blackfin.h) to asm/irqflags.h so that bfin_read_IMASK() can be used by inline functions. Signed-off-by: David Howells <dhowells@redhat.com>
2010-08-27Blackfin: punt duplicate SPORT MMR definesMike Frysinger1-6/+0
The common bfin_sport.h header now has unified definitions of these, so stop polluting the global namespace. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-23Blackfin: wire up new fanotify/prlimit64 syscallsMike Frysinger1-1/+4
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-23Blackfin: fix hweight breakageMike Frysinger1-7/+10
The recent commit to add constant optimization to hweight implicitly broke the Blackfin arch. Seems we were missed when all the other arches were fixed with renames. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-14archs: replace unifdef-y with header-ySam Ravnborg1-2/+2
unifdef-y and header-y have same semantic, so drop unifdef-y Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
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