drm-misc - Kernel DRM miscellaneous fixes and cross-tree changes

Age	Commit message (Expand)	Author	Files	Lines
2011-09-17	ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeed	Will Deacon	1	-0/+20
2011-07-07	ARM: mm: cache-v7: Use the new processor struct macros	Dave Martin	1	-13/+2
2011-05-26	ARM: 6941/1: cache: ensure MVA is cacheline aligned in flush_kern_dcache_area	Will Deacon	1	-0/+2
2011-03-31	Fix common misspellings	Lucas De Marchi	1	-1/+1
2010-12-12	ARM: 6528/1: Use CTR for the I-cache line size on ARMv7	Catalin Marinas	1	-10/+17
2010-10-04	ARM: 6405/1: Handle __flush_icache_all for CONFIG_SMP_ON_UP	Tony Lindgren	1	-0/+16
2010-10-04	ARM: Allow SMP kernels to boot on UP systems	Russell King	1	-10/+4
2010-05-20	ARM: 6139/1: ARMv7: Use the Inner Shareable I-cache on MP	Santosh Shilimkar	1	-0/+4
2010-05-08	ARM: 6112/1: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMP	Catalin Marinas	1	-0/+4
2010-02-15	ARM: dma-mapping: fix for speculative prefetching	Russell King	1	-4/+6
2010-02-15	ARM: dma-mapping: remove dmac_clean_range and dmac_inv_range	Russell King	1	-4/+2
2010-02-15	ARM: dma-mapping: provide per-cpu type map/unmap functions	Russell King	1	-0/+26
2009-12-14	ARM: add size argument to __cpuc_flush_dcache_page	Russell King	1	-6/+7
2009-10-07	ARM: 5746/1: Handle possible translation errors in ARMv6/v7 coherent_user_range	Catalin Marinas	1	-2/+17
2009-07-24	Thumb-2: Implement the unified arch/arm/mm support	Catalin Marinas	1	-5/+11
2008-11-06	ARMv7: Add extra barriers for flush_cache_all compressed/head.S	Catalin Marinas	1	-0/+2
2008-09-01	[ARM] 5227/1: Add the ENDPROC declarations to the .S files	Catalin Marinas	1	-0/+10
2007-05-08	[ARM] armv7: add support for ARMv7 cores.	Catalin Marinas	1	-0/+253