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AgeCommit message (Expand)AuthorFilesLines
2019-02-07drm/i915: Prevent a race during I915_GEM_MMAP ioctl with WC setJoonas Lahtinen1-1/+11
2019-02-06drm/i915: Don't send hotplug in intel_dp_check_mst_status()Lyude Paul1-4/+2
2019-02-06drm/i915: Don't send MST hotplugs during resumeLyude Paul1-2/+5
2019-02-06drm/i915: Block fbdev HPD processing during suspendLyude Paul2-1/+42
2019-02-06drm/i915: Just use icl+ definition for PLANE_WM blocks fieldVille Syrjälä2-9/+3
2019-02-06drm/i915: Bump skl+ wm blocks to 11 bitsVille Syrjälä1-1/+1
2019-02-06drm/i915/pmu: Fix enable count array size and bounds checkingTvrtko Ursulin3-11/+22
2019-02-05drm/i915: W/A for underruns with WM1+ disabled on iclVille Syrjälä2-0/+7
2019-02-05drm/i915: Setup PIPE_CHICKEN for fastsets tooVille Syrjälä1-0/+3
2019-02-05drm/i915: Extract icl_set_pipe_chicken()Ville Syrjälä1-11/+20
2019-02-05drm/i915: Fix wm latency==0 disable on skl+Ville Syrjälä1-3/+9
2019-02-05drm/i915: Push clear_intel_crtc_state() onto the heapChris Wilson1-22/+18
2019-02-05drm/i915: Include register polling in reg_rw tracesVille Syrjälä3-2/+19
2019-02-05drm/i915: do not return invalid pointers as a *dentryGreg Kroah-Hartman1-0/+3
2019-02-05drm/i915: Rename HAS_GMCHRodrigo Vivi13-45/+45
2019-02-05drm/i915: Pull i915_gem_active into the i915_active familyChris Wilson21-508/+480
2019-02-05drm/i915: Allocate active tracking nodes from a slabcacheChris Wilson3-3/+35
2019-02-05drm/i915: Release the active tracker tree upon idlingChris Wilson2-10/+27
2019-02-05drm/i915: Generalise GPU activity trackingChris Wilson9-154/+518
2019-02-05drm/i915/selftests: Exercise some AB...BA preemption chainsChris Wilson1-0/+103
2019-02-05drm/i915/selftests: Context SSEU reconfiguration testsTvrtko Ursulin2-10/+488
2019-02-05drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only)Tvrtko Ursulin4-3/+411
2019-02-05drm/i915: Add timeline barrier supportTvrtko Ursulin4-0/+61
2019-02-05drm/i915/perf: lock powergating configuration to default when activeLionel Landwerlin3-15/+46
2019-02-05drm/i915: Record the sseu configuration per-context & engineLionel Landwerlin4-15/+47
2019-02-04drm/i915: Trim NEWCLIENT boostingChris Wilson1-1/+1
2019-02-04drm/i915: Allow normal clients to always preempt idle priority clientsChris Wilson1-1/+14
2019-02-02drm/i915: Update DRIVER_DATE to 20190202drm-intel-next-2019-02-02Rodrigo Vivi1-2/+2
2019-01-31drm/i915/cfl: Adding another PCI Device ID.Rodrigo Vivi2-0/+5
2019-02-01Merge tag 'gvt-next-2019-02-01' of https://github.com/intel/gvt-linux into dr...Rodrigo Vivi8-6/+233
2019-02-01drm/i915: Enable fastboot by default on VLV and CHVHans de Goede1-1/+9
2019-02-01drm/i915/icl: restore WaEnableFloatBlendOptimizationTalha Nassar2-0/+9
2019-02-01drm/i915: Save some lines of source code in workaroundsTvrtko Ursulin1-26/+6
2019-02-01drm/i915: Move workaround infrastructure code upTvrtko Ursulin1-37/+37
2019-01-31drm/i915/icl: Work around broken VBTs for port F detectionImre Deak2-1/+5
2019-01-31drm/i915/icl: Add TypeC ports only if VBT is presentImre Deak1-0/+7
2019-01-31drm/i915: Pick the first unused PLL once againVille Syrjälä1-1/+2
2019-01-31drm/i915: Don't use the second dbuf slice on iclVille Syrjälä1-1/+6
2019-01-31drm/i915/gvt: add VFIO EDID regionHang Yuan4-0/+167
2019-01-31drm/i915/gvt: add hotplug emulationHang Yuan3-0/+34
2019-01-31drm/i915/gvt: add functions to get default resolutionHang Yuan2-6/+32
2019-01-30drm/i915: Apply LUT validation checks to platforms more accurately (v3)Matt Roper3-32/+40
2019-01-30drm/i915: Force background color to black for gen9+ (v2)Matt Roper2-0/+25
2019-01-29drm/i915: Update DRIVER_DATE to 20190129drm-intel-next-2019-01-29Rodrigo Vivi1-2/+2
2019-01-30drm/i915: Use IS_GEN9_LP() for the linetime w/a checkVille Syrjälä1-3/+2
2019-01-30drm/i915: Drop the pointless linetime==0 checkVille Syrjälä1-4/+0
2019-01-30drm/i915: Drop the definite article in front of SAGVVille Syrjälä1-9/+9
2019-01-30drm/i915: Pass dev_priv to skl_needs_memory_bw_wa()Ville Syrjälä1-16/+5
2019-01-30drm/i915: Account for minimum ddb allocation restrictionsVille Syrjälä2-9/+45
2019-01-30drm/i915: Fix > vs >= mismatch in watermark/ddb calculationsVille Syrjälä1-5/+5
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