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Diffstat (limited to 'arch/xtensa/kernel/traps.c')
-rw-r--r--arch/xtensa/kernel/traps.c69
1 files changed, 52 insertions, 17 deletions
diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c
index 42d441f7898b..d02fc304b31c 100644
--- a/arch/xtensa/kernel/traps.c
+++ b/arch/xtensa/kernel/traps.c
@@ -39,11 +39,7 @@
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/traps.h>
-
-#ifdef CONFIG_KGDB
-extern int gdb_enter;
-extern int return_from_debug_flag;
-#endif
+#include <asm/hw_breakpoint.h>
/*
* Machine specific interrupt handlers
@@ -162,6 +158,8 @@ COPROCESSOR(7),
DEFINE_PER_CPU(unsigned long, exc_table[EXC_TABLE_SIZE/4]);
+DEFINE_PER_CPU(struct debug_table, debug_table);
+
void die(const char*, struct pt_regs*, long);
static inline void
@@ -205,6 +203,32 @@ extern void do_IRQ(int, struct pt_regs *);
#if XTENSA_FAKE_NMI
+#define IS_POW2(v) (((v) & ((v) - 1)) == 0)
+
+#if !(PROFILING_INTLEVEL == XCHAL_EXCM_LEVEL && \
+ IS_POW2(XTENSA_INTLEVEL_MASK(PROFILING_INTLEVEL)))
+#warning "Fake NMI is requested for PMM, but there are other IRQs at or above its level."
+#warning "Fake NMI will be used, but there will be a bugcheck if one of those IRQs fire."
+
+static inline void check_valid_nmi(void)
+{
+ unsigned intread = get_sr(interrupt);
+ unsigned intenable = get_sr(intenable);
+
+ BUG_ON(intread & intenable &
+ ~(XTENSA_INTLEVEL_ANDBELOW_MASK(PROFILING_INTLEVEL) ^
+ XTENSA_INTLEVEL_MASK(PROFILING_INTLEVEL) ^
+ BIT(XCHAL_PROFILING_INTERRUPT)));
+}
+
+#else
+
+static inline void check_valid_nmi(void)
+{
+}
+
+#endif
+
irqreturn_t xtensa_pmu_irq_handler(int irq, void *dev_id);
DEFINE_PER_CPU(unsigned long, nmi_count);
@@ -219,6 +243,7 @@ void do_nmi(struct pt_regs *regs)
old_regs = set_irq_regs(regs);
nmi_enter();
++*this_cpu_ptr(&nmi_count);
+ check_valid_nmi();
xtensa_pmu_irq_handler(0, NULL);
nmi_exit();
set_irq_regs(old_regs);
@@ -314,23 +339,22 @@ do_unaligned_user (struct pt_regs *regs)
}
#endif
+/* Handle debug events.
+ * When CONFIG_HAVE_HW_BREAKPOINT is on this handler is called with
+ * preemption disabled to avoid rescheduling and keep mapping of hardware
+ * breakpoint structures to debug registers intact, so that
+ * DEBUGCAUSE.DBNUM could be used in case of data breakpoint hit.
+ */
void
do_debug(struct pt_regs *regs)
{
-#ifdef CONFIG_KGDB
- /* If remote debugging is configured AND enabled, we give control to
- * kgdb. Otherwise, we fall through, perhaps giving control to the
- * native debugger.
- */
-
- if (gdb_enter) {
- extern void gdb_handle_exception(struct pt_regs *);
- gdb_handle_exception(regs);
- return_from_debug_flag = 1;
+#ifdef CONFIG_HAVE_HW_BREAKPOINT
+ int ret = check_hw_breakpoint(regs);
+
+ preempt_enable();
+ if (ret == 0)
return;
- }
#endif
-
__die_if_kernel("Breakpoint in kernel", regs, SIGKILL);
/* If in user mode, send SIGTRAP signal to current process */
@@ -364,6 +388,15 @@ static void trap_init_excsave(void)
__asm__ __volatile__("wsr %0, excsave1\n" : : "a" (excsave1));
}
+static void trap_init_debug(void)
+{
+ unsigned long debugsave = (unsigned long)this_cpu_ptr(&debug_table);
+
+ this_cpu_ptr(&debug_table)->debug_exception = debug_exception;
+ __asm__ __volatile__("wsr %0, excsave" __stringify(XCHAL_DEBUGLEVEL)
+ :: "a"(debugsave));
+}
+
/*
* Initialize dispatch tables.
*
@@ -407,12 +440,14 @@ void __init trap_init(void)
/* Initialize EXCSAVE_1 to hold the address of the exception table. */
trap_init_excsave();
+ trap_init_debug();
}
#ifdef CONFIG_SMP
void secondary_trap_init(void)
{
trap_init_excsave();
+ trap_init_debug();
}
#endif