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Diffstat (limited to 'arch/arm64/boot/dts/qcom/sdm845.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sdm845.dtsi129
1 files changed, 100 insertions, 29 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 479859bd8ab3..90424442bb4a 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -13,6 +13,7 @@
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,videocc-sdm845.h>
#include <dt-bindings/dma/qcom-gpi.h>
+#include <dt-bindings/firmware/qcom,scm.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interconnect/qcom,sdm845.h>
@@ -92,9 +93,10 @@
device_type = "cpu";
compatible = "qcom,kryo385";
reg = <0x0 0x0>;
+ clocks = <&cpufreq_hw 0>;
enable-method = "psci";
capacity-dmips-mhz = <611>;
- dynamic-power-coefficient = <290>;
+ dynamic-power-coefficient = <154>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
@@ -118,9 +120,10 @@
device_type = "cpu";
compatible = "qcom,kryo385";
reg = <0x0 0x100>;
+ clocks = <&cpufreq_hw 0>;
enable-method = "psci";
capacity-dmips-mhz = <611>;
- dynamic-power-coefficient = <290>;
+ dynamic-power-coefficient = <154>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
@@ -140,9 +143,10 @@
device_type = "cpu";
compatible = "qcom,kryo385";
reg = <0x0 0x200>;
+ clocks = <&cpufreq_hw 0>;
enable-method = "psci";
capacity-dmips-mhz = <611>;
- dynamic-power-coefficient = <290>;
+ dynamic-power-coefficient = <154>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
@@ -162,9 +166,10 @@
device_type = "cpu";
compatible = "qcom,kryo385";
reg = <0x0 0x300>;
+ clocks = <&cpufreq_hw 0>;
enable-method = "psci";
capacity-dmips-mhz = <611>;
- dynamic-power-coefficient = <290>;
+ dynamic-power-coefficient = <154>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
@@ -184,6 +189,7 @@
device_type = "cpu";
compatible = "qcom,kryo385";
reg = <0x0 0x400>;
+ clocks = <&cpufreq_hw 1>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <442>;
@@ -206,6 +212,7 @@
device_type = "cpu";
compatible = "qcom,kryo385";
reg = <0x0 0x500>;
+ clocks = <&cpufreq_hw 1>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <442>;
@@ -228,6 +235,7 @@
device_type = "cpu";
compatible = "qcom,kryo385";
reg = <0x0 0x600>;
+ clocks = <&cpufreq_hw 1>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <442>;
@@ -250,6 +258,7 @@
device_type = "cpu";
compatible = "qcom,kryo385";
reg = <0x0 0x700>;
+ clocks = <&cpufreq_hw 1>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <442>;
@@ -331,12 +340,10 @@
domain-idle-states {
CLUSTER_SLEEP_0: cluster-sleep-0 {
compatible = "domain-idle-state";
- idle-state-name = "cluster-power-collapse";
arm,psci-suspend-param = <0x4100c244>;
entry-latency-us = <3263>;
exit-latency-us = <6562>;
min-residency-us = <9987>;
- local-timer-stop;
};
};
};
@@ -870,6 +877,14 @@
size = <0 0x4000>;
no-map;
};
+
+ fastrpc_mem: fastrpc {
+ compatible = "shared-dma-pool";
+ alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
+ alignment = <0x0 0x400000>;
+ size = <0x0 0x1000000>;
+ reusable;
+ };
};
adsp_pas: remoteproc-adsp {
@@ -2192,8 +2207,11 @@
llcc: system-cache-controller@1100000 {
compatible = "qcom,sdm845-llcc";
- reg = <0 0x01100000 0 0x31000>, <0 0x01300000 0 0x50000>;
- reg-names = "llcc_base", "llcc_broadcast_base";
+ reg = <0 0x01100000 0 0x45000>, <0 0x01180000 0 0x50000>,
+ <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>,
+ <0 0x01300000 0 0x50000>;
+ reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
+ "llcc3_base", "llcc_broadcast_base";
interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
};
@@ -2241,7 +2259,7 @@
};
pmu@1436400 {
- compatible = "qcom,sdm845-bwmon", "qcom,msm8998-bwmon";
+ compatible = "qcom,sdm845-cpu-bwmon", "qcom,sdm845-bwmon";
reg = <0 0x01436400 0 0x600>;
interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>;
@@ -2282,8 +2300,9 @@
reg = <0 0x01c00000 0 0x2000>,
<0 0x60000000 0 0xf1d>,
<0 0x60000f20 0 0xa8>,
- <0 0x60100000 0 0x100000>;
- reg-names = "parf", "dbi", "elbi", "config";
+ <0 0x60100000 0 0x100000>,
+ <0 0x01c07000 0 0x1000>;
+ reg-names = "parf", "dbi", "elbi", "config", "mhi";
device_type = "pci";
linux,pci-domain = <0>;
bus-range = <0x00 0xff>;
@@ -2292,8 +2311,8 @@
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>,
- <0x02000000 0x0 0x60300000 0 0x60300000 0x0 0xd00000>;
+ ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
+ <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0xd00000>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
@@ -2319,7 +2338,6 @@
"slave_q2a",
"tbu";
- iommus = <&apps_smmu 0x1c10 0xf>;
iommu-map = <0x0 &apps_smmu 0x1c10 0x1>,
<0x100 &apps_smmu 0x1c11 0x1>,
<0x200 &apps_smmu 0x1c12 0x1>,
@@ -2387,8 +2405,9 @@
reg = <0 0x01c08000 0 0x2000>,
<0 0x40000000 0 0xf1d>,
<0 0x40000f20 0 0xa8>,
- <0 0x40100000 0 0x100000>;
- reg-names = "parf", "dbi", "elbi", "config";
+ <0 0x40100000 0 0x100000>,
+ <0 0x01c0c000 0 0x1000>;
+ reg-names = "parf", "dbi", "elbi", "config", "mhi";
device_type = "pci";
linux,pci-domain = <1>;
bus-range = <0x00 0xff>;
@@ -2397,7 +2416,7 @@
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>,
+ ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
interrupts = <GIC_SPI 307 IRQ_TYPE_EDGE_RISING>;
@@ -2429,7 +2448,6 @@
assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
assigned-clock-rates = <19200000>;
- iommus = <&apps_smmu 0x1c00 0xf>;
iommu-map = <0x0 &apps_smmu 0x1c00 0x1>,
<0x100 &apps_smmu 0x1c01 0x1>,
<0x200 &apps_smmu 0x1c02 0x1>,
@@ -2617,7 +2635,7 @@
};
cryptobam: dma-controller@1dc4000 {
- compatible = "qcom,bam-v1.7.0";
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
reg = <0 0x01dc4000 0 0x24000>;
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rpmhcc RPMH_CE_CLK>;
@@ -2758,12 +2776,17 @@
function = "qspi_cs";
};
- qspi_data01: qspi-data01-state {
- pins = "gpio91", "gpio92";
+ qspi_data0: qspi-data0-state {
+ pins = "gpio91";
function = "qspi_data";
};
- qspi_data12: qspi-data12-state {
+ qspi_data1: qspi-data1-state {
+ pins = "gpio92";
+ function = "qspi_data";
+ };
+
+ qspi_data23: qspi-data23-state {
pins = "gpio93", "gpio94";
function = "qspi_data";
};
@@ -3163,7 +3186,6 @@
function = "gpio";
drive-strength = <2>;
bias-pull-down;
- input-enable;
};
quat_mi2s_active: quat-mi2s-active-state {
@@ -3179,7 +3201,6 @@
function = "gpio";
drive-strength = <2>;
bias-pull-down;
- input-enable;
};
quat_mi2s_sd0_active: quat-mi2s-sd0-active-state {
@@ -3194,7 +3215,6 @@
function = "gpio";
drive-strength = <2>;
bias-pull-down;
- input-enable;
};
quat_mi2s_sd1_active: quat-mi2s-sd1-active-state {
@@ -3209,7 +3229,6 @@
function = "gpio";
drive-strength = <2>;
bias-pull-down;
- input-enable;
};
quat_mi2s_sd2_active: quat-mi2s-sd2-active-state {
@@ -3224,7 +3243,6 @@
function = "gpio";
drive-strength = <2>;
bias-pull-down;
- input-enable;
};
quat_mi2s_sd3_active: quat-mi2s-sd3-active-state {
@@ -3314,6 +3332,59 @@
"gcc_gpu_gpll0_div_clk_src";
};
+ slpi_pas: remoteproc@5c00000 {
+ compatible = "qcom,sdm845-slpi-pas";
+ reg = <0 0x5c00000 0 0x4000>;
+
+ interrupts-extended = <&intc GIC_SPI 494 IRQ_TYPE_EDGE_RISING>,
+ <&slpi_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&slpi_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&slpi_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ qcom,qmp = <&aoss_qmp>;
+
+ power-domains = <&rpmhpd SDM845_CX>,
+ <&rpmhpd SDM845_MX>;
+ power-domain-names = "lcx", "lmx";
+
+ memory-region = <&slpi_mem>;
+
+ qcom,smem-states = <&slpi_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>;
+ label = "dsps";
+ qcom,remote-pid = <3>;
+ mboxes = <&apss_shared 24>;
+
+ fastrpc {
+ compatible = "qcom,fastrpc";
+ qcom,glink-channels = "fastrpcglink-apps-dsp";
+ label = "sdsp";
+ qcom,non-secure-domain;
+ qcom,vmids = <QCOM_SCM_VMID_HLOS QCOM_SCM_VMID_MSS_MSA
+ QCOM_SCM_VMID_SSC_Q6 QCOM_SCM_VMID_ADSP_Q6>;
+ memory-region = <&fastrpc_mem>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compute-cb@0 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <0>;
+ };
+ };
+ };
+ };
+
stm@6002000 {
compatible = "arm,coresight-stm", "arm,primecell";
reg = <0 0x06002000 0 0x1000>,
@@ -4924,7 +4995,6 @@
#size-cells = <0>;
interrupt-controller;
#interrupt-cells = <4>;
- cell-index = <0>;
};
sram@146bf000 {
@@ -5222,7 +5292,7 @@
};
cpufreq_hw: cpufreq@17d43000 {
- compatible = "qcom,cpufreq-hw";
+ compatible = "qcom,sdm845-cpufreq-hw", "qcom,cpufreq-hw";
reg = <0 0x17d43000 0 0x1400>, <0 0x17d45800 0 0x1400>;
reg-names = "freq-domain0", "freq-domain1";
@@ -5232,6 +5302,7 @@
clock-names = "xo", "alternate";
#freq-domain-cells = <1>;
+ #clock-cells = <1>;
};
wifi: wifi@18800000 {
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-14 02:47:10 +0000