diff options
Diffstat (limited to 'arch/arm/mach-at91')
61 files changed, 745 insertions, 619 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 19505c0a3f01..c8050b14e615 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -29,12 +29,16 @@ comment "Atmel AT91 Processor" config SOC_AT91SAM9 bool select CPU_ARM926T + select MULTI_IRQ_HANDLER + select SPARSE_IRQ select AT91_SAM9_TIME select AT91_SAM9_SMC config SOC_AT91RM9200 bool "AT91RM9200" select CPU_ARM920T + select MULTI_IRQ_HANDLER + select SPARSE_IRQ select GENERIC_CLOCKEVENTS select HAVE_AT91_DBGU0 @@ -140,6 +144,8 @@ config ARCH_AT91SAM9G45 config ARCH_AT91X40 bool "AT91x40" depends on !MMU + select MULTI_IRQ_HANDLER + select SPARSE_IRQ select ARCH_USES_GETTIMEOFFSET endchoice diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 26917687fc30..6f50c6722276 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c @@ -17,6 +17,7 @@ #include <asm/mach/map.h> #include <asm/system_misc.h> #include <mach/at91rm9200.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/at91_st.h> #include <mach/cpu.h> diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index e6b7d0533dd7..01fb7325fecc 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c @@ -41,8 +41,8 @@ static struct resource usbh_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_UHP, - .end = AT91RM9200_ID_UHP, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_UHP, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_UHP, .flags = IORESOURCE_IRQ, }, }; @@ -94,8 +94,8 @@ static struct resource udc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_UDP, - .end = AT91RM9200_ID_UDP, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_UDP, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_UDP, .flags = IORESOURCE_IRQ, }, }; @@ -145,8 +145,8 @@ static struct resource eth_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_EMAC, - .end = AT91RM9200_ID_EMAC, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC, .flags = IORESOURCE_IRQ, }, }; @@ -305,8 +305,8 @@ static struct resource mmc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_MCI, - .end = AT91RM9200_ID_MCI, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_MCI, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_MCI, .flags = IORESOURCE_IRQ, }, }; @@ -488,8 +488,8 @@ static struct resource twi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_TWI, - .end = AT91RM9200_ID_TWI, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_TWI, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_TWI, .flags = IORESOURCE_IRQ, }, }; @@ -532,8 +532,8 @@ static struct resource spi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_SPI, - .end = AT91RM9200_ID_SPI, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_SPI, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_SPI, .flags = IORESOURCE_IRQ, }, }; @@ -598,18 +598,18 @@ static struct resource tcb0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_TC0, - .end = AT91RM9200_ID_TC0, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC0, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC0, .flags = IORESOURCE_IRQ, }, [2] = { - .start = AT91RM9200_ID_TC1, - .end = AT91RM9200_ID_TC1, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC1, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC1, .flags = IORESOURCE_IRQ, }, [3] = { - .start = AT91RM9200_ID_TC2, - .end = AT91RM9200_ID_TC2, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC2, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC2, .flags = IORESOURCE_IRQ, }, }; @@ -628,18 +628,18 @@ static struct resource tcb1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_TC3, - .end = AT91RM9200_ID_TC3, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC3, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC3, .flags = IORESOURCE_IRQ, }, [2] = { - .start = AT91RM9200_ID_TC4, - .end = AT91RM9200_ID_TC4, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC4, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC4, .flags = IORESOURCE_IRQ, }, [3] = { - .start = AT91RM9200_ID_TC5, - .end = AT91RM9200_ID_TC5, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC5, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC5, .flags = IORESOURCE_IRQ, }, }; @@ -673,8 +673,8 @@ static struct resource rtc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, + .start = NR_IRQS_LEGACY + AT91_ID_SYS, + .end = NR_IRQS_LEGACY + AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; @@ -729,8 +729,8 @@ static struct resource ssc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_SSC0, - .end = AT91RM9200_ID_SSC0, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0, .flags = IORESOURCE_IRQ, }, }; @@ -771,8 +771,8 @@ static struct resource ssc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_SSC1, - .end = AT91RM9200_ID_SSC1, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1, .flags = IORESOURCE_IRQ, }, }; @@ -813,8 +813,8 @@ static struct resource ssc2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_SSC2, - .end = AT91RM9200_ID_SSC2, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2, .flags = IORESOURCE_IRQ, }, }; @@ -897,8 +897,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, + .start = NR_IRQS_LEGACY + AT91_ID_SYS, + .end = NR_IRQS_LEGACY + AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; @@ -935,8 +935,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_US0, - .end = AT91RM9200_ID_US0, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_US0, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_US0, .flags = IORESOURCE_IRQ, }, }; @@ -984,8 +984,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_US1, - .end = AT91RM9200_ID_US1, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_US1, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_US1, .flags = IORESOURCE_IRQ, }, }; @@ -1035,8 +1035,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_US2, - .end = AT91RM9200_ID_US2, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_US2, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_US2, .flags = IORESOURCE_IRQ, }, }; @@ -1078,8 +1078,8 @@ static struct resource uart3_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_US3, - .end = AT91RM9200_ID_US3, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_US3, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_US3, .flags = IORESOURCE_IRQ, }, }; diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index 2b1e438ed878..30c7f26a4668 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -20,6 +20,7 @@ #include <mach/cpu.h> #include <mach/at91_dbgu.h> #include <mach/at91sam9260.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h> diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index 0ded951f785a..7b9c2ba396ed 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c @@ -45,8 +45,8 @@ static struct resource usbh_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_UHP, - .end = AT91SAM9260_ID_UHP, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP, .flags = IORESOURCE_IRQ, }, }; @@ -98,8 +98,8 @@ static struct resource udc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_UDP, - .end = AT91SAM9260_ID_UDP, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP, .flags = IORESOURCE_IRQ, }, }; @@ -149,8 +149,8 @@ static struct resource eth_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_EMAC, - .end = AT91SAM9260_ID_EMAC, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC, .flags = IORESOURCE_IRQ, }, }; @@ -223,8 +223,8 @@ static struct resource mmc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_MCI, - .end = AT91SAM9260_ID_MCI, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, .flags = IORESOURCE_IRQ, }, }; @@ -305,8 +305,8 @@ static struct resource mmc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_MCI, - .end = AT91SAM9260_ID_MCI, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, .flags = IORESOURCE_IRQ, }, }; @@ -496,8 +496,8 @@ static struct resource twi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_TWI, - .end = AT91SAM9260_ID_TWI, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI, .flags = IORESOURCE_IRQ, }, }; @@ -540,8 +540,8 @@ static struct resource spi0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_SPI0, - .end = AT91SAM9260_ID_SPI0, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0, .flags = IORESOURCE_IRQ, }, }; @@ -566,8 +566,8 @@ static struct resource spi1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_SPI1, - .end = AT91SAM9260_ID_SPI1, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1, .flags = IORESOURCE_IRQ, }, }; @@ -652,18 +652,18 @@ static struct resource tcb0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_TC0, - .end = AT91SAM9260_ID_TC0, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0, .flags = IORESOURCE_IRQ, }, [2] = { - .start = AT91SAM9260_ID_TC1, - .end = AT91SAM9260_ID_TC1, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1, .flags = IORESOURCE_IRQ, }, [3] = { - .start = AT91SAM9260_ID_TC2, - .end = AT91SAM9260_ID_TC2, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2, .flags = IORESOURCE_IRQ, }, }; @@ -682,18 +682,18 @@ static struct resource tcb1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_TC3, - .end = AT91SAM9260_ID_TC3, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3, .flags = IORESOURCE_IRQ, }, [2] = { - .start = AT91SAM9260_ID_TC4, - .end = AT91SAM9260_ID_TC4, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4, .flags = IORESOURCE_IRQ, }, [3] = { - .start = AT91SAM9260_ID_TC5, - .end = AT91SAM9260_ID_TC5, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5, .flags = IORESOURCE_IRQ, }, }; @@ -807,8 +807,8 @@ static struct resource ssc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_SSC, - .end = AT91SAM9260_ID_SSC, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC, .flags = IORESOURCE_IRQ, }, }; @@ -882,8 +882,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, + .start = NR_IRQS_LEGACY + AT91_ID_SYS, + .end = NR_IRQS_LEGACY + AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; @@ -920,8 +920,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_US0, - .end = AT91SAM9260_ID_US0, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US0, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US0, .flags = IORESOURCE_IRQ, }, }; @@ -971,8 +971,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_US1, - .end = AT91SAM9260_ID_US1, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US1, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US1, .flags = IORESOURCE_IRQ, }, }; @@ -1014,8 +1014,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_US2, - .end = AT91SAM9260_ID_US2, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US2, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US2, .flags = IORESOURCE_IRQ, }, }; @@ -1057,8 +1057,8 @@ static struct resource uart3_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_US3, - .end = AT91SAM9260_ID_US3, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US3, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US3, .flags = IORESOURCE_IRQ, }, }; @@ -1100,8 +1100,8 @@ static struct resource uart4_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_US4, - .end = AT91SAM9260_ID_US4, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US4, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US4, .flags = IORESOURCE_IRQ, }, }; @@ -1138,8 +1138,8 @@ static struct resource uart5_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_US5, - .end = AT91SAM9260_ID_US5, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US5, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US5, .flags = IORESOURCE_IRQ, }, }; @@ -1357,8 +1357,8 @@ static struct resource adc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_ADC, - .end = AT91SAM9260_ID_ADC, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC, .flags = IORESOURCE_IRQ, }, }; diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index c77d503d09d1..f40762c5fede 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -19,6 +19,7 @@ #include <asm/system_misc.h> #include <mach/cpu.h> #include <mach/at91sam9261.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h> diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 9295e90b08ff..8df5c1bdff92 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c @@ -45,8 +45,8 @@ static struct resource usbh_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_UHP, - .end = AT91SAM9261_ID_UHP, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP, .flags = IORESOURCE_IRQ, }, }; @@ -98,8 +98,8 @@ static struct resource udc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_UDP, - .end = AT91SAM9261_ID_UDP, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP, .flags = IORESOURCE_IRQ, }, }; @@ -148,8 +148,8 @@ static struct resource mmc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_MCI, - .end = AT91SAM9261_ID_MCI, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI, .flags = IORESOURCE_IRQ, }, }; @@ -310,8 +310,8 @@ static struct resource twi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_TWI, - .end = AT91SAM9261_ID_TWI, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI, .flags = IORESOURCE_IRQ, }, }; @@ -354,8 +354,8 @@ static struct resource spi0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_SPI0, - .end = AT91SAM9261_ID_SPI0, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0, .flags = IORESOURCE_IRQ, }, }; @@ -380,8 +380,8 @@ static struct resource spi1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_SPI1, - .end = AT91SAM9261_ID_SPI1, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1, .flags = IORESOURCE_IRQ, }, }; @@ -468,8 +468,8 @@ static struct resource lcdc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_LCDC, - .end = AT91SAM9261_ID_LCDC, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC, .flags = IORESOURCE_IRQ, }, #if defined(CONFIG_FB_INTSRAM) @@ -566,18 +566,18 @@ static struct resource tcb_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_TC0, - .end = AT91SAM9261_ID_TC0, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0, .flags = IORESOURCE_IRQ, }, [2] = { - .start = AT91SAM9261_ID_TC1, - .end = AT91SAM9261_ID_TC1, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1, .flags = IORESOURCE_IRQ, }, [3] = { - .start = AT91SAM9261_ID_TC2, - .end = AT91SAM9261_ID_TC2, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2, .flags = IORESOURCE_IRQ, }, }; @@ -689,8 +689,8 @@ static struct resource ssc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_SSC0, - .end = AT91SAM9261_ID_SSC0, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0, .flags = IORESOURCE_IRQ, }, }; @@ -731,8 +731,8 @@ static struct resource ssc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_SSC1, - .end = AT91SAM9261_ID_SSC1, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1, .flags = IORESOURCE_IRQ, }, }; @@ -773,8 +773,8 @@ static struct resource ssc2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_SSC2, - .end = AT91SAM9261_ID_SSC2, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2, .flags = IORESOURCE_IRQ, }, }; @@ -857,8 +857,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, + .start = NR_IRQS_LEGACY + AT91_ID_SYS, + .end = NR_IRQS_LEGACY + AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; @@ -895,8 +895,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_US0, - .end = AT91SAM9261_ID_US0, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US0, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US0, .flags = IORESOURCE_IRQ, }, }; @@ -938,8 +938,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_US1, - .end = AT91SAM9261_ID_US1, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US1, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US1, .flags = IORESOURCE_IRQ, }, }; @@ -981,8 +981,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_US2, - .end = AT91SAM9261_ID_US2, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US2, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US2, .flags = IORESOURCE_IRQ, }, }; diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index ed91c7e9f7c2..84b38105231e 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -18,6 +18,7 @@ #include <asm/mach/map.h> #include <asm/system_misc.h> #include <mach/at91sam9263.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h> diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index 175e0009eaa9..eb6bbf86fb9f 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c @@ -44,8 +44,8 @@ static struct resource usbh_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_UHP, - .end = AT91SAM9263_ID_UHP, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP, .flags = IORESOURCE_IRQ, }, }; @@ -104,8 +104,8 @@ static struct resource udc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_UDP, - .end = AT91SAM9263_ID_UDP, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP, .flags = IORESOURCE_IRQ, }, }; @@ -155,8 +155,8 @@ static struct resource eth_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_EMAC, - .end = AT91SAM9263_ID_EMAC, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC, .flags = IORESOURCE_IRQ, }, }; @@ -229,8 +229,8 @@ static struct resource mmc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_MCI0, - .end = AT91SAM9263_ID_MCI0, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0, .flags = IORESOURCE_IRQ, }, }; @@ -254,8 +254,8 @@ static struct resource mmc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_MCI1, - .end = AT91SAM9263_ID_MCI1, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1, .flags = IORESOURCE_IRQ, }, }; @@ -567,8 +567,8 @@ static struct resource twi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_TWI, - .end = AT91SAM9263_ID_TWI, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI, .flags = IORESOURCE_IRQ, }, }; @@ -611,8 +611,8 @@ static struct resource spi0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_SPI0, - .end = AT91SAM9263_ID_SPI0, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0, .flags = IORESOURCE_IRQ, }, }; @@ -637,8 +637,8 @@ static struct resource spi1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_SPI1, - .end = AT91SAM9263_ID_SPI1, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1, .flags = IORESOURCE_IRQ, }, }; @@ -725,8 +725,8 @@ static struct resource ac97_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_AC97C, - .end = AT91SAM9263_ID_AC97C, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C, .flags = IORESOURCE_IRQ, }, }; @@ -776,8 +776,8 @@ static struct resource can_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_CAN, - .end = AT91SAM9263_ID_CAN, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN, .flags = IORESOURCE_IRQ, }, }; @@ -816,8 +816,8 @@ static struct resource lcdc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_LCDC, - .end = AT91SAM9263_ID_LCDC, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC, .flags = IORESOURCE_IRQ, }, }; @@ -883,8 +883,8 @@ struct resource isi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_ISI, - .end = AT91SAM9263_ID_ISI, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI, .flags = IORESOURCE_IRQ, }, }; @@ -940,8 +940,8 @@ static struct resource tcb_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_TCB, - .end = AT91SAM9263_ID_TCB, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB, .flags = IORESOURCE_IRQ, }, }; @@ -1108,8 +1108,8 @@ static struct resource pwm_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_PWMC, - .end = AT91SAM9263_ID_PWMC, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC, .flags = IORESOURCE_IRQ, }, }; @@ -1161,8 +1161,8 @@ static struct resource ssc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_SSC0, - .end = AT91SAM9263_ID_SSC0, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0, .flags = IORESOURCE_IRQ, }, }; @@ -1203,8 +1203,8 @@ static struct resource ssc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_SSC1, - .end = AT91SAM9263_ID_SSC1, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1, .flags = IORESOURCE_IRQ, }, }; @@ -1284,8 +1284,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, + .start = NR_IRQS_LEGACY + AT91_ID_SYS, + .end = NR_IRQS_LEGACY + AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; @@ -1322,8 +1322,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_US0, - .end = AT91SAM9263_ID_US0, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US0, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US0, .flags = IORESOURCE_IRQ, }, }; @@ -1365,8 +1365,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_US1, - .end = AT91SAM9263_ID_US1, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US1, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US1, .flags = IORESOURCE_IRQ, }, }; @@ -1408,8 +1408,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_US2, - .end = AT91SAM9263_ID_US2, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US2, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US2, .flags = IORESOURCE_IRQ, }, }; diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c index a94758b42737..ffc0957d7623 100644 --- a/arch/arm/mach-at91/at91sam926x_time.c +++ b/arch/arm/mach-at91/at91sam926x_time.c @@ -137,7 +137,7 @@ static struct irqaction at91sam926x_pit_irq = { .name = "at91_tick", .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, .handler = at91sam926x_pit_interrupt, - .irq = AT91_ID_SYS, + .irq = NR_IRQS_LEGACY + AT91_ID_SYS, }; static void at91sam926x_pit_reset(void) diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 4792682d52b9..977127368a7d 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -18,6 +18,7 @@ #include <asm/mach/map.h> #include <asm/system_misc.h> #include <mach/at91sam9g45.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/cpu.h> diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 933fc9afe7d0..40fb79df2de0 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c @@ -53,8 +53,8 @@ static struct resource hdmac_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_DMA, - .end = AT91SAM9G45_ID_DMA, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA, .flags = IORESOURCE_IRQ, }, }; @@ -94,8 +94,8 @@ static struct resource usbh_ohci_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_UHPHS, - .end = AT91SAM9G45_ID_UHPHS, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, .flags = IORESOURCE_IRQ, }, }; @@ -156,8 +156,8 @@ static struct resource usbh_ehci_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_UHPHS, - .end = AT91SAM9G45_ID_UHPHS, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, .flags = IORESOURCE_IRQ, }, }; @@ -213,8 +213,8 @@ static struct resource usba_udc_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { - .start = AT91SAM9G45_ID_UDPHS, - .end = AT91SAM9G45_ID_UDPHS, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS, .flags = IORESOURCE_IRQ, }, }; @@ -296,8 +296,8 @@ static struct resource eth_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_EMAC, - .end = AT91SAM9G45_ID_EMAC, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC, .flags = IORESOURCE_IRQ, }, }; @@ -370,8 +370,8 @@ static struct resource mmc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_MCI0, - .end = AT91SAM9G45_ID_MCI0, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0, .flags = IORESOURCE_IRQ, }, }; @@ -395,8 +395,8 @@ static struct resource mmc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_MCI1, - .end = AT91SAM9G45_ID_MCI1, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1, .flags = IORESOURCE_IRQ, }, }; @@ -645,8 +645,8 @@ static struct resource twi0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_TWI0, - .end = AT91SAM9G45_ID_TWI0, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0, .flags = IORESOURCE_IRQ, }, }; @@ -665,8 +665,8 @@ static struct resource twi1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_TWI1, - .end = AT91SAM9G45_ID_TWI1, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1, .flags = IORESOURCE_IRQ, }, }; @@ -720,8 +720,8 @@ static struct resource spi0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_SPI0, - .end = AT91SAM9G45_ID_SPI0, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0, .flags = IORESOURCE_IRQ, }, }; @@ -746,8 +746,8 @@ static struct resource spi1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_SPI1, - .end = AT91SAM9G45_ID_SPI1, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1, .flags = IORESOURCE_IRQ, }, }; @@ -834,8 +834,8 @@ static struct resource ac97_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_AC97C, - .end = AT91SAM9G45_ID_AC97C, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C, .flags = IORESOURCE_IRQ, }, }; @@ -887,8 +887,8 @@ struct resource isi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_ISI, - .end = AT91SAM9G45_ID_ISI, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI, .flags = IORESOURCE_IRQ, }, }; @@ -979,8 +979,8 @@ static struct resource lcdc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_LCDC, - .end = AT91SAM9G45_ID_LCDC, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC, .flags = IORESOURCE_IRQ, }, }; @@ -1054,8 +1054,8 @@ static struct resource tcb0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_TCB, - .end = AT91SAM9G45_ID_TCB, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, .flags = IORESOURCE_IRQ, }, }; @@ -1075,8 +1075,8 @@ static struct resource tcb1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_TCB, - .end = AT91SAM9G45_ID_TCB, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, .flags = IORESOURCE_IRQ, }, }; @@ -1110,8 +1110,8 @@ static struct resource rtc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, + .start = NR_IRQS_LEGACY + AT91_ID_SYS, + .end = NR_IRQS_LEGACY + AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; @@ -1147,8 +1147,8 @@ static struct resource tsadcc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_TSC, - .end = AT91SAM9G45_ID_TSC, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, .flags = IORESOURCE_IRQ, } }; @@ -1197,8 +1197,8 @@ static struct resource adc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_TSC, - .end = AT91SAM9G45_ID_TSC, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, .flags = IORESOURCE_IRQ, } }; @@ -1400,8 +1400,8 @@ static struct resource pwm_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_PWMC, - .end = AT91SAM9G45_ID_PWMC, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC, .flags = IORESOURCE_IRQ, }, }; @@ -1453,8 +1453,8 @@ static struct resource ssc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_SSC0, - .end = AT91SAM9G45_ID_SSC0, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0, .flags = IORESOURCE_IRQ, }, }; @@ -1495,8 +1495,8 @@ static struct resource ssc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_SSC1, - .end = AT91SAM9G45_ID_SSC1, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1, .flags = IORESOURCE_IRQ, }, }; @@ -1575,8 +1575,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, + .start = NR_IRQS_LEGACY + AT91_ID_SYS, + .end = NR_IRQS_LEGACY + AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; @@ -1613,8 +1613,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_US0, - .end = AT91SAM9G45_ID_US0, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0, .flags = IORESOURCE_IRQ, }, }; @@ -1656,8 +1656,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_US1, - .end = AT91SAM9G45_ID_US1, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1, .flags = IORESOURCE_IRQ, }, }; @@ -1699,8 +1699,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_US2, - .end = AT91SAM9G45_ID_US2, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2, .flags = IORESOURCE_IRQ, }, }; @@ -1742,8 +1742,8 @@ static struct resource uart3_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_US3, - .end = AT91SAM9G45_ID_US3, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3, .flags = IORESOURCE_IRQ, }, }; diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index e420085a57ef..72ce50a50de5 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -19,6 +19,7 @@ #include <mach/cpu.h> #include <mach/at91_dbgu.h> #include <mach/at91sam9rl.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h> diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 9c0b1481a9a7..f09fff932172 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c @@ -41,8 +41,8 @@ static struct resource hdmac_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { - .start = AT91SAM9RL_ID_DMA, - .end = AT91SAM9RL_ID_DMA, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA, .flags = IORESOURCE_IRQ, }, }; @@ -84,8 +84,8 @@ static struct resource usba_udc_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { - .start = AT91SAM9RL_ID_UDPHS, - .end = AT91SAM9RL_ID_UDPHS, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS, .flags = IORESOURCE_IRQ, }, }; @@ -172,8 +172,8 @@ static struct resource mmc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_MCI, - .end = AT91SAM9RL_ID_MCI, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI, .flags = IORESOURCE_IRQ, }, }; @@ -339,8 +339,8 @@ static struct resource twi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_TWI0, - .end = AT91SAM9RL_ID_TWI0, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0, .flags = IORESOURCE_IRQ, }, }; @@ -383,8 +383,8 @@ static struct resource spi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_SPI, - .end = AT91SAM9RL_ID_SPI, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI, .flags = IORESOURCE_IRQ, }, }; @@ -452,8 +452,8 @@ static struct resource ac97_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_AC97C, - .end = AT91SAM9RL_ID_AC97C, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C, .flags = IORESOURCE_IRQ, }, }; @@ -507,8 +507,8 @@ static struct resource lcdc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_LCDC, - .end = AT91SAM9RL_ID_LCDC, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC, .flags = IORESOURCE_IRQ, }, }; @@ -574,18 +574,18 @@ static struct resource tcb_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_TC0, - .end = AT91SAM9RL_ID_TC0, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0, .flags = IORESOURCE_IRQ, }, [2] = { - .start = AT91SAM9RL_ID_TC1, - .end = AT91SAM9RL_ID_TC1, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1, .flags = IORESOURCE_IRQ, }, [3] = { - .start = AT91SAM9RL_ID_TC2, - .end = AT91SAM9RL_ID_TC2, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2, .flags = IORESOURCE_IRQ, }, }; @@ -621,8 +621,8 @@ static struct resource tsadcc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_TSC, - .end = AT91SAM9RL_ID_TSC, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC, .flags = IORESOURCE_IRQ, } }; @@ -768,8 +768,8 @@ static struct resource pwm_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_PWMC, - .end = AT91SAM9RL_ID_PWMC, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC, .flags = IORESOURCE_IRQ, }, }; @@ -821,8 +821,8 @@ static struct resource ssc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_SSC0, - .end = AT91SAM9RL_ID_SSC0, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0, .flags = IORESOURCE_IRQ, }, }; @@ -863,8 +863,8 @@ static struct resource ssc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_SSC1, - .end = AT91SAM9RL_ID_SSC1, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1, .flags = IORESOURCE_IRQ, }, }; @@ -943,8 +943,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, + .start = NR_IRQS_LEGACY + AT91_ID_SYS, + .end = NR_IRQS_LEGACY + AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; @@ -981,8 +981,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_US0, - .end = AT91SAM9RL_ID_US0, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0, .flags = IORESOURCE_IRQ, }, }; @@ -1032,8 +1032,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_US1, - .end = AT91SAM9RL_ID_US1, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1, .flags = IORESOURCE_IRQ, }, }; @@ -1075,8 +1075,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_US2, - .end = AT91SAM9RL_ID_US2, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2, .flags = IORESOURCE_IRQ, }, }; @@ -1118,8 +1118,8 @@ static struct resource uart3_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_US3, - .end = AT91SAM9RL_ID_US3, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3, .flags = IORESOURCE_IRQ, }, }; diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index 1b144b4d3ce1..477cf9d06672 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c @@ -312,8 +312,6 @@ static void __init at91sam9x5_map_io(void) void __init at91sam9x5_initialize(void) { - at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0); - /* Register GPIO subsystem (using DT) */ at91_gpio_init(NULL, 0); } @@ -321,47 +319,9 @@ void __init at91sam9x5_initialize(void) /* -------------------------------------------------------------------- * Interrupt initialization * -------------------------------------------------------------------- */ -/* - * The default interrupt priority levels (0 = lowest, 7 = highest). - */ -static unsigned int at91sam9x5_default_irq_priority[NR_AIC_IRQS] __initdata = { - 7, /* Advanced Interrupt Controller (FIQ) */ - 7, /* System Peripherals */ - 1, /* Parallel IO Controller A and B */ - 1, /* Parallel IO Controller C and D */ - 4, /* Soft Modem */ - 5, /* USART 0 */ - 5, /* USART 1 */ - 5, /* USART 2 */ - 5, /* USART 3 */ - 6, /* Two-Wire Interface 0 */ - 6, /* Two-Wire Interface 1 */ - 6, /* Two-Wire Interface 2 */ - 0, /* Multimedia Card Interface 0 */ - 5, /* Serial Peripheral Interface 0 */ - 5, /* Serial Peripheral Interface 1 */ - 5, /* UART 0 */ - 5, /* UART 1 */ - 0, /* Timer Counter 0, 1, 2, 3, 4 and 5 */ - 0, /* Pulse Width Modulation Controller */ - 0, /* ADC Controller */ - 0, /* DMA Controller 0 */ - 0, /* DMA Controller 1 */ - 2, /* USB Host High Speed port */ - 2, /* USB Device High speed port */ - 3, /* Ethernet MAC 0 */ - 3, /* LDC Controller or Image Sensor Interface */ - 0, /* Multimedia Card Interface 1 */ - 3, /* Ethernet MAC 1 */ - 4, /* Synchronous Serial Interface */ - 4, /* CAN Controller 0 */ - 4, /* CAN Controller 1 */ - 0, /* Advanced Interrupt Controller (IRQ0) */ -}; struct at91_init_soc __initdata at91sam9x5_soc = { .map_io = at91sam9x5_map_io, - .default_irq_priority = at91sam9x5_default_irq_priority, .register_clocks = at91sam9x5_register_clocks, .init = at91sam9x5_initialize, }; diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c index d62fe090d814..46090e642d8e 100644 --- a/arch/arm/mach-at91/at91x40.c +++ b/arch/arm/mach-at91/at91x40.c @@ -13,10 +13,12 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/irq.h> +#include <linux/io.h> #include <asm/proc-fns.h> #include <asm/system_misc.h> #include <asm/mach/arch.h> #include <mach/at91x40.h> +#include <mach/at91_aic.h> #include <mach/at91_st.h> #include <mach/timex.h> #include "generic.h" diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c index 271f994314a4..22d8856094f1 100644 --- a/arch/arm/mach-at91/board-1arm.c +++ b/arch/arm/mach-at91/board-1arm.c @@ -36,6 +36,7 @@ #include <mach/board.h> #include <mach/cpu.h> +#include <mach/at91_aic.h> #include "generic.h" @@ -91,6 +92,7 @@ MACHINE_START(ONEARM, "Ajeco 1ARM single board computer") /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = onearm_init_early, .init_irq = at91_init_irq_default, .init_machine = onearm_board_init, diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c index b7d8aa7b81e6..de7be1931817 100644 --- a/arch/arm/mach-at91/board-afeb-9260v1.c +++ b/arch/arm/mach-at91/board-afeb-9260v1.c @@ -44,6 +44,7 @@ #include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h" @@ -212,6 +213,7 @@ MACHINE_START(AFEB9260, "Custom afeb9260 board") /* Maintainer: Sergey Lapin <slapin@ossfans.org> */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = afeb9260_init_early, .init_irq = at91_init_irq_default, .init_machine = afeb9260_board_init, diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c index 29d3ef0a50fb..477e708497bc 100644 --- a/arch/arm/mach-at91/board-cam60.c +++ b/arch/arm/mach-at91/board-cam60.c @@ -39,6 +39,7 @@ #include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h" @@ -188,6 +189,7 @@ MACHINE_START(CAM60, "KwikByte CAM60") /* Maintainer: KwikByte */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = cam60_init_early, .init_irq = at91_init_irq_default, .init_machine = cam60_board_init, diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c index 44328a6d4609..a5b002f32a61 100644 --- a/arch/arm/mach-at91/board-carmeva.c +++ b/arch/arm/mach-at91/board-carmeva.c @@ -36,6 +36,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h" @@ -158,6 +159,7 @@ MACHINE_START(CARMEVA, "Carmeva") /* Maintainer: Conitec Datasystems */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = carmeva_init_early, .init_irq = at91_init_irq_default, .init_machine = carmeva_board_init, diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c index 69951ec7dbf3..ecbc13b594de 100644 --- a/arch/arm/mach-at91/board-cpu9krea.c +++ b/arch/arm/mach-at91/board-cpu9krea.c @@ -41,6 +41,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91sam9260_matrix.h> #include <mach/at91_matrix.h> @@ -376,6 +377,7 @@ MACHINE_START(CPUAT9G20, "Eukrea CPU9G20") /* Maintainer: Eric Benard - EUKREA Electromatique */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = cpu9krea_init_early, .init_irq = at91_init_irq_default, .init_machine = cpu9krea_board_init, diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c index 895cf2dba612..2e6d043c82f2 100644 --- a/arch/arm/mach-at91/board-cpuat91.c +++ b/arch/arm/mach-at91/board-cpuat91.c @@ -37,6 +37,7 @@ #include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> #include <mach/cpu.h> @@ -178,6 +179,7 @@ MACHINE_START(CPUAT91, "Eukrea") /* Maintainer: Eric Benard - EUKREA Electromatique */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = cpuat91_init_early, .init_irq = at91_init_irq_default, .init_machine = cpuat91_board_init, diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c index cd813361cd26..462bc319cbc5 100644 --- a/arch/arm/mach-at91/board-csb337.c +++ b/arch/arm/mach-at91/board-csb337.c @@ -39,6 +39,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h" @@ -252,6 +253,7 @@ MACHINE_START(CSB337, "Cogent CSB337") /* Maintainer: Bill Gatliff */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = csb337_init_early, .init_irq = at91_init_irq_default, .init_machine = csb337_board_init, diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c index 7c8b05a57d7f..872871ab1160 100644 --- a/arch/arm/mach-at91/board-csb637.c +++ b/arch/arm/mach-at91/board-csb637.c @@ -36,6 +36,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h" @@ -133,6 +134,7 @@ MACHINE_START(CSB637, "Cogent CSB637") /* Maintainer: Bill Gatliff */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = csb637_init_early, .init_irq = at91_init_irq_default, .init_machine = csb637_board_init, diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c index a1fce05aa7a5..e8f45c4e0ea8 100644 --- a/arch/arm/mach-at91/board-dt.c +++ b/arch/arm/mach-at91/board-dt.c @@ -16,6 +16,7 @@ #include <linux/of_platform.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <asm/setup.h> #include <asm/irq.h> @@ -53,6 +54,7 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)") /* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = at91_dt_initialize, .init_irq = at91_dt_init_irq, .init_machine = at91_dt_device_init, diff --git a/arch/arm/mach-at91/board-eb01.c b/arch/arm/mach-at91/board-eb01.c index d2023f27c652..01f66e99ece7 100644 --- a/arch/arm/mach-at91/board-eb01.c +++ b/arch/arm/mach-at91/board-eb01.c @@ -28,6 +28,7 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h" static void __init at91eb01_init_irq(void) @@ -43,6 +44,7 @@ static void __init at91eb01_init_early(void) MACHINE_START(AT91EB01, "Atmel AT91 EB01") /* Maintainer: Greg Ungerer <gerg@snapgear.com> */ .timer = &at91x40_timer, + .handle_irq = at91_aic_handle_irq, .init_early = at91eb01_init_early, .init_irq = at91eb01_init_irq, MACHINE_END diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c index bd1017297989..d1e1f3fc0a47 100644 --- a/arch/arm/mach-at91/board-eb9200.c +++ b/arch/arm/mach-at91/board-eb9200.c @@ -36,6 +36,7 @@ #include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h" @@ -118,6 +119,7 @@ static void __init eb9200_board_init(void) MACHINE_START(ATEB9200, "Embest ATEB9200") .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = eb9200_init_early, .init_irq = at91_init_irq_default, .init_machine = eb9200_board_init, diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c index 89cc3726a9ce..9c24cb25707c 100644 --- a/arch/arm/mach-at91/board-ecbat91.c +++ b/arch/arm/mach-at91/board-ecbat91.c @@ -39,6 +39,7 @@ #include <mach/board.h> #include <mach/cpu.h> +#include <mach/at91_aic.h> #include "generic.h" @@ -170,6 +171,7 @@ MACHINE_START(ECBAT91, "emQbit's ECB_AT91") /* Maintainer: emQbit.com */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ecb_at91init_early, .init_irq = at91_init_irq_default, .init_machine = ecb_at91board_init, diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c index 558546cf63f4..82bdfde3405f 100644 --- a/arch/arm/mach-at91/board-eco920.c +++ b/arch/arm/mach-at91/board-eco920.c @@ -25,6 +25,7 @@ #include <asm/mach/map.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> #include <mach/cpu.h> @@ -132,6 +133,7 @@ MACHINE_START(ECO920, "eco920") /* Maintainer: Sascha Hauer */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = eco920_init_early, .init_irq = at91_init_irq_default, .init_machine = eco920_board_init, diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c index 47658f78105d..6cc83a87d77c 100644 --- a/arch/arm/mach-at91/board-flexibity.c +++ b/arch/arm/mach-at91/board-flexibity.c @@ -34,6 +34,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h" @@ -160,6 +161,7 @@ MACHINE_START(FLEXIBITY, "Flexibity Connect") /* Maintainer: Maxim Osipov */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = flexibity_init_early, .init_irq = at91_init_irq_default, .init_machine = flexibity_board_init, diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c index 33411e6ecb1f..69ab1247ef81 100644 --- a/arch/arm/mach-at91/board-foxg20.c +++ b/arch/arm/mach-at91/board-foxg20.c @@ -42,6 +42,7 @@ #include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h" @@ -262,6 +263,7 @@ MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20") /* Maintainer: Sergio Tanzilli */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = foxg20_init_early, .init_irq = at91_init_irq_default, .init_machine = foxg20_board_init, diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c index 3e0dfa643a86..a9d5e78118c5 100644 --- a/arch/arm/mach-at91/board-gsia18s.c +++ b/arch/arm/mach-at91/board-gsia18s.c @@ -31,6 +31,7 @@ #include <asm/mach/arch.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/gsia18s.h> #include <mach/stamp9g20.h> @@ -575,6 +576,7 @@ static void __init gsia18s_board_init(void) MACHINE_START(GSIA18S, "GS_IA18_S") .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = gsia18s_init_early, .init_irq = at91_init_irq_default, .init_machine = gsia18s_board_init, diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c index f260657f32bc..64c1dbf88a07 100644 --- a/arch/arm/mach-at91/board-kafa.c +++ b/arch/arm/mach-at91/board-kafa.c @@ -35,6 +35,7 @@ #include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/cpu.h> #include "generic.h" @@ -93,6 +94,7 @@ MACHINE_START(KAFA, "Sperry-Sun KAFA") /* Maintainer: Sergei Sharonov */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = kafa_init_early, .init_irq = at91_init_irq_default, .init_machine = kafa_board_init, diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c index ba39db5482b9..5d96cb85175f 100644 --- a/arch/arm/mach-at91/board-kb9202.c +++ b/arch/arm/mach-at91/board-kb9202.c @@ -37,6 +37,7 @@ #include <mach/board.h> #include <mach/cpu.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> @@ -133,6 +134,7 @@ MACHINE_START(KB9200, "KB920x") /* Maintainer: KwikByte, Inc. */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = kb9202_init_early, .init_irq = at91_init_irq_default, .init_machine = kb9202_board_init, diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c index d2f4cc161766..18103c5d993c 100644 --- a/arch/arm/mach-at91/board-neocore926.c +++ b/arch/arm/mach-at91/board-neocore926.c @@ -45,6 +45,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h" @@ -378,6 +379,7 @@ MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926") /* Maintainer: ADENEO */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = neocore926_init_early, .init_irq = at91_init_irq_default, .init_machine = neocore926_board_init, diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c index 7fe638342421..9ca3e32c54cb 100644 --- a/arch/arm/mach-at91/board-pcontrol-g20.c +++ b/arch/arm/mach-at91/board-pcontrol-g20.c @@ -30,6 +30,7 @@ #include <asm/mach/arch.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/stamp9g20.h> @@ -218,6 +219,7 @@ MACHINE_START(PCONTROL_G20, "PControl G20") /* Maintainer: pgsellmann@portner-elektronik.at */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = pcontrol_g20_init_early, .init_irq = at91_init_irq_default, .init_machine = pcontrol_g20_board_init, diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c index b45c0a5d5ca7..127065504508 100644 --- a/arch/arm/mach-at91/board-picotux200.c +++ b/arch/arm/mach-at91/board-picotux200.c @@ -38,6 +38,7 @@ #include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> @@ -120,6 +121,7 @@ MACHINE_START(PICOTUX2XX, "picotux 200") /* Maintainer: Kleinhenz Elektronik GmbH */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = picotux200_init_early, .init_irq = at91_init_irq_default, .init_machine = picotux200_board_init, diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c index 0c61bf0d272c..bf351e285422 100644 --- a/arch/arm/mach-at91/board-qil-a9260.c +++ b/arch/arm/mach-at91/board-qil-a9260.c @@ -41,6 +41,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> @@ -258,6 +259,7 @@ MACHINE_START(QIL_A9260, "CALAO QIL_A9260") /* Maintainer: calao-systems */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c index afd7a4713766..cc2bf9796073 100644 --- a/arch/arm/mach-at91/board-rm9200dk.c +++ b/arch/arm/mach-at91/board-rm9200dk.c @@ -40,6 +40,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> @@ -223,6 +224,7 @@ MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK") /* Maintainer: SAN People/Atmel */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = dk_init_early, .init_irq = at91_init_irq_default, .init_machine = dk_board_init, diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c index 2b15b8adec4c..62e19e64c9d3 100644 --- a/arch/arm/mach-at91/board-rm9200ek.c +++ b/arch/arm/mach-at91/board-rm9200ek.c @@ -40,6 +40,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> @@ -190,6 +191,7 @@ MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK") /* Maintainer: SAN People/Atmel */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c index 24ab9be7510f..c3b43aefdb75 100644 --- a/arch/arm/mach-at91/board-rsi-ews.c +++ b/arch/arm/mach-at91/board-rsi-ews.c @@ -26,6 +26,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <linux/gpio.h> @@ -225,6 +226,7 @@ MACHINE_START(RSI_EWS, "RSI EWS") /* Maintainer: Josef Holzmayr <holzmayr@rsi-elektrotechnik.de> */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = rsi_ews_init_early, .init_irq = at91_init_irq_default, .init_machine = rsi_ews_board_init, diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c index cdd21f2595d2..7bf6da70d7d5 100644 --- a/arch/arm/mach-at91/board-sam9-l9260.c +++ b/arch/arm/mach-at91/board-sam9-l9260.c @@ -38,6 +38,7 @@ #include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h" @@ -202,6 +203,7 @@ MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260") /* Maintainer: Olimex */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c index 7b3c3913551a..889c1bf71eb5 100644 --- a/arch/arm/mach-at91/board-sam9260ek.c +++ b/arch/arm/mach-at91/board-sam9260ek.c @@ -42,6 +42,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> #include <mach/system_rev.h> @@ -344,6 +345,7 @@ MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") /* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index 2736453821b0..2269be5fa384 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c @@ -46,6 +46,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> #include <mach/system_rev.h> @@ -615,6 +616,7 @@ MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK") /* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index 983cb98d2465..82adf581afc2 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c @@ -45,6 +45,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> #include <mach/system_rev.h> @@ -443,6 +444,7 @@ MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") /* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c index 6860d3451100..4ea4ee00364b 100644 --- a/arch/arm/mach-at91/board-sam9g20ek.c +++ b/arch/arm/mach-at91/board-sam9g20ek.c @@ -44,6 +44,7 @@ #include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/system_rev.h> @@ -413,6 +414,7 @@ MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK") /* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, @@ -422,6 +424,7 @@ MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod") /* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index 63163dc7df46..3d48ec154685 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c @@ -43,6 +43,7 @@ #include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> #include <mach/system_rev.h> @@ -503,6 +504,7 @@ MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK") /* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c index be3239f13daa..e7dc3ead7045 100644 --- a/arch/arm/mach-at91/board-sam9rlek.c +++ b/arch/arm/mach-at91/board-sam9rlek.c @@ -31,6 +31,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> @@ -319,6 +320,7 @@ MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") /* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c index 9d446f1bb45f..a4e031a039fd 100644 --- a/arch/arm/mach-at91/board-snapper9260.c +++ b/arch/arm/mach-at91/board-snapper9260.c @@ -33,6 +33,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h" @@ -178,6 +179,7 @@ static void __init snapper9260_board_init(void) MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module") .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = snapper9260_init_early, .init_irq = at91_init_irq_default, .init_machine = snapper9260_board_init, diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c index ee86f9d7ee72..29eae1626bf7 100644 --- a/arch/arm/mach-at91/board-stamp9g20.c +++ b/arch/arm/mach-at91/board-stamp9g20.c @@ -26,6 +26,7 @@ #include <asm/mach/arch.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h" @@ -287,6 +288,7 @@ MACHINE_START(PORTUXG20, "taskit PortuxG20") /* Maintainer: taskit GmbH */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = stamp9g20_init_early, .init_irq = at91_init_irq_default, .init_machine = portuxg20_board_init, @@ -296,6 +298,7 @@ MACHINE_START(STAMP9G20, "taskit Stamp9G20") /* Maintainer: taskit GmbH */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = stamp9g20_init_early, .init_irq = at91_init_irq_default, .init_machine = stamp9g20evb_board_init, diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c index 95393fcaf199..c1476b9fe7b9 100644 --- a/arch/arm/mach-at91/board-usb-a926x.c +++ b/arch/arm/mach-at91/board-usb-a926x.c @@ -42,6 +42,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> @@ -358,6 +359,7 @@ MACHINE_START(USB_A9263, "CALAO USB_A9263") /* Maintainer: calao-systems */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, @@ -367,6 +369,7 @@ MACHINE_START(USB_A9260, "CALAO USB_A9260") /* Maintainer: calao-systems */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, @@ -376,6 +379,7 @@ MACHINE_START(USB_A9G20, "CALAO USB_A92G0") /* Maintainer: Jean-Christophe PLAGNIOL-VILLARD */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c index d56665ea4b55..516d340549d8 100644 --- a/arch/arm/mach-at91/board-yl-9200.c +++ b/arch/arm/mach-at91/board-yl-9200.c @@ -44,6 +44,7 @@ #include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> #include <mach/cpu.h> @@ -590,6 +591,7 @@ MACHINE_START(YL9200, "uCdragon YL-9200") /* Maintainer: S.Birtles */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = yl9200_init_early, .init_irq = at91_init_irq_default, .init_machine = yl9200_board_init, diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 0a60bf837037..f49650677653 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -29,6 +29,8 @@ extern void __init at91x40_init_interrupts(unsigned int priority[]); extern void __init at91_aic_init(unsigned int priority[]); extern int __init at91_aic_of_init(struct device_node *node, struct device_node *parent); +extern int __init at91_aic5_of_init(struct device_node *node, + struct device_node *parent); /* Timer */ diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index 325837a264c9..be42cf0e74bd 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c @@ -26,6 +26,8 @@ #include <linux/of_irq.h> #include <linux/of_gpio.h> +#include <asm/mach/irq.h> + #include <mach/hardware.h> #include <mach/at91_pio.h> @@ -585,15 +587,14 @@ static struct irq_chip gpio_irqchip = { static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) { + struct irq_chip *chip = irq_desc_get_chip(desc); struct irq_data *idata = irq_desc_get_irq_data(desc); - struct irq_chip *chip = irq_data_get_irq_chip(idata); struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); void __iomem *pio = at91_gpio->regbase; unsigned long isr; int n; - /* temporarily mask (level sensitive) parent IRQ */ - chip->irq_ack(idata); + chained_irq_enter(chip, desc); for (;;) { /* Reading ISR acks pending (edge triggered) GPIO interrupts. * When there none are pending, we're finished unless we need @@ -614,7 +615,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) n = find_next_bit(&isr, BITS_PER_LONG, n + 1); } } - chip->irq_unmask(idata); + chained_irq_exit(chip, desc); /* now it may re-trigger */ } diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h index 3045781c473f..eaea66197fa1 100644 --- a/arch/arm/mach-at91/include/mach/at91_aic.h +++ b/arch/arm/mach-at91/include/mach/at91_aic.h @@ -23,12 +23,23 @@ extern void __iomem *at91_aic_base; __raw_readl(at91_aic_base + field) #define at91_aic_write(field, value) \ - __raw_writel(value, at91_aic_base + field); + __raw_writel(value, at91_aic_base + field) #else .extern at91_aic_base #endif +/* Number of irq lines managed by AIC */ +#define NR_AIC_IRQS 32 +#define NR_AIC5_IRQS 128 + +#define AT91_AIC5_SSR 0x0 /* Source Select Register [AIC5] */ +#define AT91_AIC5_INTSEL_MSK (0x7f << 0) /* Interrupt Line Selection Mask */ + +#define AT91_AIC_IRQ_MIN_PRIORITY 0 +#define AT91_AIC_IRQ_MAX_PRIORITY 7 + #define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */ +#define AT91_AIC5_SMR 0x4 /* Source Mode Register [AIC5] */ #define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ #define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ #define AT91_AIC_SRCTYPE_LOW (0 << 5) @@ -37,29 +48,52 @@ extern void __iomem *at91_aic_base; #define AT91_AIC_SRCTYPE_RISING (3 << 5) #define AT91_AIC_SVR(n) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ +#define AT91_AIC5_SVR 0x8 /* Source Vector Register [AIC5] */ #define AT91_AIC_IVR 0x100 /* Interrupt Vector Register */ +#define AT91_AIC5_IVR 0x10 /* Interrupt Vector Register [AIC5] */ #define AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */ +#define AT91_AIC5_FVR 0x14 /* Fast Interrupt Vector Register [AIC5] */ #define AT91_AIC_ISR 0x108 /* Interrupt Status Register */ +#define AT91_AIC5_ISR 0x18 /* Interrupt Status Register [AIC5] */ #define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ #define AT91_AIC_IPR 0x10c /* Interrupt Pending Register */ +#define AT91_AIC5_IPR0 0x20 /* Interrupt Pending Register 0 [AIC5] */ +#define AT91_AIC5_IPR1 0x24 /* Interrupt Pending Register 1 [AIC5] */ +#define AT91_AIC5_IPR2 0x28 /* Interrupt Pending Register 2 [AIC5] */ +#define AT91_AIC5_IPR3 0x2c /* Interrupt Pending Register 3 [AIC5] */ #define AT91_AIC_IMR 0x110 /* Interrupt Mask Register */ +#define AT91_AIC5_IMR 0x30 /* Interrupt Mask Register [AIC5] */ #define AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */ +#define AT91_AIC5_CISR 0x34 /* Core Interrupt Status Register [AIC5] */ #define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ #define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ #define AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */ +#define AT91_AIC5_IECR 0x40 /* Interrupt Enable Command Register [AIC5] */ #define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */ +#define AT91_AIC5_IDCR 0x44 /* Interrupt Disable Command Register [AIC5] */ #define AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */ +#define AT91_AIC5_ICCR 0x48 /* Interrupt Clear Command Register [AIC5] */ #define AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */ +#define AT91_AIC5_ISCR 0x4c /* Interrupt Set Command Register [AIC5] */ #define AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */ +#define AT91_AIC5_EOICR 0x38 /* End of Interrupt Command Register [AIC5] */ #define AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */ +#define AT91_AIC5_SPU 0x3c /* Spurious Interrupt Vector Register [AIC5] */ #define AT91_AIC_DCR 0x138 /* Debug Control Register */ +#define AT91_AIC5_DCR 0x6c /* Debug Control Register [AIC5] */ #define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ #define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ #define AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */ +#define AT91_AIC5_FFER 0x50 /* Fast Forcing Enable Register [AIC5] */ #define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */ +#define AT91_AIC5_FFDR 0x54 /* Fast Forcing Disable Register [AIC5] */ #define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */ +#define AT91_AIC5_FFSR 0x58 /* Fast Forcing Status Register [AIC5] */ + +void at91_aic_handle_irq(struct pt_regs *regs); +void at91_aic5_handle_irq(struct pt_regs *regs); #endif diff --git a/arch/arm/mach-at91/include/mach/at91_spi.h b/arch/arm/mach-at91/include/mach/at91_spi.h deleted file mode 100644 index 2f6ba0c5636e..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_spi.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91_spi.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Serial Peripheral Interface (SPI) registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_SPI_H -#define AT91_SPI_H - -#define AT91_SPI_CR 0x00 /* Control Register */ -#define AT91_SPI_SPIEN (1 << 0) /* SPI Enable */ -#define AT91_SPI_SPIDIS (1 << 1) /* SPI Disable */ -#define AT91_SPI_SWRST (1 << 7) /* SPI Software Reset */ -#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ - -#define AT91_SPI_MR 0x04 /* Mode Register */ -#define AT91_SPI_MSTR (1 << 0) /* Master/Slave Mode */ -#define AT91_SPI_PS (1 << 1) /* Peripheral Select */ -#define AT91_SPI_PS_FIXED (0 << 1) -#define AT91_SPI_PS_VARIABLE (1 << 1) -#define AT91_SPI_PCSDEC (1 << 2) /* Chip Select Decode */ -#define AT91_SPI_DIV32 (1 << 3) /* Clock Selection [AT91RM9200 only] */ -#define AT91_SPI_MODFDIS (1 << 4) /* Mode Fault Detection */ -#define AT91_SPI_LLB (1 << 7) /* Local Loopback Enable */ -#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ -#define AT91_SPI_DLYBCS (0xff << 24) /* Delay Between Chip Selects */ - -#define AT91_SPI_RDR 0x08 /* Receive Data Register */ -#define AT91_SPI_RD (0xffff << 0) /* Receive Data */ -#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ - -#define AT91_SPI_TDR 0x0c /* Transmit Data Register */ -#define AT91_SPI_TD (0xffff << 0) /* Transmit Data */ -#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ -#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ - -#define AT91_SPI_SR 0x10 /* Status Register */ -#define AT91_SPI_RDRF (1 << 0) /* Receive Data Register Full */ -#define AT91_SPI_TDRE (1 << 1) /* Transmit Data Register Full */ -#define AT91_SPI_MODF (1 << 2) /* Mode Fault Error */ -#define AT91_SPI_OVRES (1 << 3) /* Overrun Error Status */ -#define AT91_SPI_ENDRX (1 << 4) /* End of RX buffer */ -#define AT91_SPI_ENDTX (1 << 5) /* End of TX buffer */ -#define AT91_SPI_RXBUFF (1 << 6) /* RX Buffer Full */ -#define AT91_SPI_TXBUFE (1 << 7) /* TX Buffer Empty */ -#define AT91_SPI_NSSR (1 << 8) /* NSS Rising [SAM9261 only] */ -#define AT91_SPI_TXEMPTY (1 << 9) /* Transmission Register Empty [SAM9261 only] */ -#define AT91_SPI_SPIENS (1 << 16) /* SPI Enable Status */ - -#define AT91_SPI_IER 0x14 /* Interrupt Enable Register */ -#define AT91_SPI_IDR 0x18 /* Interrupt Disable Register */ -#define AT91_SPI_IMR 0x1c /* Interrupt Mask Register */ - -#define AT91_SPI_CSR(n) (0x30 + ((n) * 4)) /* Chip Select Registers 0-3 */ -#define AT91_SPI_CPOL (1 << 0) /* Clock Polarity */ -#define AT91_SPI_NCPHA (1 << 1) /* Clock Phase */ -#define AT91_SPI_CSAAT (1 << 3) /* Chip Select Active After Transfer [SAM9261 only] */ -#define AT91_SPI_BITS (0xf << 4) /* Bits Per Transfer */ -#define AT91_SPI_BITS_8 (0 << 4) -#define AT91_SPI_BITS_9 (1 << 4) -#define AT91_SPI_BITS_10 (2 << 4) -#define AT91_SPI_BITS_11 (3 << 4) -#define AT91_SPI_BITS_12 (4 << 4) -#define AT91_SPI_BITS_13 (5 << 4) -#define AT91_SPI_BITS_14 (6 << 4) -#define AT91_SPI_BITS_15 (7 << 4) -#define AT91_SPI_BITS_16 (8 << 4) -#define AT91_SPI_SCBR (0xff << 8) /* Serial Clock Baud Rate */ -#define AT91_SPI_DLYBS (0xff << 16) /* Delay before SPCK */ -#define AT91_SPI_DLYBCT (0xff << 24) /* Delay between Consecutive Transfers */ - -#endif diff --git a/arch/arm/mach-at91/include/mach/at91_ssc.h b/arch/arm/mach-at91/include/mach/at91_ssc.h deleted file mode 100644 index a81114c11c74..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_ssc.h +++ /dev/null @@ -1,106 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91_ssc.h - * - * Copyright (C) SAN People - * - * Serial Synchronous Controller (SSC) registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_SSC_H -#define AT91_SSC_H - -#define AT91_SSC_CR 0x00 /* Control Register */ -#define AT91_SSC_RXEN (1 << 0) /* Receive Enable */ -#define AT91_SSC_RXDIS (1 << 1) /* Receive Disable */ -#define AT91_SSC_TXEN (1 << 8) /* Transmit Enable */ -#define AT91_SSC_TXDIS (1 << 9) /* Transmit Disable */ -#define AT91_SSC_SWRST (1 << 15) /* Software Reset */ - -#define AT91_SSC_CMR 0x04 /* Clock Mode Register */ -#define AT91_SSC_CMR_DIV (0xfff << 0) /* Clock Divider */ - -#define AT91_SSC_RCMR 0x10 /* Receive Clock Mode Register */ -#define AT91_SSC_CKS (3 << 0) /* Clock Selection */ -#define AT91_SSC_CKS_DIV (0 << 0) -#define AT91_SSC_CKS_CLOCK (1 << 0) -#define AT91_SSC_CKS_PIN (2 << 0) -#define AT91_SSC_CKO (7 << 2) /* Clock Output Mode Selection */ -#define AT91_SSC_CKO_NONE (0 << 2) -#define AT91_SSC_CKO_CONTINUOUS (1 << 2) -#define AT91_SSC_CKI (1 << 5) /* Clock Inversion */ -#define AT91_SSC_CKI_FALLING (0 << 5) -#define AT91_SSC_CK_RISING (1 << 5) -#define AT91_SSC_CKG (1 << 6) /* Receive Clock Gating Selection [AT91SAM9261 only] */ -#define AT91_SSC_CKG_NONE (0 << 6) -#define AT91_SSC_CKG_RFLOW (1 << 6) -#define AT91_SSC_CKG_RFHIGH (2 << 6) -#define AT91_SSC_START (0xf << 8) /* Start Selection */ -#define AT91_SSC_START_CONTINUOUS (0 << 8) -#define AT91_SSC_START_TX_RX (1 << 8) -#define AT91_SSC_START_LOW_RF (2 << 8) -#define AT91_SSC_START_HIGH_RF (3 << 8) -#define AT91_SSC_START_FALLING_RF (4 << 8) -#define AT91_SSC_START_RISING_RF (5 << 8) -#define AT91_SSC_START_LEVEL_RF (6 << 8) -#define AT91_SSC_START_EDGE_RF (7 << 8) -#define AT91_SSC_STOP (1 << 12) /* Receive Stop Selection [AT91SAM9261 only] */ -#define AT91_SSC_STTDLY (0xff << 16) /* Start Delay */ -#define AT91_SSC_PERIOD (0xff << 24) /* Period Divider Selection */ - -#define AT91_SSC_RFMR 0x14 /* Receive Frame Mode Register */ -#define AT91_SSC_DATALEN (0x1f << 0) /* Data Length */ -#define AT91_SSC_LOOP (1 << 5) /* Loop Mode */ -#define AT91_SSC_MSBF (1 << 7) /* Most Significant Bit First */ -#define AT91_SSC_DATNB (0xf << 8) /* Data Number per Frame */ -#define AT91_SSC_FSLEN (0xf << 16) /* Frame Sync Length */ -#define AT91_SSC_FSOS (7 << 20) /* Frame Sync Output Selection */ -#define AT91_SSC_FSOS_NONE (0 << 20) -#define AT91_SSC_FSOS_NEGATIVE (1 << 20) -#define AT91_SSC_FSOS_POSITIVE (2 << 20) -#define AT91_SSC_FSOS_LOW (3 << 20) -#define AT91_SSC_FSOS_HIGH (4 << 20) -#define AT91_SSC_FSOS_TOGGLE (5 << 20) -#define AT91_SSC_FSEDGE (1 << 24) /* Frame Sync Edge Detection */ -#define AT91_SSC_FSEDGE_POSITIVE (0 << 24) -#define AT91_SSC_FSEDGE_NEGATIVE (1 << 24) - -#define AT91_SSC_TCMR 0x18 /* Transmit Clock Mode Register */ -#define AT91_SSC_TFMR 0x1c /* Transmit Fram Mode Register */ -#define AT91_SSC_DATDEF (1 << 5) /* Data Default Value */ -#define AT91_SSC_FSDEN (1 << 23) /* Frame Sync Data Enable */ - -#define AT91_SSC_RHR 0x20 /* Receive Holding Register */ -#define AT91_SSC_THR 0x24 /* Transmit Holding Register */ -#define AT91_SSC_RSHR 0x30 /* Receive Sync Holding Register */ -#define AT91_SSC_TSHR 0x34 /* Transmit Sync Holding Register */ - -#define AT91_SSC_RC0R 0x38 /* Receive Compare 0 Register [AT91SAM9261 only] */ -#define AT91_SSC_RC1R 0x3c /* Receive Compare 1 Register [AT91SAM9261 only] */ - -#define AT91_SSC_SR 0x40 /* Status Register */ -#define AT91_SSC_TXRDY (1 << 0) /* Transmit Ready */ -#define AT91_SSC_TXEMPTY (1 << 1) /* Transmit Empty */ -#define AT91_SSC_ENDTX (1 << 2) /* End of Transmission */ -#define AT91_SSC_TXBUFE (1 << 3) /* Transmit Buffer Empty */ -#define AT91_SSC_RXRDY (1 << 4) /* Receive Ready */ -#define AT91_SSC_OVRUN (1 << 5) /* Receive Overrun */ -#define AT91_SSC_ENDRX (1 << 6) /* End of Reception */ -#define AT91_SSC_RXBUFF (1 << 7) /* Receive Buffer Full */ -#define AT91_SSC_CP0 (1 << 8) /* Compare 0 [AT91SAM9261 only] */ -#define AT91_SSC_CP1 (1 << 9) /* Compare 1 [AT91SAM9261 only] */ -#define AT91_SSC_TXSYN (1 << 10) /* Transmit Sync */ -#define AT91_SSC_RXSYN (1 << 11) /* Receive Sync */ -#define AT91_SSC_TXENA (1 << 16) /* Transmit Enable */ -#define AT91_SSC_RXENA (1 << 17) /* Receive Enable */ - -#define AT91_SSC_IER 0x44 /* Interrupt Enable Register */ -#define AT91_SSC_IDR 0x48 /* Interrupt Disable Register */ -#define AT91_SSC_IMR 0x4c /* Interrupt Mask Register */ - -#endif diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S deleted file mode 100644 index 903bf205a333..000000000000 --- a/arch/arm/mach-at91/include/mach/entry-macro.S +++ /dev/null @@ -1,27 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/entry-macro.S - * - * Copyright (C) 2003-2005 SAN People - * - * Low-level IRQ helper macros for AT91RM9200 platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <mach/hardware.h> -#include <mach/at91_aic.h> - - .macro get_irqnr_preamble, base, tmp - ldr \base, =at91_aic_base @ base virtual address of AIC peripheral - ldr \base, [\base] - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) - ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number - teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt - streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now. - .endm - diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h deleted file mode 100644 index ac8b7dfc85ef..000000000000 --- a/arch/arm/mach-at91/include/mach/irqs.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/irqs.h - * - * Copyright (C) 2004 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -#include <linux/io.h> -#include <mach/at91_aic.h> - -#define NR_AIC_IRQS 32 - - -/* - * Acknowledge interrupt with AIC after interrupt has been handled. - * (by kernel/irq.c) - */ -#define irq_finish(irq) do { at91_aic_write(AT91_AIC_EOICR, 0); } while (0) - - -/* - * IRQ interrupt symbols are the AT91xxx_ID_* symbols - * for IRQs handled directly through the AIC, or else the AT91_PIN_* - * symbols in gpio.h for ones handled indirectly as GPIOs. - * We make provision for 5 banks of GPIO. - */ -#define NR_IRQS (NR_AIC_IRQS + (5 * 32)) - -/* FIQ is AIC source 0. */ -#define FIQ_START AT91_ID_FIQ - -#endif diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c index cfcfcbe36269..1e02c0e49dcc 100644 --- a/arch/arm/mach-at91/irq.c +++ b/arch/arm/mach-at91/irq.c @@ -23,6 +23,7 @@ #include <linux/init.h> #include <linux/module.h> #include <linux/mm.h> +#include <linux/bitmap.h> #include <linux/types.h> #include <linux/irq.h> #include <linux/of.h> @@ -30,38 +31,218 @@ #include <linux/of_irq.h> #include <linux/irqdomain.h> #include <linux/err.h> +#include <linux/slab.h> #include <mach/hardware.h> #include <asm/irq.h> #include <asm/setup.h> +#include <asm/exception.h> #include <asm/mach/arch.h> #include <asm/mach/irq.h> #include <asm/mach/map.h> +#include <mach/at91_aic.h> + void __iomem *at91_aic_base; static struct irq_domain *at91_aic_domain; static struct device_node *at91_aic_np; +static unsigned int n_irqs = NR_AIC_IRQS; +static unsigned long at91_aic_caps = 0; + +/* AIC5 introduces a Source Select Register */ +#define AT91_AIC_CAP_AIC5 (1 << 0) +#define has_aic5() (at91_aic_caps & AT91_AIC_CAP_AIC5) + +#ifdef CONFIG_PM + +static unsigned long *wakeups; +static unsigned long *backups; + +#define set_backup(bit) set_bit(bit, backups) +#define clear_backup(bit) clear_bit(bit, backups) + +static int at91_aic_pm_init(void) +{ + backups = kzalloc(BITS_TO_LONGS(n_irqs) * sizeof(*backups), GFP_KERNEL); + if (!backups) + return -ENOMEM; + + wakeups = kzalloc(BITS_TO_LONGS(n_irqs) * sizeof(*backups), GFP_KERNEL); + if (!wakeups) { + kfree(backups); + return -ENOMEM; + } + + return 0; +} + +static int at91_aic_set_wake(struct irq_data *d, unsigned value) +{ + if (unlikely(d->hwirq >= n_irqs)) + return -EINVAL; + + if (value) + set_bit(d->hwirq, wakeups); + else + clear_bit(d->hwirq, wakeups); + + return 0; +} + +void at91_irq_suspend(void) +{ + int i = 0, bit; + + if (has_aic5()) { + /* disable enabled irqs */ + while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) { + at91_aic_write(AT91_AIC5_SSR, + bit & AT91_AIC5_INTSEL_MSK); + at91_aic_write(AT91_AIC5_IDCR, 1); + i = bit; + } + /* enable wakeup irqs */ + i = 0; + while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) { + at91_aic_write(AT91_AIC5_SSR, + bit & AT91_AIC5_INTSEL_MSK); + at91_aic_write(AT91_AIC5_IECR, 1); + i = bit; + } + } else { + at91_aic_write(AT91_AIC_IDCR, *backups); + at91_aic_write(AT91_AIC_IECR, *wakeups); + } +} + +void at91_irq_resume(void) +{ + int i = 0, bit; + + if (has_aic5()) { + /* disable wakeup irqs */ + while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) { + at91_aic_write(AT91_AIC5_SSR, + bit & AT91_AIC5_INTSEL_MSK); + at91_aic_write(AT91_AIC5_IDCR, 1); + i = bit; + } + /* enable irqs disabled for suspend */ + i = 0; + while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) { + at91_aic_write(AT91_AIC5_SSR, + bit & AT91_AIC5_INTSEL_MSK); + at91_aic_write(AT91_AIC5_IECR, 1); + i = bit; + } + } else { + at91_aic_write(AT91_AIC_IDCR, *wakeups); + at91_aic_write(AT91_AIC_IECR, *backups); + } +} + +#else +static inline int at91_aic_pm_init(void) +{ + return 0; +} + +#define set_backup(bit) +#define clear_backup(bit) +#define at91_aic_set_wake NULL + +#endif /* CONFIG_PM */ + +asmlinkage void __exception_irq_entry +at91_aic_handle_irq(struct pt_regs *regs) +{ + u32 irqnr; + u32 irqstat; + + irqnr = at91_aic_read(AT91_AIC_IVR); + irqstat = at91_aic_read(AT91_AIC_ISR); + + /* + * ISR value is 0 when there is no current interrupt or when there is + * a spurious interrupt + */ + if (!irqstat) + at91_aic_write(AT91_AIC_EOICR, 0); + else + handle_IRQ(irqnr, regs); +} + +asmlinkage void __exception_irq_entry +at91_aic5_handle_irq(struct pt_regs *regs) +{ + u32 irqnr; + u32 irqstat; + + irqnr = at91_aic_read(AT91_AIC5_IVR); + irqstat = at91_aic_read(AT91_AIC5_ISR); + + if (!irqstat) + at91_aic_write(AT91_AIC5_EOICR, 0); + else + handle_IRQ(irqnr, regs); +} static void at91_aic_mask_irq(struct irq_data *d) { /* Disable interrupt on AIC */ at91_aic_write(AT91_AIC_IDCR, 1 << d->hwirq); + /* Update ISR cache */ + clear_backup(d->hwirq); +} + +static void __maybe_unused at91_aic5_mask_irq(struct irq_data *d) +{ + /* Disable interrupt on AIC5 */ + at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK); + at91_aic_write(AT91_AIC5_IDCR, 1); + /* Update ISR cache */ + clear_backup(d->hwirq); } static void at91_aic_unmask_irq(struct irq_data *d) { /* Enable interrupt on AIC */ at91_aic_write(AT91_AIC_IECR, 1 << d->hwirq); + /* Update ISR cache */ + set_backup(d->hwirq); +} + +static void __maybe_unused at91_aic5_unmask_irq(struct irq_data *d) +{ + /* Enable interrupt on AIC5 */ + at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK); + at91_aic_write(AT91_AIC5_IECR, 1); + /* Update ISR cache */ + set_backup(d->hwirq); } -unsigned int at91_extern_irq; +static void at91_aic_eoi(struct irq_data *d) +{ + /* + * Mark end-of-interrupt on AIC, the controller doesn't care about + * the value written. Moreover it's a write-only register. + */ + at91_aic_write(AT91_AIC_EOICR, 0); +} + +static void __maybe_unused at91_aic5_eoi(struct irq_data *d) +{ + at91_aic_write(AT91_AIC5_EOICR, 0); +} -#define is_extern_irq(hwirq) ((1 << (hwirq)) & at91_extern_irq) +unsigned long *at91_extern_irq; -static int at91_aic_set_type(struct irq_data *d, unsigned type) +#define is_extern_irq(hwirq) test_bit(hwirq, at91_extern_irq) + +static int at91_aic_compute_srctype(struct irq_data *d, unsigned type) { - unsigned int smr, srctype; + int srctype; switch (type) { case IRQ_TYPE_LEVEL_HIGH: @@ -74,65 +255,51 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type) if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */ srctype = AT91_AIC_SRCTYPE_LOW; else - return -EINVAL; + srctype = -EINVAL; break; case IRQ_TYPE_EDGE_FALLING: if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */ srctype = AT91_AIC_SRCTYPE_FALLING; else - return -EINVAL; + srctype = -EINVAL; break; default: - return -EINVAL; + srctype = -EINVAL; } - smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) & ~AT91_AIC_SRCTYPE; - at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype); - return 0; + return srctype; } -#ifdef CONFIG_PM - -static u32 wakeups; -static u32 backups; - -static int at91_aic_set_wake(struct irq_data *d, unsigned value) +static int at91_aic_set_type(struct irq_data *d, unsigned type) { - if (unlikely(d->hwirq >= NR_AIC_IRQS)) - return -EINVAL; - - if (value) - wakeups |= (1 << d->hwirq); - else - wakeups &= ~(1 << d->hwirq); + unsigned int smr; + int srctype; + + srctype = at91_aic_compute_srctype(d, type); + if (srctype < 0) + return srctype; + + if (has_aic5()) { + at91_aic_write(AT91_AIC5_SSR, + d->hwirq & AT91_AIC5_INTSEL_MSK); + smr = at91_aic_read(AT91_AIC5_SMR) & ~AT91_AIC_SRCTYPE; + at91_aic_write(AT91_AIC5_SMR, smr | srctype); + } else { + smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) + & ~AT91_AIC_SRCTYPE; + at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype); + } return 0; } -void at91_irq_suspend(void) -{ - backups = at91_aic_read(AT91_AIC_IMR); - at91_aic_write(AT91_AIC_IDCR, backups); - at91_aic_write(AT91_AIC_IECR, wakeups); -} - -void at91_irq_resume(void) -{ - at91_aic_write(AT91_AIC_IDCR, wakeups); - at91_aic_write(AT91_AIC_IECR, backups); -} - -#else -#define at91_aic_set_wake NULL -#endif - static struct irq_chip at91_aic_chip = { .name = "AIC", - .irq_ack = at91_aic_mask_irq, .irq_mask = at91_aic_mask_irq, .irq_unmask = at91_aic_unmask_irq, .irq_set_type = at91_aic_set_type, .irq_set_wake = at91_aic_set_wake, + .irq_eoi = at91_aic_eoi, }; static void __init at91_aic_hw_init(unsigned int spu_vector) @@ -161,41 +328,172 @@ static void __init at91_aic_hw_init(unsigned int spu_vector) at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF); } +static void __init __maybe_unused at91_aic5_hw_init(unsigned int spu_vector) +{ + int i; + + /* + * Perform 8 End Of Interrupt Command to make sure AIC + * will not Lock out nIRQ + */ + for (i = 0; i < 8; i++) + at91_aic_write(AT91_AIC5_EOICR, 0); + + /* + * Spurious Interrupt ID in Spurious Vector Register. + * When there is no current interrupt, the IRQ Vector Register + * reads the value stored in AIC_SPU + */ + at91_aic_write(AT91_AIC5_SPU, spu_vector); + + /* No debugging in AIC: Debug (Protect) Control Register */ + at91_aic_write(AT91_AIC5_DCR, 0); + + /* Disable and clear all interrupts initially */ + for (i = 0; i < n_irqs; i++) { + at91_aic_write(AT91_AIC5_SSR, i & AT91_AIC5_INTSEL_MSK); + at91_aic_write(AT91_AIC5_IDCR, 1); + at91_aic_write(AT91_AIC5_ICCR, 1); + } +} + #if defined(CONFIG_OF) +static unsigned int *at91_aic_irq_priorities; + static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, irq_hw_number_t hw) { /* Put virq number in Source Vector Register */ at91_aic_write(AT91_AIC_SVR(hw), virq); - /* Active Low interrupt, without priority */ - at91_aic_write(AT91_AIC_SMR(hw), AT91_AIC_SRCTYPE_LOW); + /* Active Low interrupt, with priority */ + at91_aic_write(AT91_AIC_SMR(hw), + AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]); - irq_set_chip_and_handler(virq, &at91_aic_chip, handle_level_irq); + irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq); set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); return 0; } +static int at91_aic5_irq_map(struct irq_domain *h, unsigned int virq, + irq_hw_number_t hw) +{ + at91_aic_write(AT91_AIC5_SSR, hw & AT91_AIC5_INTSEL_MSK); + + /* Put virq number in Source Vector Register */ + at91_aic_write(AT91_AIC5_SVR, virq); + + /* Active Low interrupt, with priority */ + at91_aic_write(AT91_AIC5_SMR, + AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]); + + irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq); + set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); + + return 0; +} + +static int at91_aic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr, + const u32 *intspec, unsigned int intsize, + irq_hw_number_t *out_hwirq, unsigned int *out_type) +{ + if (WARN_ON(intsize < 3)) + return -EINVAL; + if (WARN_ON(intspec[0] >= n_irqs)) + return -EINVAL; + if (WARN_ON((intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY) + || (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY))) + return -EINVAL; + + *out_hwirq = intspec[0]; + *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK; + at91_aic_irq_priorities[*out_hwirq] = intspec[2]; + + return 0; +} + static struct irq_domain_ops at91_aic_irq_ops = { .map = at91_aic_irq_map, - .xlate = irq_domain_xlate_twocell, + .xlate = at91_aic_irq_domain_xlate, }; -int __init at91_aic_of_init(struct device_node *node, - struct device_node *parent) +int __init at91_aic_of_common_init(struct device_node *node, + struct device_node *parent) { + struct property *prop; + const __be32 *p; + u32 val; + + at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs) + * sizeof(*at91_extern_irq), GFP_KERNEL); + if (!at91_extern_irq) + return -ENOMEM; + + if (at91_aic_pm_init()) { + kfree(at91_extern_irq); + return -ENOMEM; + } + + at91_aic_irq_priorities = kzalloc(n_irqs + * sizeof(*at91_aic_irq_priorities), + GFP_KERNEL); + if (!at91_aic_irq_priorities) + return -ENOMEM; + at91_aic_base = of_iomap(node, 0); at91_aic_np = node; - at91_aic_domain = irq_domain_add_linear(at91_aic_np, NR_AIC_IRQS, + at91_aic_domain = irq_domain_add_linear(at91_aic_np, n_irqs, &at91_aic_irq_ops, NULL); if (!at91_aic_domain) panic("Unable to add AIC irq domain (DT)\n"); + of_property_for_each_u32(node, "atmel,external-irqs", prop, p, val) { + if (val >= n_irqs) + pr_warn("AIC: external irq %d >= %d skip it\n", + val, n_irqs); + else + set_bit(val, at91_extern_irq); + } + irq_set_default_host(at91_aic_domain); - at91_aic_hw_init(NR_AIC_IRQS); + return 0; +} + +int __init at91_aic_of_init(struct device_node *node, + struct device_node *parent) +{ + int err; + + err = at91_aic_of_common_init(node, parent); + if (err) + return err; + + at91_aic_hw_init(n_irqs); + + return 0; +} + +int __init at91_aic5_of_init(struct device_node *node, + struct device_node *parent) +{ + int err; + + at91_aic_caps |= AT91_AIC_CAP_AIC5; + n_irqs = NR_AIC5_IRQS; + at91_aic_chip.irq_ack = at91_aic5_mask_irq; + at91_aic_chip.irq_mask = at91_aic5_mask_irq; + at91_aic_chip.irq_unmask = at91_aic5_unmask_irq; + at91_aic_chip.irq_eoi = at91_aic5_eoi; + at91_aic_irq_ops.map = at91_aic5_irq_map; + + err = at91_aic_of_common_init(node, parent); + if (err) + return err; + + at91_aic5_hw_init(n_irqs); return 0; } @@ -204,22 +502,25 @@ int __init at91_aic_of_init(struct device_node *node, /* * Initialize the AIC interrupt controller. */ -void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) +void __init at91_aic_init(unsigned int *priority) { unsigned int i; int irq_base; + if (at91_aic_pm_init()) + panic("Unable to allocate bit maps\n"); + at91_aic_base = ioremap(AT91_AIC, 512); if (!at91_aic_base) panic("Unable to ioremap AIC registers\n"); /* Add irq domain for AIC */ - irq_base = irq_alloc_descs(-1, 0, NR_AIC_IRQS, 0); + irq_base = irq_alloc_descs(-1, 0, n_irqs, 0); if (irq_base < 0) { WARN(1, "Cannot allocate irq_descs, assuming pre-allocated\n"); irq_base = 0; } - at91_aic_domain = irq_domain_add_legacy(at91_aic_np, NR_AIC_IRQS, + at91_aic_domain = irq_domain_add_legacy(at91_aic_np, n_irqs, irq_base, 0, &irq_domain_simple_ops, NULL); @@ -232,15 +533,14 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) * The IVR is used by macro get_irqnr_and_base to read and verify. * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. */ - for (i = 0; i < NR_AIC_IRQS; i++) { + for (i = 0; i < n_irqs; i++) { /* Put hardware irq number in Source Vector Register: */ - at91_aic_write(AT91_AIC_SVR(i), i); + at91_aic_write(AT91_AIC_SVR(i), NR_IRQS_LEGACY + i); /* Active Low interrupt, with the specified priority */ at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); - - irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq); + irq_set_chip_and_handler(NR_IRQS_LEGACY + i, &at91_aic_chip, handle_fasteoi_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } - at91_aic_hw_init(NR_AIC_IRQS); + at91_aic_hw_init(n_irqs); } diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 1bfaad628731..2c2d86505a54 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -25,6 +25,7 @@ #include <asm/mach/time.h> #include <asm/mach/irq.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/cpu.h> |