diff options
| -rw-r--r-- | arch/mips/include/asm/mach-loongson32/loongson1.h | 7 | ||||
| -rw-r--r-- | arch/mips/include/asm/mach-loongson32/regs-rtc.h | 23 | ||||
| -rw-r--r-- | arch/mips/loongson32/common/platform.c | 27 |
3 files changed, 38 insertions, 19 deletions
diff --git a/arch/mips/include/asm/mach-loongson32/loongson1.h b/arch/mips/include/asm/mach-loongson32/loongson1.h index ec7efd0de744..84c28a8995ae 100644 --- a/arch/mips/include/asm/mach-loongson32/loongson1.h +++ b/arch/mips/include/asm/mach-loongson32/loongson1.h @@ -3,9 +3,9 @@ * * Register mappings for Loongson 1 * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ @@ -52,6 +52,7 @@ #include <regs-clk.h> #include <regs-mux.h> #include <regs-pwm.h> +#include <regs-rtc.h> #include <regs-wdt.h> #endif /* __ASM_MACH_LOONGSON32_LOONGSON1_H */ diff --git a/arch/mips/include/asm/mach-loongson32/regs-rtc.h b/arch/mips/include/asm/mach-loongson32/regs-rtc.h new file mode 100644 index 000000000000..e67fda24cf6f --- /dev/null +++ b/arch/mips/include/asm/mach-loongson32/regs-rtc.h @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2016 Yang Ling <gnaygnil@gmail.com> + * + * Loongson 1 RTC timer Register Definitions. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __ASM_MACH_LOONGSON32_REGS_RTC_H +#define __ASM_MACH_LOONGSON32_REGS_RTC_H + +#define LS1X_RTC_REG(x) \ + ((void __iomem *)KSEG1ADDR(LS1X_RTC_BASE + (x))) + +#define LS1X_RTC_CTRL LS1X_RTC_REG(0x40) + +#define RTC_EXTCLK_OK (BIT(5) | BIT(8)) +#define RTC_EXTCLK_EN BIT(8) + +#endif /* __ASM_MACH_LOONGSON32_REGS_RTC_H */ diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c index beff0852c6a4..18c2959afe07 100644 --- a/arch/mips/loongson32/common/platform.c +++ b/arch/mips/loongson32/common/platform.c @@ -1,9 +1,9 @@ /* * Copyright (c) 2011-2016 Zhang, Keguang <keguang.zhang@gmail.com> * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ @@ -23,10 +23,6 @@ #include <dma.h> #include <nand.h> -#define LS1X_RTC_CTRL ((void __iomem *)KSEG1ADDR(LS1X_RTC_BASE + 0x40)) -#define RTC_EXTCLK_OK (BIT(5) | BIT(8)) -#define RTC_EXTCLK_EN BIT(8) - /* 8250/16550 compatible UART */ #define LS1X_UART(_id) \ { \ @@ -70,15 +66,6 @@ void __init ls1x_serial_set_uartclk(struct platform_device *pdev) p->uartclk = clk_get_rate(clk); } -void __init ls1x_rtc_set_extclk(struct platform_device *pdev) -{ - u32 val; - - val = __raw_readl(LS1X_RTC_CTRL); - if (!(val & RTC_EXTCLK_OK)) - __raw_writel(val | RTC_EXTCLK_EN, LS1X_RTC_CTRL); -} - /* CPUFreq */ static struct plat_ls1x_cpufreq ls1x_cpufreq_pdata = { .clk_name = "cpu_clk", @@ -357,6 +344,14 @@ struct platform_device ls1x_ehci_pdev = { }; /* Real Time Clock */ +void __init ls1x_rtc_set_extclk(struct platform_device *pdev) +{ + u32 val = __raw_readl(LS1X_RTC_CTRL); + + if (!(val & RTC_EXTCLK_OK)) + __raw_writel(val | RTC_EXTCLK_EN, LS1X_RTC_CTRL); +} + struct platform_device ls1x_rtc_pdev = { .name = "ls1x-rtc", .id = -1, |