diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-06-26 11:54:29 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-06-26 11:54:29 -0700 |
commit | f5dcb68086ba2e033b2af32b0da0c7a7c7872a09 (patch) | |
tree | 89c41089b492f8d8d411185bd7cb07538802e837 /include | |
parent | 3d9f96d850e4bbfae24dc9aee03033dd77c81596 (diff) | |
parent | 4af34b572a85c44c55491a10693535a79627c478 (diff) |
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Kevin Hilman:
"Some of these are for drivers/soc, where we're now putting
SoC-specific drivers these days. Some are for other driver subsystems
where we have received acks from the appropriate maintainers.
Some highlights:
- simple-mfd: document DT bindings and misc updates
- migrate mach-berlin to simple-mfd for clock, pinctrl and reset
- memory: support for Tegra132 SoC
- memory: introduce tegra EMC driver for scaling memory frequency
- misc. updates for ARM CCI and CCN busses"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits)
drivers: soc: sunxi: Introduce SoC driver to map SRAMs
arm-cci: Add aliases for PMU events
arm-cci: Add CCI-500 PMU support
arm-cci: Sanitise CCI400 PMU driver specific code
arm-cci: Abstract handling for CCI events
arm-cci: Abstract out the PMU counter details
arm-cci: Cleanup PMU driver code
arm-cci: Do not enable CCI-400 PMU by default
firmware: qcom: scm: Add HDCP Support
ARM: berlin: add an ADC node for the BG2Q
ARM: berlin: remove useless chip and system ctrl compatibles
clk: berlin: drop direct of_iomap of nodes reg property
ARM: berlin: move BG2Q clock node
ARM: berlin: move BG2CD clock node
ARM: berlin: move BG2 clock node
clk: berlin: prepare simple-mfd conversion
pinctrl: berlin: drop SoC stub provided regmap
ARM: berlin: move pinctrl to simple-mfd nodes
pinctrl: berlin: prepare to use regmap provided by syscon
reset: berlin: drop arch_initcall initialization
...
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/qcom_scm.h | 13 | ||||
-rw-r--r-- | include/linux/soc/sunxi/sunxi_sram.h | 19 | ||||
-rw-r--r-- | include/soc/tegra/emc.h | 19 | ||||
-rw-r--r-- | include/soc/tegra/fuse.h | 1 | ||||
-rw-r--r-- | include/soc/tegra/mc.h | 20 |
5 files changed, 70 insertions, 2 deletions
diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h index d7a974d5f57c..6e7d5ec65838 100644 --- a/include/linux/qcom_scm.h +++ b/include/linux/qcom_scm.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved. +/* Copyright (c) 2010-2015, The Linux Foundation. All rights reserved. * Copyright (C) 2015 Linaro Ltd. * * This program is free software; you can redistribute it and/or modify @@ -16,6 +16,17 @@ extern int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus); extern int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus); +#define QCOM_SCM_HDCP_MAX_REQ_CNT 5 + +struct qcom_scm_hdcp_req { + u32 addr; + u32 val; +}; + +extern bool qcom_scm_hdcp_available(void); +extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, + u32 *resp); + #define QCOM_SCM_CPU_PWR_DOWN_L2_ON 0x0 #define QCOM_SCM_CPU_PWR_DOWN_L2_OFF 0x1 diff --git a/include/linux/soc/sunxi/sunxi_sram.h b/include/linux/soc/sunxi/sunxi_sram.h new file mode 100644 index 000000000000..c5f663bba9c2 --- /dev/null +++ b/include/linux/soc/sunxi/sunxi_sram.h @@ -0,0 +1,19 @@ +/* + * Allwinner SoCs SRAM Controller Driver + * + * Copyright (C) 2015 Maxime Ripard + * + * Author: Maxime Ripard <maxime.ripard@free-electrons.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef _SUNXI_SRAM_H_ +#define _SUNXI_SRAM_H_ + +int sunxi_sram_claim(struct device *dev); +int sunxi_sram_release(struct device *dev); + +#endif /* _SUNXI_SRAM_H_ */ diff --git a/include/soc/tegra/emc.h b/include/soc/tegra/emc.h new file mode 100644 index 000000000000..f6db33b579ec --- /dev/null +++ b/include/soc/tegra/emc.h @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2014 NVIDIA Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __SOC_TEGRA_EMC_H__ +#define __SOC_TEGRA_EMC_H__ + +struct tegra_emc; + +int tegra_emc_prepare_timing_change(struct tegra_emc *emc, + unsigned long rate); +void tegra_emc_complete_timing_change(struct tegra_emc *emc, + unsigned long rate); + +#endif /* __SOC_TEGRA_EMC_H__ */ diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h index b5f7b5f8d008..b019e3465f11 100644 --- a/include/soc/tegra/fuse.h +++ b/include/soc/tegra/fuse.h @@ -56,6 +56,7 @@ struct tegra_sku_info { }; u32 tegra_read_straps(void); +u32 tegra_read_ram_code(void); u32 tegra_read_chipid(void); int tegra_fuse_readl(unsigned long offset, u32 *value); diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h index 63deb8d9f82a..1ab2813273cd 100644 --- a/include/soc/tegra/mc.h +++ b/include/soc/tegra/mc.h @@ -20,6 +20,12 @@ struct tegra_smmu_enable { unsigned int bit; }; +struct tegra_mc_timing { + unsigned long rate; + + u32 *emem_data; +}; + /* latency allowance */ struct tegra_mc_la { unsigned int reg; @@ -40,6 +46,7 @@ struct tegra_mc_client { }; struct tegra_smmu_swgroup { + const char *name; unsigned int swgroup; unsigned int reg; }; @@ -71,6 +78,7 @@ struct tegra_smmu; struct tegra_smmu *tegra_smmu_probe(struct device *dev, const struct tegra_smmu_soc *soc, struct tegra_mc *mc); +void tegra_smmu_remove(struct tegra_smmu *smmu); #else static inline struct tegra_smmu * tegra_smmu_probe(struct device *dev, const struct tegra_smmu_soc *soc, @@ -78,13 +86,17 @@ tegra_smmu_probe(struct device *dev, const struct tegra_smmu_soc *soc, { return NULL; } + +static inline void tegra_smmu_remove(struct tegra_smmu *smmu) +{ +} #endif struct tegra_mc_soc { const struct tegra_mc_client *clients; unsigned int num_clients; - const unsigned int *emem_regs; + const unsigned long *emem_regs; unsigned int num_emem_regs; unsigned int num_address_bits; @@ -102,6 +114,12 @@ struct tegra_mc { const struct tegra_mc_soc *soc; unsigned long tick; + + struct tegra_mc_timing *timings; + unsigned int num_timings; }; +void tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate); +unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc); + #endif /* __SOC_TEGRA_MC_H__ */ |