diff options
| author | Yevgeny Kliteynik <kliteyn@nvidia.com> | 2020-11-02 23:57:13 +0200 |
|---|---|---|
| committer | Saeed Mahameed <saeedm@nvidia.com> | 2021-04-19 20:17:43 -0700 |
| commit | 7304d603a57a1edecfecfbcc26f85edcda4cae81 (patch) | |
| tree | 84815bb6b7b198cd4db60ae1387b541e39226aab /include/linux/mlx5 | |
| parent | df9dd15ae118e4c95fba6fe2d870ae23a99c3de2 (diff) | |
net/mlx5: DR, Add support for force-loopback QP
When supported by the device, SW steering RoCE RC QP that is used to
write/read to/from ICM will be created with force-loopback attribute.
Such QP doesn't require GID index upon creation.
Signed-off-by: Erez Shitrit <erezsh@mellanox.com>
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'include/linux/mlx5')
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index aa6effe1dd6d..4d9569c4b96c 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -961,7 +961,9 @@ struct mlx5_ifc_roce_cap_bits { u8 roce_apm[0x1]; u8 reserved_at_1[0x3]; u8 sw_r_roce_src_udp_port[0x1]; - u8 reserved_at_5[0x19]; + u8 fl_rc_qp_when_roce_disabled[0x1]; + u8 fl_rc_qp_when_roce_enabled[0x1]; + u8 reserved_at_7[0x17]; u8 qp_ts_format[0x2]; u8 reserved_at_20[0x60]; @@ -2942,7 +2944,8 @@ struct mlx5_ifc_qpc_bits { u8 state[0x4]; u8 lag_tx_port_affinity[0x4]; u8 st[0x8]; - u8 reserved_at_10[0x3]; + u8 reserved_at_10[0x2]; + u8 isolate_vl_tc[0x1]; u8 pm_state[0x2]; u8 reserved_at_15[0x1]; u8 req_e2e_credit_mode[0x2]; |