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| author | Steven Whitehouse <swhiteho@redhat.com> | 2006-10-02 08:45:08 -0400 |
|---|---|---|
| committer | Steven Whitehouse <swhiteho@redhat.com> | 2006-10-02 08:45:08 -0400 |
| commit | 59458f40e25915a355d8b1d701425fe9f4f9ea23 (patch) | |
| tree | f1c9a2934df686e36d75f759ab7313b6f0e0e5f9 /include/asm-arm/arch-at91rm9200/hardware.h | |
| parent | 825f9075d74028d11d7f5932f04e1b5db3022b51 (diff) | |
| parent | d834c16516d1ebec4766fc58c059bf01311e6045 (diff) | |
Merge branch 'master' into gfs2
Diffstat (limited to 'include/asm-arm/arch-at91rm9200/hardware.h')
| -rw-r--r-- | include/asm-arm/arch-at91rm9200/hardware.h | 28 |
1 files changed, 6 insertions, 22 deletions
diff --git a/include/asm-arm/arch-at91rm9200/hardware.h b/include/asm-arm/arch-at91rm9200/hardware.h index 235d39d91107..6551b4d1ff7b 100644 --- a/include/asm-arm/arch-at91rm9200/hardware.h +++ b/include/asm-arm/arch-at91rm9200/hardware.h @@ -34,27 +34,14 @@ * Virtual to Physical Address mapping for IO devices. */ #define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) -#define AT91_VA_BASE_SPI AT91_IO_P2V(AT91_BASE_SPI) -#define AT91_VA_BASE_SSC2 AT91_IO_P2V(AT91_BASE_SSC2) -#define AT91_VA_BASE_SSC1 AT91_IO_P2V(AT91_BASE_SSC1) -#define AT91_VA_BASE_SSC0 AT91_IO_P2V(AT91_BASE_SSC0) -#define AT91_VA_BASE_US3 AT91_IO_P2V(AT91_BASE_US3) -#define AT91_VA_BASE_US2 AT91_IO_P2V(AT91_BASE_US2) -#define AT91_VA_BASE_US1 AT91_IO_P2V(AT91_BASE_US1) -#define AT91_VA_BASE_US0 AT91_IO_P2V(AT91_BASE_US0) -#define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91_BASE_EMAC) -#define AT91_VA_BASE_TWI AT91_IO_P2V(AT91_BASE_TWI) -#define AT91_VA_BASE_MCI AT91_IO_P2V(AT91_BASE_MCI) -#define AT91_VA_BASE_UDP AT91_IO_P2V(AT91_BASE_UDP) -#define AT91_VA_BASE_TCB1 AT91_IO_P2V(AT91_BASE_TCB1) -#define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91_BASE_TCB0) - -/* Internal SRAM */ -#define AT91_SRAM_BASE 0x00200000 /* Internal SRAM base address */ -#define AT91_SRAM_SIZE 0x00004000 /* Internal SRAM SIZE (16Kb) */ +#define AT91_VA_BASE_SPI AT91_IO_P2V(AT91RM9200_BASE_SPI) +#define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91RM9200_BASE_EMAC) +#define AT91_VA_BASE_TWI AT91_IO_P2V(AT91RM9200_BASE_TWI) +#define AT91_VA_BASE_MCI AT91_IO_P2V(AT91RM9200_BASE_MCI) +#define AT91_VA_BASE_UDP AT91_IO_P2V(AT91RM9200_BASE_UDP) /* Internal SRAM is mapped below the IO devices */ -#define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_SIZE) +#define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE) /* Serial ports */ #define AT91_NR_UART 5 /* 4 USART3's and one DBGU port */ @@ -71,9 +58,6 @@ /* Compact Flash */ #define AT91_CF_BASE 0x50000000 /* NCS4-NCS6: Compact Flash physical base address */ -/* Multi-Master Memory controller */ -#define AT91_UHP_BASE 0x00300000 /* USB Host controller */ - /* Clocks */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ |