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authorPriit Laes <plaes@plaes.org>2015-12-20 20:36:04 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-02-07 19:39:27 -0800
commit79f5da7d33a0b3b874601edd0ff58affbc76421a (patch)
treeba83747f4bdf16231f75dc4dc87b0600bd79c063 /drivers/staging/fbtft
parent3d6924dd6ae2ce8a90b4899c8f1cceeecd52aa22 (diff)
staging: fbtft: Use standard MIPI DCS command defines for st7735r
This patch makes use of the standard MIPI Display Command Set to remove some of the magic constants found in source code. Signed-off-by: Priit Laes <plaes@plaes.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/fbtft')
-rw-r--r--drivers/staging/fbtft/fb_st7735r.c42
1 files changed, 20 insertions, 22 deletions
diff --git a/drivers/staging/fbtft/fb_st7735r.c b/drivers/staging/fbtft/fb_st7735r.c
index a92b0d071097..c5e51fe1aad5 100644
--- a/drivers/staging/fbtft/fb_st7735r.c
+++ b/drivers/staging/fbtft/fb_st7735r.c
@@ -17,6 +17,7 @@
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <video/mipi_display.h>
#include "fbtft.h"
@@ -25,12 +26,10 @@
"0F 1B 0F 17 33 2C 29 2E 30 30 39 3F 00 07 03 10"
static int default_init_sequence[] = {
- /* SWRESET - Software reset */
- -1, 0x01,
+ -1, MIPI_DCS_SOFT_RESET,
-2, 150, /* delay */
- /* SLPOUT - Sleep out & booster on */
- -1, 0x11,
+ -1, MIPI_DCS_EXIT_SLEEP_MODE,
-2, 500, /* delay */
/* FRMCTR1 - frame rate control: normal mode
@@ -71,18 +70,14 @@ static int default_init_sequence[] = {
/* VMCTR1 - Power Control */
-1, 0xC5, 0x0E,
- /* INVOFF - Display inversion off */
- -1, 0x20,
+ -1, MIPI_DCS_EXIT_INVERT_MODE,
- /* COLMOD - Interface pixel format */
- -1, 0x3A, 0x05,
+ -1, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT,
- /* DISPON - Display On */
- -1, 0x29,
+ -1, MIPI_DCS_SET_DISPLAY_ON,
-2, 100, /* delay */
- /* NORON - Partial off (Normal) */
- -1, 0x13,
+ -1, MIPI_DCS_ENTER_NORMAL_MODE,
-2, 10, /* delay */
/* end marker */
@@ -91,14 +86,13 @@ static int default_init_sequence[] = {
static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
{
- /* Column address */
- write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
+ write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
+ xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
- /* Row address */
- write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
+ write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
+ ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
- /* Memory write */
- write_reg(par, 0x2C);
+ write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
}
#define MY BIT(7)
@@ -114,16 +108,20 @@ static int set_var(struct fbtft_par *par)
RGB-BGR ORDER color filter panel: 0=RGB, 1=BGR */
switch (par->info->var.rotate) {
case 0:
- write_reg(par, 0x36, MX | MY | (par->bgr << 3));
+ write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+ MX | MY | (par->bgr << 3));
break;
case 270:
- write_reg(par, 0x36, MY | MV | (par->bgr << 3));
+ write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+ MY | MV | (par->bgr << 3));
break;
case 180:
- write_reg(par, 0x36, par->bgr << 3);
+ write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+ par->bgr << 3);
break;
case 90:
- write_reg(par, 0x36, MX | MV | (par->bgr << 3));
+ write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+ MX | MV | (par->bgr << 3));
break;
}