diff options
author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2024-05-30 18:38:47 +0100 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-06-11 09:46:07 +0200 |
commit | 08b68ae5a0276f293c8da602f963f6de68b3599b (patch) | |
tree | 0e2e0f6f4e152ed553c97cab5f3ef861ade63bbb /drivers/pinctrl/renesas | |
parent | 13a8cae6e561d607474f905028781a5aee7205cb (diff) |
pinctrl: renesas: rzg2l: Enable variable configuration for all
Enable parsing of variable configuration for all architectures. This
prepares for adding support for the RZ/V2H SoC, which utilizes the ARM64
architecture and features port pins with variable configuration.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S
Link: https://lore.kernel.org/r/20240530173857.164073-6-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl/renesas')
-rw-r--r-- | drivers/pinctrl/renesas/pinctrl-rzg2l.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index 23dd20dd71ac..275496c67a6f 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -317,7 +317,6 @@ struct rzg2l_pinctrl { static const u16 available_ps[] = { 1800, 2500, 3300 }; -#ifdef CONFIG_RISCV static u64 rzg2l_pinctrl_get_variable_pin_cfg(struct rzg2l_pinctrl *pctrl, u64 pincfg, unsigned int port, @@ -336,6 +335,7 @@ static u64 rzg2l_pinctrl_get_variable_pin_cfg(struct rzg2l_pinctrl *pctrl, return 0; } +#ifdef CONFIG_RISCV static const u64 r9a07g043f_variable_pin_cfg[] = { RZG2L_VARIABLE_PIN_CFG_PACK(20, 0, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD | PIN_CFG_FILONOFF | PIN_CFG_FILNUM | PIN_CFG_FILCLKSEL | @@ -2219,13 +2219,11 @@ static int rzg2l_pinctrl_register(struct rzg2l_pinctrl *pctrl) if (i && !(i % RZG2L_PINS_PER_PORT)) j++; pin_data[i] = pctrl->data->port_pin_configs[j]; -#ifdef CONFIG_RISCV if (pin_data[i] & PIN_CFG_VARIABLE) pin_data[i] = rzg2l_pinctrl_get_variable_pin_cfg(pctrl, pin_data[i], j, i % RZG2L_PINS_PER_PORT); -#endif pins[i].drv_data = &pin_data[i]; } |