diff options
| author | Joao Pinto <Joao.Pinto@synopsys.com> | 2016-03-10 14:44:44 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2016-03-15 08:50:45 -0500 |
| commit | dac29e6c5460d05774e3e8c4fdf4d6e7bd481fab (patch) | |
| tree | 99427da8c728bd5db6b3ee743042521d1a6a2dd0 /drivers/pci | |
| parent | 886bc5ceb5cc3ad4b219502d72b277e3c3255a32 (diff) | |
PCI: designware: Add default link up check if sub-driver doesn't override
Add a default DesignWare "link_up" test for use when a sub-driver doesn't
supply its own pcie_host_ops.link_up() method.
[bhelgaas: changelog, split into its own patch]
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/host/pcie-designware.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c index e4fb44295d61..a4cccd356304 100644 --- a/drivers/pci/host/pcie-designware.c +++ b/drivers/pci/host/pcie-designware.c @@ -70,6 +70,11 @@ #define PCIE_ATU_FUNC(x) (((x) & 0x7) << 16) #define PCIE_ATU_UPPER_TARGET 0x91C +/* PCIe Port Logic registers */ +#define PLR_OFFSET 0x700 +#define PCIE_PHY_DEBUG_R1 (PLR_OFFSET + 0x2c) +#define PCIE_PHY_DEBUG_R1_LINK_UP 0x00000010 + static struct pci_ops dw_pcie_ops; int dw_pcie_cfg_read(void __iomem *addr, int size, u32 *val) @@ -401,10 +406,13 @@ int dw_pcie_wait_for_link(struct pcie_port *pp) int dw_pcie_link_up(struct pcie_port *pp) { + u32 val; + if (pp->ops->link_up) return pp->ops->link_up(pp); - return 0; + val = readl(pp->dbi_base + PCIE_PHY_DEBUG_R1); + return val & PCIE_PHY_DEBUG_R1_LINK_UP; } static int dw_pcie_msi_map(struct irq_domain *domain, unsigned int irq, |